| 2009-09-20 |
Chris Lattner | remove the asmstring, it is now dead. Improve comment. |
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| 2009-09-20 |
Chris Lattner | kill off printPICLabel now, it's specialness is handled by |
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| 2009-09-20 |
Chris Lattner | Add an intel syntax MCInstPrinter implementation. ... |
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| 2009-09-18 |
Dan Gohman | Add support for using the FLAGS result of or, xor,... |
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| 2009-09-18 |
Sean Callanan | Added RCL and RCR (rotate left and right with a |
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| 2009-09-16 |
Sean Callanan | Added the LODS (load byte into register, usually |
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| 2009-09-16 |
Sean Callanan | Added the LAR (load segment access rights) |
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| 2009-09-16 |
Sean Callanan | Added the LOOP family of instructions to the Intel |
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| 2009-09-16 |
Sean Callanan | Added an alternate form of register-register CMP |
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| 2009-09-16 |
Sean Callanan | Added the ENTER instruction, which sets up a stack |
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| 2009-09-16 |
Sean Callanan | Added the definitions for one-bit left shifts to |
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| 2009-09-15 |
Sean Callanan | Added far return instructions (that is, returns to |
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| 2009-09-15 |
Sean Callanan | Updated comments per Eli's suggestion. |
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| 2009-09-15 |
Sean Callanan | Added register-to-register ADD instructions to the |
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| 2009-09-15 |
Sean Callanan | Added a new register class for segment registers |
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| 2009-09-15 |
Sean Callanan | Modified the Intel instruction tables to include |
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| 2009-09-12 |
Sean Callanan | Added the WAIT instruction to the Intel tables, |
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| 2009-09-12 |
Sean Callanan | Added CMPS (string comparison) instructions for all |
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| 2009-09-12 |
Sean Callanan | Added SCAS instructions in their 8, 16, 32, and |
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| 2009-09-11 |
Sean Callanan | Added ADC, SUB, SBB, and OR instructions that operate |
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| 2009-09-10 |
Sean Callanan | Added XOR instructions for rAX and immediates of |
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| 2009-09-10 |
Sean Callanan | Added MOV instructions between rAX and memory offsets, |
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| 2009-09-10 |
Sean Callanan | Added a variety of PUSH and POP instructions, including |
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| 2009-09-03 |
Dan Gohman | Add a -disable-16bit flag and associated support for... |
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| 2009-09-03 |
Sean Callanan | Added opaque 32-, 48-, and 80-bit memory operand types... |
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| 2009-09-02 |
Sean Callanan | Fixed the asmstrings for 8-bit, 16-bit, and 32-bit... |
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| 2009-09-01 |
Sean Callanan | Added TEST %rAX, $imm instructions to the Intel tables... |
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| 2009-08-29 |
Dan Gohman | CMOV_GR8 clobbers EFLAGS when its expansion involves... |
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| 2009-08-27 |
Dan Gohman | Don't mark CMOV_GR8 as two-address, or commutable,... |
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| 2009-08-27 |
Daniel Dunbar | X86: Mark EH_RETURN as code-gen-only. |
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| 2009-08-27 |
Dan Gohman | Expand i8 selects into control flow instead of 16-bit... |
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| 2009-08-26 |
Dan Gohman | Don't use INSERT_SUBREG to model anyext operations... |
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| 2009-08-15 |
Dan Gohman | On x86-64, for a varargs function, don't store the... |
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| 2009-08-11 |
Daniel Dunbar | X86/AsmParser: Mark MOV64GSrm, MOV64FSrm, GS_MOV32rm... |
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| 2009-08-11 |
Daniel Dunbar | Add 'isCodeGenOnly' bit to Instruction .td records. |
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| 2009-08-11 |
Sean Callanan | Added ADD instructions with rAX as one parameter to... |
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| 2009-08-11 |
Chris Lattner | move some 32-bit instrs to x86instrinfo.td |
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| 2009-08-11 |
Sean Callanan | Added the x86 INT instructions; both the special-case... |
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| 2009-08-10 |
Daniel Dunbar | llvm-mc/AsmMatcher: Fix thinko, Mem isn't a subclass... |
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| 2009-08-10 |
Daniel Dunbar | llvm-mc/AsmMatcher: Change assembler parser match class... |
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| 2009-08-09 |
Daniel Dunbar | llvm-mc/AsmParser: Implement user defined super classes. |
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| 2009-08-09 |
Daniel Dunbar | llvm-mc/AsmParser: Define match classes in the .td... |
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| 2009-08-06 |
Anton Korobeynikov | We need to sext global addresses in kernel code model... |
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| 2009-08-06 |
Anton Korobeynikov | Missed part of recent kernel codemodel tweaks |
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| 2009-08-05 |
Dan Gohman | Enable the new no-SP register classes by default. This... |
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| 2009-08-05 |
Dan Gohman | Major calling convention code refactoring. |
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| 2009-08-03 |
Anton Korobeynikov | Unbreak Win64 CC. Step one: honour register save area... |
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| 2009-08-02 |
Dan Gohman | Add a comment. |
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| 2009-08-02 |
Dan Gohman | Resync lea32addr and lea64addr. |
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| 2009-07-30 |
Evan Cheng | Optimize some common usage patterns of atomic built... |
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| 2009-07-30 |
Dan Gohman | Add a new register class to describe operands that... |
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| 2009-07-23 |
Sean Callanan | Added a 2+-byte NOP instruction to the Intel tables, |
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| 2009-07-22 |
Sean Callanan | Added the unconditional JMP with an 8-bit relocation... |
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| 2009-07-21 |
Evan Cheng | Add jumps with 8-bit relocation for assembler / disasse... |
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| 2009-07-10 |
Chris Lattner | remove the "debug" modifier, it is only used by one... |
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| 2009-06-30 |
David Greene | Add 256-bit memory operand support. |
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| 2009-06-26 |
David Greene | Add feature flags for AVX and FMA and fix some SSE4A... |
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| 2009-06-23 |
Sean Callanan | Test commit: fixed spacing. |
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| 2009-06-20 |
Chris Lattner | change TLS_ADDR lowering to lower to a real mem operand... |
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| 2009-06-20 |
Chris Lattner | eliminate the "call" operand modifier from the asm... |
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| 2009-06-19 |
Eli Friedman | Misc tweaks to Intel asm printing to make it more compa... |
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| 2009-06-15 |
Bill Wendling | The Ls and Qs were mixed up. Patch by Sean. |
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| 2009-06-15 |
Bill Wendling | "The Intel instruction tables should include the 64... |
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| 2009-06-03 |
Dan Gohman | Revert r72734. The Darwin assembler doesn't support... |
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| 2009-06-02 |
Evan Cheng | On Darwin x86_64 small code model doesn't guarantee... |
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| 2009-06-02 |
Dale Johannesen | Revert 72707 and 72709, for the moment. |
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| 2009-06-01 |
Dale Johannesen | Make the implicit inputs and outputs of target-independent |
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| 2009-05-29 |
Evan Cheng | More h-registers tricks: folding zext nodes. |
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| 2009-05-20 |
Evan Cheng | Try again. Allow call to immediate address for ELF... |
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| 2009-05-20 |
Evan Cheng | Cannot use immediate as call absolute target in PIC... |
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| 2009-05-18 |
Dale Johannesen | Add OpSize to 16-bit ADC and SBB. |
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| 2009-05-18 |
Dale Johannesen | Fill in the missing patterns for ADC and SBB. |
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| 2009-05-11 |
Dan Gohman | Convert a subtract into a negate and an add when it... |
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| 2009-05-05 |
Chris Lattner | Add basic support for code generation of |
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| 2009-04-30 |
Dan Gohman | Set mayLoad on MOVZX32_NOREXrm8 too. |
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| 2009-04-30 |
Evan Cheng | Mark MOV8mr_NOREX and MOV8rm_NOREX as mayStore / mayLoa... |
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| 2009-04-27 |
Nate Begeman | 2nd attempt, fixing SSE4.1 issues and implementing... |
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| 2009-04-27 |
Dan Gohman | Rename GR8_ABCD to GR8_ABCD_L and create GR8_ABCD_H... |
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| 2009-04-27 |
Dan Gohman | Rename GR8_, GR16_, GR32_, and GR64_ to GR8_ABCD, GR16_... |
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| 2009-04-27 |
Dan Gohman | Break up long multi-mnemonic strings into separate... |
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| 2009-04-27 |
Mon P Wang | Revised 68749 to allow matching of load/stores for... |
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| 2009-04-24 |
Rafael Espindola | Fix PR 4004 by including the call to __tls_get_addr... |
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| 2009-04-24 |
Rafael Espindola | Revert 69952. Causes testsuite failures on linux x86-64. |
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| 2009-04-24 |
Nate Begeman | PR2957 |
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| 2009-04-21 |
Rafael Espindola | TLS_addr64 and TLS_addr32 define RDI and EAX. They... |
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| 2009-04-17 |
Rafael Espindola | For general dynamic TLS access we must use |
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| 2009-04-15 |
Dan Gohman | Fix 80-column violations. |
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| 2009-04-15 |
Dan Gohman | Add a new MOV8rr_NOREX, and make X86's copyRegToReg... |
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| 2009-04-13 |
Dan Gohman | Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalize |
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| 2009-04-13 |
Dan Gohman | Implement x86 h-register extract support. |
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| 2009-04-10 |
Chris Lattner | a few fixes to "addrspace(256) is reference offset... |
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| 2009-04-08 |
Rafael Espindola | Re-apply 68552. |
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| 2009-04-07 |
Bill Wendling | Temporarily revert r68552. This was causing a failure... |
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| 2009-04-07 |
Rafael Espindola | Reduce code duplication on the TLS implementation. |
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| 2009-03-30 |
Evan Cheng | When optimzing a mul by immediate into two, the resulti... |
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| 2009-03-13 |
Rafael Espindola | add 8 and 16 bit TLS moves. |
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| 2009-03-13 |
Rafael Espindola | Improve sext and zext of TLS variables. |
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| 2009-03-12 |
Evan Cheng | Re-apply 66024 with fixes: 1. Fixed indirect call to... |
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| 2009-03-11 |
Dan Gohman | Revert r66024. The JIT encoding for CALLpcrel32 is... |
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| 2009-03-11 |
Rafael Espindola | optimize i8 and i16 tls values. |
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