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(parent: 2395f01) | patch
Add a new register class to describe operands that can't be SP,
authorDan Gohman <gohman@apple.com>
Thu, 30 Jul 2009 01:56:29 +0000 (01:56 +0000)
committerDan Gohman <gohman@apple.com>
Thu, 30 Jul 2009 01:56:29 +0000 (01:56 +0000)
commita4714e025de720d0fcbaa78ab6c12dc789599233
tree5e129202d37b2e5937fff8d088a69f5691a749c0tree | snapshot
parent2395f011986e6c6277c71bddcd8af88f9b904fc2commit | diff
Add a new register class to describe operands that can't be SP,
due to x86 encoding restrictions. This is currently off by default
because it may cause code quality regressions. This is for PR4572.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77565 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrInfo.cpp diff | blob | history
lib/Target/X86/X86InstrInfo.td diff | blob | history
lib/Target/X86/X86InstrSSE.td diff | blob | history
lib/Target/X86/X86RegisterInfo.cpp diff | blob | history
lib/Target/X86/X86RegisterInfo.td diff | blob | history
test/CodeGen/X86/coalesce-esp.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors