R600: Fix an infinite loop when trying to reorganize export/tex vector input
[oota-llvm.git] / lib / Target / R600 / R600Defines.h
2013-08-26 Tom StellardR600: Add support for i8 and i16 local memory stores
2013-08-16 Tom StellardR600: Add IsExport bit to TableGen instruction definitions
2013-06-28 Tom StellardR600: Add local memory support via LDS
2013-06-28 Tom StellardR600: Add ALUInst bit to tablegen definitions v2
2013-06-25 Tom StellardR600: Use new getNamedOperandIdx function generated...
2013-05-17 Vincent LejeuneR600: Relax some vector constraints on Dot4.
2013-05-06 Tom StellardR600: Remove dead code from the CodeEmitter v2
2013-05-06 Tom StellardR600: Emit config values in register / value pairs
2013-04-30 Vincent LejeuneR600: Add a Bank Swizzle operand
2013-04-30 Vincent LejeuneR600: Add FetchInst bit to instruction defs to denote...
2013-02-06 Tom StellardR600: Support for indirect addressing v4
2013-01-23 Tom StellardR600: rework handling of the constants
2012-12-11 Tom StellardAdd R600 backend