Synthesize SSSE3/AVX 128-bit horizontal integer add/sub instructions from add/sub...
[oota-llvm.git] / lib / Target / ARM /
2011-11-18 Chad RosierGuard call to getRegForValue with isTypeLegal check...
2011-11-17 Chad RosierAdd TODO comment.
2011-11-17 Chad RosierDead code.
2011-11-17 Chad RosierDon't unconditionally set the kill flag.
2011-11-16 Jim GrosbachGeneralize the fixup info for ARM mode.
2011-11-16 Jim GrosbachFix encoding of NOP used for padding in ARM mode .align.
2011-11-16 Jim GrosbachARM assembly parsing for shifted register operands...
2011-11-16 Jim GrosbachClean up debug printing of ARM shifted operands.
2011-11-16 Jim GrosbachARM assmebly two operand forms for LSR, ASR, LSL, ROR...
2011-11-16 Jim GrosbachARM assembly parsing for RRX mnemonic.
2011-11-16 Chad RosierCheck to make sure we can select the instruction before...
2011-11-16 Jim GrosbachARM mode aliases for bitwise instructions w/ register...
2011-11-16 Bob WilsonFix tablegen warning: hasSideEffects is inferred for...
2011-11-16 NAKAMURA Takumilib/Target/ARM/CMakeLists.txt: Disable optimization...
2011-11-16 Evan ChengSink codegen optimization level into MCCodeGenInfo...
2011-11-16 Bob WilsonFix ARM SjLj-EH dispatch setup code. <rdar://problem...
2011-11-16 Chad RosierAdd FIXME comment.
2011-11-15 Jakob Stoklund OlesenEnable -widen-vmovs by default.
2011-11-15 Jim GrosbachARM assembly parsing for register range syntax for...
2011-11-15 Jim GrosbachARM assembly parsing for data type suffices on NEON...
2011-11-15 Jim GrosbachARM assembly parsing two operand forms for shift instru...
2011-11-15 Jim GrosbachARM VFP assembly parsing for VADD and VSUB two-operand...
2011-11-15 Jim GrosbachARM accept an immediate offset in memory operands w...
2011-11-15 Jim GrosbachARM enclosing curly braces optional on one-register...
2011-11-15 Jim GrosbachARM size suffix on VFP single-precision 'vmov' is optional.
2011-11-15 Jim GrosbachFix typo.
2011-11-15 Jim GrosbachARM alternate size suffices for VTRN instructions.
2011-11-15 Owen AndersonFix a misplaced paren bug.
2011-11-15 Jim GrosbachARM assembly parsing for optional datatype suffix on...
2011-11-15 Jim GrosbachARM assembly parsing for two-operand form of 'mul'...
2011-11-15 Jim GrosbachARM assembly parsing for two-operand form of 'mul'...
2011-11-15 Jim GrosbachThumb2 two-operand 'mul' instruction wide encoding...
2011-11-15 Owen AndersonFix an ambiguous decoding where we failed to properly...
2011-11-15 Jim GrosbachThumb2 assembly parsing for mul.w in IT block fix.
2011-11-15 Jim GrosbachARM parsing datatype suffix variants for register-write...
2011-11-15 Jay FoadFix typo in comment.
2011-11-15 Jay FoadMake use of MachinePointerInfo::getFixedStack. This...
2011-11-15 Jay FoadRemove some unnecessary includes of PseudoSourceValue.h.
2011-11-15 Evan ChengAdd vmov.f32 to materialize f32 immediate splats which...
2011-11-15 Jim GrosbachARM parsing datatype suffix variants for fixed-writebac...
2011-11-14 Jim GrosbachARM parsing datatype suffix variants for non-writeback...
2011-11-14 Jim GrosbachARM parsing datatype suffix variants for non-writeback...
2011-11-14 Jim GrosbachAdd explanatory comment.
2011-11-14 Jim GrosbachSplit out the plain '.{8|16|32|64}' suffix handling.
2011-11-14 Jim GrosbachARM parsing optional datatype suffix for VAND/VEOR...
2011-11-14 Chad RosierSupporting inline memmove isn't going to be worthwhile...
2011-11-14 Jim GrosbachARM VLDR/VSTR instructions don't need a size suffix.
2011-11-14 Chad RosierAdd support for inlining small memcpys.
2011-11-14 Chad RosierFix a performance regression from r144565. Positive...
2011-11-14 Jim GrosbachARM assembly parsing type suffix options for VLDR/VSTR.
2011-11-14 Chad RosierAdd support for Thumb load/stores with negative offsets.
2011-11-14 Jim GrosbachTidy up. 80 column.
2011-11-14 Chad RosierAdd support for ARM halfword load/stores and signed...
2011-11-13 Chad RosierThe order in which the predicate is added differs betwe...
2011-11-13 Chad RosierTemporarily disable SelectIntrinsicCall when in ARM...
2011-11-13 Chad RosierFix comments.
2011-11-13 Chad RosierAdd support for emitting both signed- and zero-extend...
2011-11-12 Daniel Dunbarbuild: Attempt to rectify inconsistencies between CMake...
2011-11-12 Jim GrosbachARM refactor simple immediate asm operand render methods.
2011-11-12 Jim GrosbachRe-apply 144430, this time with the associated isel...
2011-11-11 Jim GrosbachOops. Missed the isel half of this. revert while I...
2011-11-11 Jim GrosbachARM assembly parsing for VST1 two-register encoding.
2011-11-11 Jim GrosbachARM optional size suffix for VLDR/VSTR syntax.
2011-11-11 Chad RosierAdd support in fast-isel for selecting memset/memcpy...
2011-11-11 Jim GrosbachARM vldm and vstm VFP instructions can take a data...
2011-11-11 Jim GrosbachNuke no longer accurate comment.
2011-11-11 Andrew TrickPreserve MachineMemOperands in ARMLoadStoreOptimizer.
2011-11-11 Jim GrosbachARM allow Q registers in vldm/vstm register lists.
2011-11-11 Benjamin KramerRemove the unnecessary dependency on libARMCodeGen...
2011-11-11 Chad RosierRename variables to avoid confusion. No functionallity...
2011-11-11 Chad RosierAdd support for using immediates with select instructions.
2011-11-11 Eli FriedmanMake sure to expand SIGN_EXTEND_INREG for NEON vectors...
2011-11-11 Chad RosierWhen loading a value, treat an i1 as an i8.
2011-11-11 Chad RosierAdd support for using MVN to materialize negative const...
2011-11-11 Daniel DunbarLLVMBuild: Add explicit information on whether targets...
2011-11-10 Jim GrosbachThumb2 ldm/stm updating w/ one register in the list...
2011-11-10 Jim GrosbachARM let processInstruction() tranforms chain.
2011-11-10 Jim GrosbachThumb2 parsing for push/pop w/ hi registers in the...
2011-11-10 Jim GrosbachThumb1 diagnostics for reglist on PUSH/POP fix.
2011-11-10 Jim GrosbachThumb MUL assembly parsing for 3-operand form.
2011-11-10 Chad RosierWhen in ARM mode, LDRH/STRH require special handling...
2011-11-10 Jim GrosbachARM .thumb_func directive for quoted symbol names.
2011-11-10 Jim GrosbachARM assembly parsing for LSR/LSL/ROR(immediate).
2011-11-10 Jim GrosbachARM assembly parsing for ASR(immediate).
2011-11-10 Chad RosierFor immediate encodings of icmp, zero or sign extend...
2011-11-10 Daniel Dunbarllvm-build: Add --native-target and --enable-targets...
2011-11-10 Daniel Dunbarllvm-build: Add an explicit component type to represent...
2011-11-10 Jim GrosbachTidy up.
2011-11-09 Jim GrosbachThumb2 assembly parsing STMDB w/ optional .w suffix.
2011-11-09 Eli FriedmanMake sure we correctly unroll conversions between v2f64...
2011-11-09 Chad RosierThe ARM LDRH/STRH instructions use a +/-imm8 encoding...
2011-11-09 Chad RosierAdd support for encoding immediates in icmp and fcmp...
2011-11-09 Evan ChengHide cpu name checking in ARMSubtarget.
2011-11-08 Evan ChengAdd workaround for Cortex-M3 errata 602117 by replacing...
2011-11-08 Chad RosierARMFastISel doesn't support thumb1. Rename isThumb...
2011-11-08 Lang HamesLower mem-ops to unaligned i32/i16 load/stores on ARM...
2011-11-08 Pete CooperAdded invariant field to the DAG.getLoad method and...
2011-11-08 Eli FriedmanMake sure to mark vector extload's as expand on ARM...
2011-11-08 Chad RosierEnable support for returning i1, i8, and i16. Nothing...
2011-11-07 Chad RosierAllow i1 to be promoted to i32 for ARM AAPCS and AAPCS...
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