ARM optional size suffix for VLDR/VSTR syntax.
authorJim Grosbach <grosbach@apple.com>
Fri, 11 Nov 2011 23:34:43 +0000 (23:34 +0000)
committerJim Grosbach <grosbach@apple.com>
Fri, 11 Nov 2011 23:34:43 +0000 (23:34 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144427 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMInstrVFP.td
test/MC/ARM/simple-fp-encoding.s

index e746cf20d032a32a2484896399363759a16c3971..22a464e50cde66a0b171f67ff04902aaae17d4db 100644 (file)
@@ -1163,3 +1163,12 @@ def FCONSTS : VFPAI<(outs SPR:$Sd), (ins vfp_f32imm:$imm),
 
 def : VFP2InstAlias<"fmstat${p}", (FMSTAT pred:$p)>;
 
+// The size suffix is optional for VLDR/VSTR
+def : VFP2InstAlias<"vldr$p $Dd, $addr",
+                    (VLDRD DPR:$Dd, addrmode5:$addr, pred:$p)>;
+def : VFP2InstAlias<"vldr$p $Sd, $addr",
+                    (VLDRS SPR:$Sd, addrmode5:$addr, pred:$p)>;
+def : VFP2InstAlias<"vstr$p $Dd, $addr",
+                    (VSTRD DPR:$Dd, addrmode5:$addr, pred:$p)>;
+def : VFP2InstAlias<"vstr$p $Sd, $addr",
+                    (VSTRS SPR:$Sd, addrmode5:$addr, pred:$p)>;
index 8cc32bc3fce58543b89ad69d7766e2f7f5b1d4a2..cb76215f7fd0c0e4e674a80c8d3c1a6d1ba726ca 100644 (file)
         vmov    r0, r1, d16
 
 @ CHECK: vldr.64 d17, [r0]           @ encoding: [0x00,0x1b,0xd0,0xed]
+@ CHECK: vldr.32 s0, [lr]            @ encoding: [0x00,0x0a,0x9e,0xed]
+@ CHECK: vldr.64 d0, [lr]            @ encoding: [0x00,0x0b,0x9e,0xed]
+
         vldr.64        d17, [r0]
+       vldr s0, [lr]
+       vldr d0, [lr]
 
 @ CHECK: vldr.64 d1, [r2, #32]       @ encoding: [0x08,0x1b,0x92,0xed]
 @ CHECK: vldr.64 d1, [r2, #-32]      @ encoding: [0x08,0x1b,0x12,0xed]
 @ CHECK: vstr.64 d4, [r1]            @ encoding: [0x00,0x4b,0x81,0xed]
 @ CHECK: vstr.64 d4, [r1, #24]       @ encoding: [0x06,0x4b,0x81,0xed]
 @ CHECK: vstr.64 d4, [r1, #-24]      @ encoding: [0x06,0x4b,0x01,0xed]
+@ CHECK: vstr.32 s0, [lr]            @ encoding: [0x00,0x0a,0x8e,0xed]
+@ CHECK: vstr.64 d0, [lr]            @ encoding: [0x00,0x0b,0x8e,0xed]
+
         vstr.64 d4, [r1]
         vstr.64 d4, [r1, #24]
         vstr.64 d4, [r1, #-24]
+       vstr s0, [lr]
+       vstr d0, [lr]
 
 @ CHECK: vstr.32 s4, [r1]            @ encoding: [0x00,0x2a,0x81,0xed]
 @ CHECK: vstr.32 s4, [r1, #24]       @ encoding: [0x06,0x2a,0x81,0xed]