ARM size suffix on VFP single-precision 'vmov' is optional.

rdar://10435114

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144698 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td
index 27e185f3ca3c081d5a3d66e561216ce3862f6a2c..7c0048af99bd0de737cb57aad383df0c4bdc1063 100644 (file)
--- a/lib/Target/ARM/ARMInstrVFP.td
+++ b/lib/Target/ARM/ARMInstrVFP.td
@@ -1189,3 +1189,8 @@ def : VFP2InstAlias<"vmov${p}.f64 $Rt, $Rt2, $Dn",
                     (VMOVRRD GPR:$Rt, GPR:$Rt2, DPR:$Dn, pred:$p)>;
 def : VFP2InstAlias<"vmov${p}.f64 $Dn, $Rt, $Rt2",
                     (VMOVDRR DPR:$Dn, GPR:$Rt, GPR:$Rt2, pred:$p)>;
+
+// VMOVS doesn't need the .f32 to disambiguate from the NEON encoding the way
+// VMOVD does.
+def : VFP2InstAlias<"vmov${p} $Sd, $Sm",
+                    (VMOVS SPR:$Sd, SPR:$Sm, pred:$p)>;