Programming Languages Research Group: Git

2011-03-11	Jim Grosbach	Pseudo-ize the ARM 'B' instruction.	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Remove dead code. These ARM instruction definitions...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Remove dead code. These ARM instruction definitions...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Pseudo-ize VMOVDcc and VMOVScc.	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	80 columns	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Properly pseudo-ize the ARM LDMIA_RET instruction....	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	80 columns.	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Trailing whitespace.	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Remove dead code. These ARM instruction definitions...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	ARM VDUPfd and VDUPfq can just be patterns. The instruction...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Remove dead code. These ARM instruction definitions...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	ARM VDUPLNfq and VDUPLNfd definitions can just be Pat...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	ARM VREV64df and VREV64qf can just be patterns. The...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	This FIXME has been fixed.	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Properly pseudo-ize ARM MVNCCi.	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Add missing 'return on failure'. Previously we'd crash...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Fix MOVCCi32imm to be have ARM-mode Requires and a...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Teach TableGen to pre-calculate register enum values...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Make the register enum value part of the CodeGenRegister...	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Trailing whitespace.	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Trailing whitespace.	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos.	commit \| commitdiff \| tree
2011-03-11	Jim Grosbach	Properly pseudo-ize ARM MOVCCi and MOVCCi16.	commit \| commitdiff \| tree
2011-03-10	Jim Grosbach	Properly pseudo-ize MOVCCr and MOVCCs.	commit \| commitdiff \| tree
2011-03-10	Jim Grosbach	DMB can just be a pat referencing MCR.	commit \| commitdiff \| tree
2011-03-10	Jim Grosbach	Reorganize a bit. No functional change, just moving...	commit \| commitdiff \| tree
2011-03-10	Jim Grosbach	Pseudo-instructions are codegenonly by definition.	commit \| commitdiff \| tree
2011-03-10	Jim Grosbach	Memory barrier instructions don't need special handling...	commit \| commitdiff \| tree
2011-03-08	Jim Grosbach	Darwin 'as' silently ignores the '.ident' directive.	commit \| commitdiff \| tree
2011-03-07	Jim Grosbach	Tidy up.	commit \| commitdiff \| tree
2011-03-05	Jim Grosbach	Teach the register scavenger to take subregs into account...	commit \| commitdiff \| tree
2011-03-03	Jim Grosbach	Allow a target to choose whether to prefer the scavenger...	commit \| commitdiff \| tree
2011-03-01	Jim Grosbach	trailing whitespace.	commit \| commitdiff \| tree
2011-03-01	Jim Grosbach	Generalize the register matching code in DAGISel a...	commit \| commitdiff \| tree
2011-02-25	Jim Grosbach	Trailing whitespace.	commit \| commitdiff \| tree
2011-02-25	Jim Grosbach	Fix formatting of debug helper string.	commit \| commitdiff \| tree
2011-02-23	Jim Grosbach	Remove file. Previous commit deleted content, but left...	commit \| commitdiff \| tree
2011-02-23	Jim Grosbach	Revert r125595, which is an X86-only undocumented assembly...	commit \| commitdiff \| tree
2011-02-12	Jim Grosbach	AsmMatcher custom operand parser failure enhancements.	commit \| commitdiff \| tree
2011-02-11	Jim Grosbach	Tidy out asm matcher .inc output.	commit \| commitdiff \| tree
2011-02-11	Jim Grosbach	More whitespace cleanup...	commit \| commitdiff \| tree
2011-02-11	Jim Grosbach	Remove trailing whitespace.	commit \| commitdiff \| tree
2011-02-11	Jim Grosbach	Remove trailing whitespace.	commit \| commitdiff \| tree
2011-02-10	Jim Grosbach	Do AsmMatcher operand classification per-opcode.	commit \| commitdiff \| tree
2011-02-03	Jim Grosbach	Tidy up a bit.	commit \| commitdiff \| tree
2011-01-19	Jim Grosbach	Make sure to propogate the error code when we fail...	commit \| commitdiff \| tree
2011-01-18	Jim Grosbach	Add a FIXME.	commit \| commitdiff \| tree
2011-01-17	Jim Grosbach	Trailing whitespace.	commit \| commitdiff \| tree
2011-01-13	Jim Grosbach	When updating a tSpill/tRestore instruction to be a...	commit \| commitdiff \| tree
2010-12-24	Jim Grosbach	Trailing whitespace.	commit \| commitdiff \| tree
2010-12-24	Jim Grosbach	Use a StringSwitch<> instead of a manually constructed...	commit \| commitdiff \| tree
2010-12-23	Jim Grosbach	Remove dead patterns.	commit \| commitdiff \| tree
2010-12-23	Jim Grosbach	Recognize a few more documented register name aliases...	commit \| commitdiff \| tree
2010-12-22	Jim Grosbach	Trailing whitespace.	commit \| commitdiff \| tree
2010-12-21	Jim Grosbach	Tidy up a bit. Trailing whitespace, hard tabs and 80...	commit \| commitdiff \| tree
2010-12-17	Jim Grosbach	If The ARM WriteNopData() gets an unaligned byte count...	commit \| commitdiff \| tree
2010-12-17	Jim Grosbach	Add bits 31-28 to the Thumb2 encoding of TBB/TBH.	commit \| commitdiff \| tree
2010-12-17	Jim Grosbach	Handle 2 and 4 byte data blob fixup values for ARM.	commit \| commitdiff \| tree
2010-12-17	Jim Grosbach	Trailing whitespace and 80 column fixups.	commit \| commitdiff \| tree
2010-12-16	Jim Grosbach	Pseudo-ize the Thumb1 tBfar pattern. rdar://8777974	commit \| commitdiff \| tree
2010-12-15	Jim Grosbach	Thumb1 had two patterns for the same load-from-constant...	commit \| commitdiff \| tree
2010-12-15	Jim Grosbach	Tweak a few pseudo-inst pattern base classes.	commit \| commitdiff \| tree
2010-12-15	Jim Grosbach	The new t2LEApcrel* pseudo instructions need the size...	commit \| commitdiff \| tree
2010-12-14	Jim Grosbach	thumb adr fixup needs alignment just like the t2 version.	commit \| commitdiff \| tree
2010-12-14	Jim Grosbach	Add support for MC-ized encoding of tLEApcrel and tLEApcrelJ...	commit \| commitdiff \| tree
2010-12-14	Jim Grosbach	trailing whitespace	commit \| commitdiff \| tree
2010-12-14	Jim Grosbach	Refactor a bit for legibility.	commit \| commitdiff \| tree
2010-12-14	Jim Grosbach	trailing whitespace.	commit \| commitdiff \| tree
2010-12-14	Jim Grosbach	Make sure to propagate the predicate operands for LEApcrel...	commit \| commitdiff \| tree
2010-12-14	Jim Grosbach	ARM Fixups relative to thumb functions need to have...	commit \| commitdiff \| tree
2010-12-14	Jim Grosbach	Trailing whitespace	commit \| commitdiff \| tree
2010-12-13	Jim Grosbach	Use 32-bit types for 32-bit values.	commit \| commitdiff \| tree
2010-12-13	Jim Grosbach	Trailing whitespace.	commit \| commitdiff \| tree
2010-12-10	Jim Grosbach	Add FIXME	commit \| commitdiff \| tree
2010-12-10	Jim Grosbach	Trailing whitespace.	commit \| commitdiff \| tree
2010-12-10	Jim Grosbach	Correct encoding of rotation immediate for Thumb2 instructio...	commit \| commitdiff \| tree
2010-12-10	Jim Grosbach	Fix encoding of 'U' bit for Thumb2 STRD/LDRD instructions...	commit \| commitdiff \| tree
2010-12-10	Jim Grosbach	More trivial cleanup. No need to define the EncoderMethod...	commit \| commitdiff \| tree
2010-12-10	Jim Grosbach	Tidy up.	commit \| commitdiff \| tree
2010-12-10	Jim Grosbach	Trailing whitespace.	commit \| commitdiff \| tree
2010-12-10	Jim Grosbach	Teach isCSRestore() that ARM/Thumb2 functions will...	commit \| commitdiff \| tree
2010-12-10	Jim Grosbach	Thumb unconditional branch binary encoding. rdar:/...	commit \| commitdiff \| tree
2010-12-10	Jim Grosbach	Thumb conditional branch binary encodings. rdar://8745367	commit \| commitdiff \| tree
2010-12-09	Jim Grosbach	Rename CB/CBZ specific fixup accordingly.	commit \| commitdiff \| tree
2010-12-09	Jim Grosbach	Rename the encoder method for t_cbtarget to match.	commit \| commitdiff \| tree
2010-12-09	Jim Grosbach	Thumb needs a few different encoding schemes for branch...	commit \| commitdiff \| tree
2010-12-09	Jim Grosbach	ARM stm/ldm instructions require more than one register...	commit \| commitdiff \| tree
2010-12-09	Jim Grosbach	tidy up.	commit \| commitdiff \| tree
2010-12-09	Jim Grosbach	80 columns.	commit \| commitdiff \| tree
2010-12-09	Jim Grosbach	Add a textual message to the assert.	commit \| commitdiff \| tree
2010-12-09	Jim Grosbach	Add a sanity check assert() for t2ADD/SUBrSPi instructions...	commit \| commitdiff \| tree
2010-12-09	Jim Grosbach	When using multiple instructions to reference a frame...	commit \| commitdiff \| tree
2010-12-09	Jim Grosbach	The add/sub SP instructions are really pseudos. The...	commit \| commitdiff \| tree
2010-12-08	Jim Grosbach	Clean up the add/sub w/ SP source reg instructions...	commit \| commitdiff \| tree
2010-12-08	Jim Grosbach	Fix T2TwoRegImm and use it for t2ADDrSPi12 and friends.	commit \| commitdiff \| tree
2010-12-08	Jim Grosbach	T2TwoRegImm isn't right for t2SUBrSPi12. Use T2I instead.	commit \| commitdiff \| tree
2010-12-08	Jim Grosbach	Add operand encoding for Thumb2 subw SP + imm. rdar...	commit \| commitdiff \| tree
2010-12-08	Jim Grosbach	Add operand encoding for Thumb2 addw Rn + imm. rdar...	commit \| commitdiff \| tree
2010-12-08	Jim Grosbach	Add operand encoding for Thumb2 addw SP + imm. rdar...	commit \| commitdiff \| tree
2010-12-08	Jim Grosbach	Parameterize opcode encoding bits for Thumb2 extended...	commit \| commitdiff \| tree
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C/C++ LLVM-based compilers that forbids OOTA behaviors

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