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R600/SI: fmin/fmax_legacy are not associative
2014-12-12 Matt ArsenaultR600/SI: fmin/fmax_legacy are not associative
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2014-12-12 Matt ArsenaultR600/SI: Don't promote f32 select to i32
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2014-12-12 Matt ArsenaultAdd target hook for whether it is profitable to reduce...
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2014-12-11 Matt ArsenaultR600/SI: Handle physical registers in getOpRegClass
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2014-12-11 Matt ArsenaultR600/SI: Don't verify constant bus usage of flag ops
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2014-12-11 Matt ArsenaultTry to include operand counts for mismatches in tablegen.
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2014-12-11 Matt ArsenaultR600/SI: Use unordered equal instructions
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2014-12-11 Matt ArsenaultR600/SI: Make more unordered comparisons legal
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2014-12-11 Matt ArsenaultR600/SI: Use unordered not equal instructions
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2014-12-08 Matt ArsenaultR600/SI: Move continue after checking s_mov_b32.
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2014-12-06 Matt ArsenaultFix typo
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2014-12-04 Matt ArsenaultAllow target to specify prefix for labels
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2014-12-03 Matt ArsenaultFix sphinx error from Statepoints.rst
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2014-12-03 Matt ArsenaultR600/SI: Fix SIFixSGPRCopies for copies to physical...
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2014-12-03 Matt ArsenaultR600/SI: Remove incorrect assertion
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2014-12-03 Matt ArsenaultR600/SI: Remove i1 pseudo VALU ops
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2014-12-03 Matt ArsenaultR600/SI: Fix suspicious indexing
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2014-12-03 Matt ArsenaultR600/SI: Fix running SILowerI1Copies a second time
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2014-12-03 Matt ArsenaultR600/SI: Fix live range error hidden by SIFoldOperands
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2014-12-03 Matt ArsenaultR600/SI: Change mubuf offsets to print as decimal
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2014-12-02 Matt ArsenaultR600: Cleanup some tests and add missing testcases
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2014-12-01 Matt ArsenaultR600/SI: Various instruction format bit test cleanups
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2014-11-28 Matt ArsenaultR600/SI: Fix assertion on sign extend of 3 vectors
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2014-11-26 Matt ArsenaultR600/SI: Use ZeroOrNegativeOneBooleanContent
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2014-11-26 Matt ArsenaultR600/SI: Create e64 versions of and/or/xor in SILowerI1Copies
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2014-11-25 Matt ArsenaultR600/SI: Only use one DEBUG()
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2014-11-25 Matt ArsenaultR600/SI: Fix allocating flat_scr_lo / flat_scr_hi
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2014-11-24 Matt ArsenaultBug 21610: Canonicalize min/max fcmp selects to use...
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2014-11-24 Matt ArsenaultConvert test to FileCheck and use CHECK-LABEL
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2014-11-23 Matt ArsenaultR600: Fix extloads of i1 on R600/Evergreen
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2014-11-23 Matt ArsenaultR600: Fix assert on copy of an i1 on pre-SI
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2014-11-23 Matt ArsenaultR600/SI: Add additional tests for i1 loads
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2014-11-23 Matt ArsenaultR600/SI: Fix broken check lines and modernize prefixes
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2014-11-23 Matt ArsenaultR600/SI: Fix missing -verify-machineinstrs on a test
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2014-11-19 Matt ArsenaultR600/SI: Implement areMemAccessesTriviallyDisjoint
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2014-11-18 Matt ArsenaultR600/SI: Set hasSideEffects = 0 on load and store instructions.
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2014-11-18 Matt ArsenaultR600/SI: Move SIFixSGPRCopies to inst selector passes
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2014-11-17 Matt ArsenaultR600/SI: Don't copy flags when extracting subreg
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2014-11-17 Matt ArsenaultR600/SI: Assume SIFixSGPRCopies makes changes
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2014-11-15 Matt ArsenaultR600: Permute operands when selecting legacy min/max
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2014-11-14 Matt ArsenaultR600/SI: Combine min3/max3 instructions
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2014-11-14 Matt ArsenaultR600/SI: Fix verifier error from a branch on IMPLICIT_DEF
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2014-11-14 Matt ArsenaultFix unused variable warning without asserts
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2014-11-14 Matt ArsenaultR600/SI: Match integer min / max instructions
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2014-11-14 Matt ArsenaultR600/SI: Use S_BFE_I64 for 64-bit sext_inreg
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2014-11-14 Matt ArsenaultR600/SI: Make constant array static
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2014-11-13 Matt ArsenaultR600/SI: Fix fmin_legacy / fmax_legacy matching for SI
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2014-11-13 Matt ArsenaultR600/SI: Use s_movk_i32
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2014-11-13 Matt ArsenaultR600/SI: Fix definition for s_cselect_b32
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2014-11-13 Matt ArsenaultR600: Fix assert on empty function
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2014-11-13 Matt ArsenaultR600: Error on initializer for LDS.
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2014-11-13 Matt ArsenaultR600/SI: Get rid of FCLAMP_SI pseudo
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2014-11-13 Matt ArsenaultR600/SI: Allow commuting with src2_modifiers
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2014-11-13 Matt ArsenaultR600/SI: Allow commuting some 3 op instructions
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2014-11-11 Matt ArsenaultMake TreePattern::error use Twine
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2014-11-08 Matt ArsenaultR600/SI: Fix broken check prefixes in test
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2014-11-07 Matt ArsenaultR600: Remove unused define
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2014-11-06 Matt ArsenaultRemove unnecessary .c_str() when implicitly converting...
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2014-11-05 Matt ArsenaultR600/SI: Fix omod display for VOP3b
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2014-11-05 Matt ArsenaultR600/SI: Add testcase I forgot to commit from months ago
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2014-11-05 Matt ArsenaultR600/SI: Move all rsrc building functions to SIISelLowering
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2014-11-05 Matt ArsenaultR600/SI: Remove SI_ADDR64_RSRC
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2014-11-05 Matt ArsenaultFix broken C++ mode comment
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2014-11-04 Matt ArsenaultR600/SI: Rename div_scale dest operands to match documentation
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2014-11-02 Matt ArsenaultR600: Don't unnecessarily repeat the register class
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2014-11-02 Matt ArsenaultR600/SI: Use REG_SEQUENCE instead of INSERT_SUBREGs
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2014-11-02 Matt ArsenaultSupport REG_SEQUENCE in tablegen.
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2014-11-02 Matt ArsenaultFix typo
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2014-11-02 Matt ArsenaultFix missing C++ mode comment
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2014-10-24 Matt ArsenaultFix copy paste comment
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2014-10-22 Matt ArsenaultFix number of operands in documentation for minnum...
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2014-10-22 Matt ArsenaultR600/SI: Add another failing testcase for i1 copies
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2014-10-22 Matt ArsenaultR600/SI: Add failing testcase reduced from OpenCV
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2014-10-22 Matt ArsenaultFix typo
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2014-10-22 Matt ArsenaultTry to fix documentation bot warning
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2014-10-21 Matt ArsenaultAdd minnum / maxnum codegen
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2014-10-21 Matt ArsenaultAdd minnum / maxnum intrinsics
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2014-10-21 Matt ArsenaultR600/SI: Add missing parameter to div_fmas intrinsic
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2014-10-21 Matt ArsenaultR600: Use default GlobalDirective
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2014-10-21 Matt ArsenaultR600/SI: Add pattern for bswap
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2014-10-17 Matt ArsenaultR600/SI: Remove redundant setting of instruction bits
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2014-10-17 Matt ArsenaultFix typo
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2014-10-17 Matt ArsenaultR600/SI: Also check for FPImm literal constants
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2014-10-17 Matt ArsenaultR600/SI: Allow commuting with source modifiers
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2014-10-17 Matt ArsenaultR600/SI: Simplify code with hasModifiersSet
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2014-10-17 Matt ArsenaultR600/SI: Fix general commuting breaking src mods
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2014-10-17 Matt ArsenaultR600/SI: Cleanup code with ChangeToFPImmediate
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2014-10-17 Matt ArsenaultR600/SI: Allow comuting fp immediates
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2014-10-17 Matt ArsenaultR600/SI: Use early return instead of checking condition...
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2014-10-17 Matt ArsenaultR600/SI: Use complex pattern for MUBUF load patterns.
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2014-10-17 Matt ArsenaultR600/SI: Remove SI_BUFFER_RSRC pseudo
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2014-10-17 Matt ArsenaultR600/SI: Simplify debug printing
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2014-10-16 Matt ArsenaultR600/SI: Remove another VALU pattern
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2014-10-16 Matt ArsenaultR600/SI: Remove unnecessary VALU patterns
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2014-10-16 Matt ArsenaultR600: Fix nonsensical implementation of computeKnownBits...
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2014-10-16 Matt ArsenaultR600: Remove dead function
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2014-10-15 Matt ArsenaultR600: Remove unnecessary part of computeKnownBitsForTargetNode
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2014-10-15 Matt ArsenaultMove variable down to use
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2014-10-15 Matt ArsenaultR600/SI: Also try to use 0 base for misaligned 8-byte...
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2014-10-15 Matt ArsenaultR600: Fix miscompiles when BFE has multiple uses
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C/C++ LLVM-based compilers that forbids OOTA behaviors