Handle the case of a tail recursion in which the tail call is followed
[oota-llvm.git] / test / CodeGen /
2010-06-21 Kalle RaiskilaFix lowering of VECTOR_SHUFFLE on SPU. Old algorithm
2010-06-20 Evan ChengFix a crash caused by dereference of MBB.end(). rdar...
2010-06-19 Dan GohmanInclude the use kind along with the expression in the...
2010-06-19 Evan ChengDisable sibcall optimization for Thumb1 for now since...
2010-06-18 Evan ChengMove ARM if-conversion before post-ra scheduling.
2010-06-18 Evan ChengAllow ARM if-converter to be run after post allocation...
2010-06-18 Jakob Stoklund OlesenTwoAddressInstructionPass::CoalesceExtSubRegs can inser...
2010-06-18 Evan ChengFix an inverted condition.
2010-06-18 Jakob Stoklund OlesenWhen using ADDri to get the address of a stack object...
2010-06-18 Dale JohannesenEnable tail calls on ARM by default, with some
2010-06-18 Jakob Stoklund OlesenTreat the ARM inline asm {cc} constraint as a physreg...
2010-06-18 Dan GohmanDon't maintain a set of deleted nodes; instead, use...
2010-06-18 Dan GohmanFold the ShrinkDemandedOps pass into the regular DAGCom...
2010-06-18 Dan GohmanMake this test less fragile.
2010-06-17 Rafael EspindolaRemove arm_apcscc from the test files. It is the defaul...
2010-06-16 Jakob Stoklund OlesenAllow a register to be redefined multiple times in...
2010-06-16 Jim Grosbachmodify so the test doesn't drop an output file in the...
2010-06-16 Evan ChengMake post-ra scheduling, anti-dep breaking, and registe...
2010-06-15 Bill WendlingCreate a more targeted fix for not sinking instructions...
2010-06-15 Jakob Stoklund OlesenRemove the local register allocator.
2010-06-15 Rafael EspindolaSet the mtriple in some tests so that they use AAPCS.
2010-06-15 Mon P WangFixed vector widening of binary instructions that can...
2010-06-15 Chris Lattnerfix fastisel to handle GS and FS relative pointers...
2010-06-15 Rafael EspindolaRemove the arm_aapcscc marker from the tests. It is...
2010-06-15 Jakob Stoklund OlesenAvoid processing early clobbers twice in RegAllocFast.
2010-06-15 Jakob Stoklund OlesenAdd CoalescerPair helper class.
2010-06-15 Bob WilsonGeneralize the pre-coalescing of extract_subregs feedin...
2010-06-14 Chris Lattnerapparently lots of dupes.
2010-06-14 Chris Lattnerfix a nasty bug where we were not treating available_ex...
2010-06-14 Chris Lattnerremove old test.
2010-06-14 Chris Lattnerrename test
2010-06-11 Bob WilsonAdd a missing bitcast. This code used to only handle...
2010-06-09 Bill WendlingTestcase for r105741.
2010-06-09 Jakob Stoklund OlesenMark physregs defined by inline asm as implicit.
2010-06-09 Kalle RaiskilaFix SPU to cope with vector insertelement to an undef...
2010-06-09 Kalle RaiskilaHandle loading from/storing to undef pointers on SPU...
2010-06-05 Dan GohmanLSR needs to remember inserted instructions even in...
2010-06-04 Evan ChengRe-apply 105308 with fix.
2010-06-04 Dale JohannesenMore tail call removal.
2010-06-04 Dan GohmanFix normalization and de-normalization of non-affine...
2010-06-04 Mon P WangFixed a bug during widening where we would avoid legali...
2010-06-04 Dale JohannesenRemove more tail calls.
2010-06-04 Dale JohannesenRemove a tail call, and move some CHECKs to the
2010-06-04 Dan GohmanThis test doesn't need the ssp attribute.
2010-06-04 Dale JohannesenRemove tail call. A tail call version will follow.
2010-06-03 Dale JohannesenRemove tail call to preserve this test. A tail
2010-06-03 Dale JohannesenMake this test not use tail calls. A tail call
2010-06-03 Dan GohmanFix SimplifyDemandedBits' AssertZext logic to demand...
2010-06-03 Bob WilsonRevert 105308.
2010-06-03 Bill WendlingMachine sink could potentially sink instructions into...
2010-06-03 Eric ChristopherOne underscore, not two.
2010-06-03 Eli FriedmanImplement expansion in type legalization for add/sub...
2010-06-02 Evan ChengEnable machine cse of instructions which define physica...
2010-06-01 Dan GohmanFill in missing support for ISD::FEXP, ISD::FPOWI,...
2010-06-01 Kalle RaiskilaFix handling of 'load' nodes.
2010-05-31 Chris Lattnerfix PR6623: when optimizing for size, don't inline...
2010-05-31 Chris Lattnerupgrade and filecheckize this test.
2010-05-29 Evan ChengRemove schedule-livein-copies. It's not being used.
2010-05-29 Evan ChengFix PR7193: if sibling call address can take a register...
2010-05-28 Evan ChengFix some latency computation bugs: if the use is not...
2010-05-28 Jakob Stoklund OlesenFix more tests that depended on the default register...
2010-05-28 Dan GohmanEliminate the restriction that the array size in an...
2010-05-27 Jakob Stoklund OlesenAdd a -regalloc=default option that chooses a register...
2010-05-27 Evan Chengllvm can't correctly support 'H', 'Q' and 'R' modifiers...
2010-05-26 Devang PatelSimplify. Eliminate unneeded debug_loc entry.
2010-05-26 Devang PatelUpdate debug info when live-in reg is copied into a...
2010-05-26 Dale JohannesenTestcase for 104624/104619/PR7191/8023512.
2010-05-25 Dale JohannesenRemoving test; Chris thinks it's better to have the
2010-05-25 Dale JohannesenFix another variant of PR 7191. Also add a testcase
2010-05-24 Bob WilsonThumb2 RSBS instructions were being printed without...
2010-05-24 Evan ChengLR is in GPR, not tGPR even in Thumb1 mode.
2010-05-22 Evan ChengImplement @llvm.returnaddress. rdar://8015977.
2010-05-22 Eric ChristopherThis test is darwin only. Make it so(tm).
2010-05-22 Bob WilsonRecognize more BUILD_VECTORs and VECTOR_SHUFFLEs that...
2010-05-22 Eric ChristopherAdd full bss data support for darwin tls variables.
2010-05-21 Bob WilsonChange CodeGen/ARM/2009-11-02-NegativeLane.ll to use...
2010-05-21 Chris Lattnernow that fp reg kill insertion stuff happens as a separate
2010-05-21 Jakob Stoklund OlesenTeach VirtRegRewriter to handle spilling in instruction...
2010-05-21 Dale JohannesenFix i64->f64 conversion, x86-64, -no-sse. A bit
2010-05-21 Evan ChengChange ARM scheduling default to list-hybrid if the...
2010-05-20 Dan GohmanWhen canonicalizing icmp operand order to put the loop...
2010-05-20 Bob WilsonHandle Neon v2f64 and v2i64 vector shuffles as register...
2010-05-19 Dan GohmanTeach LSR how to cope better with unrolled loops on...
2010-05-19 Jakob Stoklund OlesenTwoAddressInstructionPass doesn't really know how to...
2010-05-19 Bob WilsonTestcase to go with 104141.
2010-05-19 Evan Chengt2LEApcrel and tLEApcrel are re-materializable. This...
2010-05-19 Evan ChengIntrinsics which do a vector compare (results are all...
2010-05-18 Jakob Stoklund OlesenRemember to update VirtRegLastUse when spilling without...
2010-05-18 Dan GohmanWhen converting a test to a cmp to fold a load, use...
2010-05-18 Evan ChengSink dag combine's post index load / store code that...
2010-05-18 Evan ChengFix PR7162: Use source register classes and sub-indices...
2010-05-18 Daniel DunbarMC/X86: Implement custom lowering to make sure we match...
2010-05-18 Evan ChengFIX PR7158. SimplifyVBinOp was asserting when it fails...
2010-05-17 Evan ChengFix PR7175. Insert copies of a REG_SEQUENCE source...
2010-05-17 Evan ChengFix PR7156. If the sources of a REG_SEQUENCE are all...
2010-05-17 Evan ChengCareful with reg_sequence coalescing to not to overwrit...
2010-05-17 Evan ChengTurn on -neon-reg-sequence by default.
2010-05-17 Jakob Stoklund OlesenAvoid allocating the same physreg to multiple virtregs...
2010-05-17 Jakob Stoklund OlesenOnly use clairvoyance when defining a register, and...
2010-05-16 Dale JohannesenRemoving as part of previous reversion.
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