Remove access to the DataLayout in the TargetMachine
[oota-llvm.git] / test / CodeGen /
2015-07-24 Luke Cheeseman[ARM] - Fix lowering of shufflevectors in AArch32
2015-07-24 Luke CheesemanWhen lowering vector shifts a check is performed to...
2015-07-24 Eric ChristopherClean up function attributes on PPC fast-isel tests.
2015-07-23 Alex LorenzMIR Serialization: Serialize the '.cfi_offset' CFI...
2015-07-23 JF BastienWebAssembly: test that valid -mcpu flags are accepted.
2015-07-23 Sanjay Patelfix crash in machine trace metrics due to processing...
2015-07-23 Weiming ZhaoThis patch eanble register coalescing to coalesce the...
2015-07-23 Michael Kuperstein[X86] Allow load folding into PUSH instructions
2015-07-23 Elena DemikhovskyX86: Fixed assertion failure in 32-bit mode
2015-07-23 Chandler CarruthRevert r242990: "AVX-512: Implemented encoding , DAG...
2015-07-23 Igor BregerAVX-512: Implemented encoding , DAG lowering and intrin...
2015-07-23 Igor BregerAVX : Fix ISA disabling in case AVX512VL , some instruc...
2015-07-22 JF BastienWebAssembly: basic bitcode → assembly CodeGen test
2015-07-22 Alex LorenzMIR Serialization: Serialize the machine instruction...
2015-07-22 Alex LorenzMIR Serialization: Serialize the metadata machine operands.
2015-07-22 Quentin Colombet[ARM] Make the frame lowering code ready for shrink...
2015-07-22 Asaf Badouh[X86][AVX512] add reduce/range/scalef/rndScale
2015-07-22 Elena DemikhovskyAVX-512: Added intrinsics for VCVT* instructions.
2015-07-22 Jingyue Wu[BranchFolding] do not iterate the aliases of virtual...
2015-07-21 Alex LorenzMIR Serialization: Start serializing the CFI operands...
2015-07-21 Bill Schmidt[PPC64LE] More vector swap optimization TLC
2015-07-21 Alex LorenzMIR Serialization: Serialize the external symbol machin...
2015-07-21 Igor BregerAVX512 : Implemented VPMADDUBSW and VPMADDWD instruction ,
2015-07-21 Akira Hatanaka[ARM] Define subtarget feature "reserve-r9", which...
2015-07-21 Matthias BraunARMLoadStoreOpt: Merge subs/adds into LDRD/STRD; Factor...
2015-07-21 Matthias BraunARMLoadStoreOptimizer: Create LDRD/STRD on thumb2
2015-07-20 Akira HatanakaRevert r242737.
2015-07-20 Akira Hatanaka[ARM] Define subtarget feature "reserve-r9", which...
2015-07-20 Matthias BraunRevert "ARMLoadStoreOptimizer: Create LDRD/STRD on...
2015-07-20 Matthias BraunRevert "ARMLoadStoreOpt: Merge subs/adds into LDRD...
2015-07-20 JF BastienTargets: commonize some stack realignment code
2015-07-20 Matthias BraunAArch64: Add aditional Cyclone macroop fusion opportunities
2015-07-20 Matthias BraunMachineScheduler: Restrict macroop fusion to data-depen...
2015-07-20 Quentin Colombet[ARM] Refactor the prologue/epilogue emission to be...
2015-07-20 Jingyue Wu[NVPTX] make load on global readonly memory to use ldg
2015-07-20 Krzysztof Parzyszek[Hexagon] Generate MUX from conditional transfers when...
2015-07-20 Alex LorenzMIR Serialization: Initial serialization of machine...
2015-07-20 Sanjoy Das[ImplicitNullChecks] Work with implicit defs.
2015-07-20 Alex LorenzMIR Parser: Add support for quoted named global value...
2015-07-20 Chad Rosier[AArch64] Change EON pattern to match more often.
2015-07-20 Bill SchmidtAdd missing test for r242296 (vec_sld)
2015-07-20 Tom StellardAMDGPU/SI: Add VI patterns to select FLAT instructions...
2015-07-19 Simon Pilgrim[X86][SSE] Tidied up vector CTLZ/CTTZ. NFCI.
2015-07-19 Elena DemikhovskyAVX-512: Floating point conversions for SKX - DAG Lowering.
2015-07-18 Simon Pilgrim[X86][SSE] Added additional fp/int tests.
2015-07-18 Simon PilgrimRefreshed tests.
2015-07-18 Simon PilgrimRefreshed tests and reordered in descending integer...
2015-07-18 Simon PilgrimTidyup shufflevector calls - don't repeat inputs if...
2015-07-17 Matthias BraunARM: Enable MachineScheduler and disable PostRASchedule...
2015-07-17 Matthias BraunARM: Add scheduling information for LDRLIT instructions...
2015-07-17 Quentin Colombet[RAGreedy] Add an experimental deferred spilling feature.
2015-07-17 Alex LorenzMIR Parser: Allow the dollar characters in all of the...
2015-07-17 Adam NemetRevert "ARM: Enable MachineScheduler and disable PostRA...
2015-07-17 Eli BenderskyUse inbounds GEPs for memcpy and memset lowering
2015-07-17 John BrawnMake global aliases have symbol size equal to their...
2015-07-17 Matthias BraunARM: Enable MachineScheduler and disable PostRASchedule...
2015-07-17 Matt ArsenaultOnly do fmul (fadd x, x), c combine if the fadd only...
2015-07-17 Rafael EspindolaUse small encodings for constants when possible.
2015-07-17 Alex LorenzMIR Serialization: Serialize the frame setup machine...
2015-07-16 Alex LorenzMIR Serialization: Serialize the frame index machine...
2015-07-16 Matthias BraunArm: Don't define a label twice with two setjmps in...
2015-07-16 Matthias BraunFix __builtin_setjmp in combination with sjlj exception...
2015-07-16 Tim NorthoverAArch64: make inexact signalling on round Darwin-specific
2015-07-16 Simon Pilgrim[X86][SSE] Added nounwind attribute to vector shift...
2015-07-16 Bill Schmidt[PowerPC] v4i32 is a VSRCRegClass
2015-07-16 Simon Pilgrim[X86][SSE] Updated vector conversion test names.
2015-07-16 Matthias BraunAArch64: Implement conditional compare sequence matching.
2015-07-16 Tom StellardAMDPGU/SI: Negative offsets aren't allowed in MUBUF...
2015-07-16 Pete CooperRevert "Add missing load/store flags to thumb2 instruct...
2015-07-16 Eli BenderskyCorrect lowering of memmove in NVPTX
2015-07-16 James Molloy[Codegen] Add intrinsics 'absdiff' and corresponding...
2015-07-16 Michael Kuperstein[X86] Test for r242395 (Fix emitPrologue() to make...
2015-07-16 Michael Kuperstein[X86] Reapply r240257 : "Allow more call sequences...
2015-07-16 Reid KlecknerRevert "[X86] Allow more call sequences to use push...
2015-07-16 Alex LorenzFix broken testcase from r242358.
2015-07-16 Akira Hatanaka[ARM] Define a subtarget feature that is used to avoid...
2015-07-15 Alex LorenzMIR Serialization: Serialize the jump table index operands.
2015-07-15 Alex LorenzMIR Serialization: Serialize the jump table info.
2015-07-15 Alex LorenzMIR Serialization: Serialize references from the stack...
2015-07-15 Bruno Cardoso LopesRevert "Look through PHIs to find additional register...
2015-07-15 Pete CooperAdd missing load/store flags to thumb2 instructions.
2015-07-15 Bruno Cardoso LopesLook through PHIs to find additional register sources
2015-07-15 Alexey Bataev[SDAG] Optimize unordered comparison in soft-float...
2015-07-15 Hal Finkel[PowerPC] Use the MachineCombiner to reassociate fadd...
2015-07-15 Simon Pilgrim[X86][SSE] Added i686/SSE2 vector shift tests.
2015-07-15 Igor BregerAVX : Fix ISA disabling in case AVX512VL , some instruc...
2015-07-14 JF BastienWebAssembly: fix build breakage.
2015-07-14 Hal Finkel[PowerPC] Support symbolic targets in patchpoints
2015-07-14 Hal Finkel[PowerPC] Use the ABI indirect-call protocol for patchp...
2015-07-14 Alex LorenzMIR Serialization: Serialize the machine basic block...
2015-07-14 Hal Finkel[PowerPC] Fix the PPCInstrInfo::getInstrLatency impleme...
2015-07-14 Krzysztof Parzyszek[Hexagon] Generate instructions for operations on predi...
2015-07-14 Keno Fischer[CodeGen] Force emission of personality directive if...
2015-07-14 Matt ArsenaultAMDGPU: Avoid using 64-bit shift for i64 (shl x, 32)
2015-07-14 Matt ArsenaultAMDGPU/SI: Fix read2 merging into a super register.
2015-07-14 Nemanja IvanovicAdd missing builtins to the PPC back end for ABI compli...
2015-07-14 Tim NorthoverARM: add at least one real test for r242123.
2015-07-14 Matthias BraunPrologEpilogInserter: Rewrite API to determine callee...
2015-07-14 Krzysztof Parzyszek[Hexagon] Generate "extract" instructions more aggressively
2015-07-14 Tom StellardAMDGPU/SI: Add support for shrinking v_cndmask_b32_e32...
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