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[WebAssembly] Don't perform the returned-argument optimization on constants.
[oota-llvm.git]
/
test
/
CodeGen
/
ARM
/
vext.ll
2015-09-01
Silviu Baranga
[ARM][AArch64] Turn on by default interleaved access...
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2015-07-24
Luke Cheeseman
[ARM] - Fix lowering of shufflevectors in AArch32
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2015-02-27
David Blaikie
[opaque pointer type] Add textual IR support for explic...
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2014-04-03
Saleem Abdulrasool
ARM: fixup more tests to specify the target more explicitly
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2013-07-13
Stephen Lin
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL...
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2013-07-08
Jim Grosbach
ARM: Improve codegen for generic vselect.
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2012-11-02
Quentin Colombet
Vext Lowering was missing opportunities
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2011-11-14
Jim Grosbach
ARM VLDR/VSTR instructions don't need a size suffix.
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2011-10-14
Eli Friedman
Add missing correctness check to ARMTargetLowering...
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2011-03-15
Bill Wendling
Some minor cleanups based on feedback.
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2011-03-14
Bill Wendling
Generate a VTBL instruction instead of a series of...
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2011-01-07
Bob Wilson
Lower some BUILD_VECTORS using VEXT+shuffle.
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2010-08-17
Bob Wilson
Allow more cases of undef shuffle indices and add tests...
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2010-06-17
Rafael Espindola
Remove arm_apcscc from the test files. It is the defaul...
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2009-09-09
Dan Gohman
Eliminate more uses of llvm-as and llvm-dis.
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2009-08-21
Bob Wilson
Add some tests for vext.16 and vext.32.
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2009-08-19
Bob Wilson
Add support for Neon VEXT (vector extract) shuffles.
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