ARM: fixup more tests to specify the target more explicitly
authorSaleem Abdulrasool <compnerd@compnerd.org>
Thu, 3 Apr 2014 16:01:44 +0000 (16:01 +0000)
committerSaleem Abdulrasool <compnerd@compnerd.org>
Thu, 3 Apr 2014 16:01:44 +0000 (16:01 +0000)
commit27b1252c132e93ee98941b1b185795cb358c61e2
tree2f4646a3a833a8256c94b63b04e0323ed250528a
parentd5561bb1f0fe5c67af59d79a6961ebf4b3c7b953
ARM: fixup more tests to specify the target more explicitly

This changes the tests that were targeting ARM EABI to explicitly specify the
environment rather than relying on the default.  This breaks with the new
Windows on ARM support when running the tests on Windows where the default
environment is no longer EABI.

Take the opportunity to avoid a pointless redirect (helps when trying to debug
with providing a command line invocation which can be copy and pasted) and
removing a few greps in favour of FileCheck.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541 91177308-0d34-0410-b5e6-96231b3b80d8
222 files changed:
test/CodeGen/ARM/2009-09-13-InvalidSuperReg.ll
test/CodeGen/ARM/2009-09-24-spill-align.ll
test/CodeGen/ARM/2010-03-04-stm-undef-addr.ll
test/CodeGen/ARM/2010-04-09-NeonSelect.ll
test/CodeGen/ARM/2010-04-14-SplitVector.ll
test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll
test/CodeGen/ARM/2010-05-21-BuildVector.ll
test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll
test/CodeGen/ARM/2010-06-29-SubregImpDefs.ll
test/CodeGen/ARM/2011-10-26-memset-with-neon.ll
test/CodeGen/ARM/2011-11-07-PromoteVectorLoadStore.ll
test/CodeGen/ARM/2011-11-09-BitcastVectorDouble.ll
test/CodeGen/ARM/2011-11-09-IllegalVectorFPIntConvert.ll
test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll
test/CodeGen/ARM/2012-04-10-DAGCombine.ll
test/CodeGen/ARM/2012-05-04-vmov.ll
test/CodeGen/ARM/2012-05-10-PreferVMOVtoVDUP32.ll
test/CodeGen/ARM/2012-08-23-legalize-vmull.ll
test/CodeGen/ARM/2012-09-18-ARMv4ISelBug.ll
test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv.ll
test/CodeGen/ARM/2012-09-25-InlineAsmScalarToVectorConv2.ll
test/CodeGen/ARM/2014-01-09-pseudo_expand_implicit_reg.ll
test/CodeGen/ARM/DbgValueOtherTargets.test
test/CodeGen/ARM/a15-mla.ll
test/CodeGen/ARM/a15.ll
test/CodeGen/ARM/addrmode.ll
test/CodeGen/ARM/addrspacecast.ll
test/CodeGen/ARM/arm-and-tst-peephole.ll
test/CodeGen/ARM/arm-asm.ll
test/CodeGen/ARM/arm-modifier.ll
test/CodeGen/ARM/arm-negative-stride.ll
test/CodeGen/ARM/atomicrmw_minmax.ll
test/CodeGen/ARM/bfc.ll
test/CodeGen/ARM/bfi.ll
test/CodeGen/ARM/bfx.ll
test/CodeGen/ARM/bic.ll
test/CodeGen/ARM/bits.ll
test/CodeGen/ARM/call.ll
test/CodeGen/ARM/carry.ll
test/CodeGen/ARM/clz.ll
test/CodeGen/ARM/compare-call.ll
test/CodeGen/ARM/ctz.ll
test/CodeGen/ARM/dyn-stackalloc.ll
test/CodeGen/ARM/extload-knownzero.ll
test/CodeGen/ARM/extloadi1.ll
test/CodeGen/ARM/fadds.ll
test/CodeGen/ARM/fdivs.ll
test/CodeGen/ARM/fixunsdfdi.ll
test/CodeGen/ARM/fmacs.ll
test/CodeGen/ARM/fmdrr-fmrrd.ll
test/CodeGen/ARM/fmscs.ll
test/CodeGen/ARM/fmuls.ll
test/CodeGen/ARM/fnegs.ll
test/CodeGen/ARM/fnmacs.ll
test/CodeGen/ARM/fnmscs.ll
test/CodeGen/ARM/fnmul.ll
test/CodeGen/ARM/fnmuls.ll
test/CodeGen/ARM/fold-const.ll
test/CodeGen/ARM/formal.ll
test/CodeGen/ARM/fp-arg-shuffle.ll
test/CodeGen/ARM/fp-fast.ll
test/CodeGen/ARM/fp.ll
test/CodeGen/ARM/fp_convert.ll
test/CodeGen/ARM/fpcmp-opt.ll
test/CodeGen/ARM/fpcmp.ll
test/CodeGen/ARM/fpconsts.ll
test/CodeGen/ARM/fpconv.ll
test/CodeGen/ARM/fpmem.ll
test/CodeGen/ARM/fpow.ll
test/CodeGen/ARM/fptoint.ll
test/CodeGen/ARM/fsubs.ll
test/CodeGen/ARM/hello.ll
test/CodeGen/ARM/iabs.ll
test/CodeGen/ARM/ifconv-kills.ll
test/CodeGen/ARM/ifcvt1.ll
test/CodeGen/ARM/ifcvt2.ll
test/CodeGen/ARM/ifcvt3.ll
test/CodeGen/ARM/ifcvt4.ll
test/CodeGen/ARM/ifcvt9.ll
test/CodeGen/ARM/illegal-vector-bitcast.ll
test/CodeGen/ARM/imm.ll
test/CodeGen/ARM/indirect-reg-input.ll
test/CodeGen/ARM/inlineasm-imm-arm.ll
test/CodeGen/ARM/inlineasm.ll
test/CodeGen/ARM/inlineasm2.ll
test/CodeGen/ARM/inlineasm3.ll
test/CodeGen/ARM/inlineasm4.ll
test/CodeGen/ARM/insn-sched1.ll
test/CodeGen/ARM/integer_insertelement.ll
test/CodeGen/ARM/ispositive.ll
test/CodeGen/ARM/large-stack.ll
test/CodeGen/ARM/ldr.ll
test/CodeGen/ARM/ldr_ext.ll
test/CodeGen/ARM/ldr_frame.ll
test/CodeGen/ARM/ldr_post.ll
test/CodeGen/ARM/ldr_pre.ll
test/CodeGen/ARM/load.ll
test/CodeGen/ARM/long-setcc.ll
test/CodeGen/ARM/long.ll
test/CodeGen/ARM/longMAC.ll
test/CodeGen/ARM/long_shift.ll
test/CodeGen/ARM/lsr-scale-addr-mode.ll
test/CodeGen/ARM/mem.ll
test/CodeGen/ARM/mls.ll
test/CodeGen/ARM/mul_const.ll
test/CodeGen/ARM/mulhi.ll
test/CodeGen/ARM/mvn.ll
test/CodeGen/ARM/neon_arith1.ll
test/CodeGen/ARM/neon_cmp.ll
test/CodeGen/ARM/neon_div.ll
test/CodeGen/ARM/neon_fpconv.ll
test/CodeGen/ARM/neon_ld1.ll
test/CodeGen/ARM/neon_ld2.ll
test/CodeGen/ARM/neon_minmax.ll
test/CodeGen/ARM/neon_shift.ll
test/CodeGen/ARM/neon_vabs.ll
test/CodeGen/ARM/optselect-regclass.ll
test/CodeGen/ARM/pack.ll
test/CodeGen/ARM/phi.ll
test/CodeGen/ARM/popcnt.ll
test/CodeGen/ARM/prefetch.ll
test/CodeGen/ARM/ret0.ll
test/CodeGen/ARM/ret_arg1.ll
test/CodeGen/ARM/ret_arg2.ll
test/CodeGen/ARM/ret_arg3.ll
test/CodeGen/ARM/ret_arg4.ll
test/CodeGen/ARM/ret_arg5.ll
test/CodeGen/ARM/ret_f32_arg2.ll
test/CodeGen/ARM/ret_f32_arg5.ll
test/CodeGen/ARM/ret_f64_arg2.ll
test/CodeGen/ARM/ret_f64_arg_reg_split.ll
test/CodeGen/ARM/ret_f64_arg_split.ll
test/CodeGen/ARM/ret_f64_arg_stack.ll
test/CodeGen/ARM/ret_i128_arg2.ll
test/CodeGen/ARM/ret_i64_arg2.ll
test/CodeGen/ARM/ret_i64_arg3.ll
test/CodeGen/ARM/ret_i64_arg_split.ll
test/CodeGen/ARM/ret_void.ll
test/CodeGen/ARM/rev.ll
test/CodeGen/ARM/sbfx.ll
test/CodeGen/ARM/select-imm.ll
test/CodeGen/ARM/select-undef.ll
test/CodeGen/ARM/select.ll
test/CodeGen/ARM/setcc-sentinals.ll
test/CodeGen/ARM/smul.ll
test/CodeGen/ARM/stack-frame.ll
test/CodeGen/ARM/str_post.ll
test/CodeGen/ARM/str_pre.ll
test/CodeGen/ARM/str_trunc.ll
test/CodeGen/ARM/sub.ll
test/CodeGen/ARM/sxt_rot.ll
test/CodeGen/ARM/taildup-branch-weight.ll
test/CodeGen/ARM/trunc_ldr.ll
test/CodeGen/ARM/truncstore-dag-combine.ll
test/CodeGen/ARM/tst_teq.ll
test/CodeGen/ARM/twoaddrinstr.ll
test/CodeGen/ARM/unaligned_load_store.ll
test/CodeGen/ARM/unaligned_load_store_vector.ll
test/CodeGen/ARM/unord.ll
test/CodeGen/ARM/uxt_rot.ll
test/CodeGen/ARM/vaba.ll
test/CodeGen/ARM/vabd.ll
test/CodeGen/ARM/vabs.ll
test/CodeGen/ARM/vadd.ll
test/CodeGen/ARM/vargs.ll
test/CodeGen/ARM/vbits.ll
test/CodeGen/ARM/vbsl.ll
test/CodeGen/ARM/vceq.ll
test/CodeGen/ARM/vcge.ll
test/CodeGen/ARM/vcgt.ll
test/CodeGen/ARM/vcnt.ll
test/CodeGen/ARM/vcombine.ll
test/CodeGen/ARM/vcvt.ll
test/CodeGen/ARM/vdup.ll
test/CodeGen/ARM/vext.ll
test/CodeGen/ARM/vfcmp.ll
test/CodeGen/ARM/vhadd.ll
test/CodeGen/ARM/vhsub.ll
test/CodeGen/ARM/vicmp.ll
test/CodeGen/ARM/vld1.ll
test/CodeGen/ARM/vld2.ll
test/CodeGen/ARM/vld3.ll
test/CodeGen/ARM/vld4.ll
test/CodeGen/ARM/vlddup.ll
test/CodeGen/ARM/vldlane.ll
test/CodeGen/ARM/vminmax.ll
test/CodeGen/ARM/vmla.ll
test/CodeGen/ARM/vmls.ll
test/CodeGen/ARM/vmov.ll
test/CodeGen/ARM/vmul.ll
test/CodeGen/ARM/vneg.ll
test/CodeGen/ARM/vpadal.ll
test/CodeGen/ARM/vpadd.ll
test/CodeGen/ARM/vpminmax.ll
test/CodeGen/ARM/vqadd.ll
test/CodeGen/ARM/vqshl.ll
test/CodeGen/ARM/vqshrn.ll
test/CodeGen/ARM/vqsub.ll
test/CodeGen/ARM/vrec.ll
test/CodeGen/ARM/vrev.ll
test/CodeGen/ARM/vselect_imax.ll
test/CodeGen/ARM/vshift.ll
test/CodeGen/ARM/vshiftins.ll
test/CodeGen/ARM/vshl.ll
test/CodeGen/ARM/vshll.ll
test/CodeGen/ARM/vshrn.ll
test/CodeGen/ARM/vsra.ll
test/CodeGen/ARM/vst1.ll
test/CodeGen/ARM/vst2.ll
test/CodeGen/ARM/vst3.ll
test/CodeGen/ARM/vst4.ll
test/CodeGen/ARM/vstlane.ll
test/CodeGen/ARM/vsub.ll
test/CodeGen/ARM/vtbl.ll
test/CodeGen/ARM/vtrn.ll
test/CodeGen/ARM/vuzp.ll
test/CodeGen/ARM/vzip.ll
test/CodeGen/ARM/weak.ll
test/CodeGen/ARM/weak2.ll
test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s
test/MC/ARM/arm-ldrd.s
test/MC/ARM/thumb2-ldrd.s