Fix PR22179.
[oota-llvm.git] / lib / Target /
2015-01-10 Simon Pilgrim[X86][SSE] Improved (v)insertps shuffle matching
2015-01-10 Hal Finkel[PowerPC] Mark zext of a small scalar load as free
2015-01-10 Justin HibbitsRemove some whitespace.
2015-01-10 Justin HibbitsFully fix Bug #22115.
2015-01-10 Hal Finkel[PowerPC] Readjust the loop unrolling threshold
2015-01-09 Simon Pilgrim[X86][SSE] Avoid vector byte shuffles with zero by...
2015-01-09 Lang HamesRecommit r224935 with a fix for the ObjC++/AArch64...
2015-01-09 Daniel Sanders[mips] Add support for accessing $gp as a named register.
2015-01-09 Hal Finkel[PowerPC] Enable late partial unrolling on the POWER7
2015-01-09 Toma Tabacu[mips] Add comment which explains why we need to change...
2015-01-09 Saleem AbdulrasoolARM: add support for R_ARM_ABS16
2015-01-09 Saleem AbdulrasoolARM: add support for R_ARM_ABS8 relocations
2015-01-09 Hal Finkel[PowerPC] Add a flag for experimenting with subreg...
2015-01-09 Hal Finkel[PowerPC] Fold [sz]ext with fp_to_int lowering where...
2015-01-09 Chandler Carruth[x86] Add a flag to control the vector shuffle legality...
2015-01-08 Hal Finkel[PowerPC] Mark all instructions as non-cheap for Machin...
2015-01-08 Akira Hatanaka[ARM] Fix a bug in constant island pass that was trigge...
2015-01-08 Eric ChristopherMake the TargetMachine in MipsSubtarget a reference...
2015-01-08 Eric ChristopherUpdate include - this class doesn't use the target...
2015-01-08 Eric ChristopherFix a couple of odd formatting issues.
2015-01-08 Eric ChristopherThis routine is in InstrInfo, there's no need to access...
2015-01-08 Ahmed Bougacha[X86] Reflow comment. NFC.
2015-01-08 Justin HibbitsAdd saving and restoring of r30 to the prologue and...
2015-01-08 Kristof BeylsFix large stack alignment codegen for ARM and Thumb2...
2015-01-08 Tom StellardR600/SI: Remove SIISelLowering::legalizeOperands()
2015-01-08 Michael Kuperstein[X86] Don't try to generate direct calls to TLS globals
2015-01-08 Craig Topper[X86] Don't print 'dword ptr' or 'qword ptr' on the...
2015-01-08 Ahmed Bougacha[SelectionDAG] Allow targets to specify legality of...
2015-01-08 Matthias BraunX86: VZeroUpperInserter: shortcut should not trigger...
2015-01-07 Tom StellardR600/SI: Commute instructions to enable more folding...
2015-01-07 Tom StellardR600/SI: Only fold immediates that have one use
2015-01-07 Ahmed Bougacha[CodeGen] Use MVT iterator_ranges in legality loops...
2015-01-07 Tom StellardR600/SI: Remove VReg_32 register class
2015-01-07 Colin LeMahieu[Hexagon] Fix 225372 USR register is not fully complete...
2015-01-07 Colin LeMahieu[Hexagon] Adding floating point classification and...
2015-01-07 Tom StellardR600/SI: Add a V_MOV_B64 pseudo instruction
2015-01-07 Colin LeMahieu[Hexagon] Adding encodings for v5 floating point instru...
2015-01-07 Colin LeMahieu[Hexagon] Adding encoding for popcount, fastcorner...
2015-01-07 Tom StellardR600/SI: Teach SIFoldOperands to split 64-bit constants...
2015-01-07 Ahmed Bougacha[X86] Fix 512->256 typo in comments. NFC.
2015-01-07 David MajnemerX86: Allow the stack probe size to be configurable...
2015-01-07 Tom StellardR600/SI: Refactor SIFoldOperands to simplify immediate...
2015-01-07 Ahmed Bougacha[X86] Teach FCOPYSIGN lowering to recognize constant...
2015-01-07 Asiri RathnayakeFix regression in r225266.
2015-01-07 Craig Topper[X86] Merge a switch statement inside a default case...
2015-01-07 Craig Topper[X86] Don't mark the shift by 1 instructions as isConve...
2015-01-07 Craig Topper[X86] Remove some unused TYPE enums from the disassembler.
2015-01-07 Karthik BhatRevert r225165 and r225169
2015-01-07 Tom StellardR600/SI: Add check for amdgcn triple forgotten in r225276.
2015-01-07 Hal Finkel[PowerPC] Transform a README.txt entry into a FIXME
2015-01-06 Lang HamesRevert r224935 "Refactor duplicated code. No intended...
2015-01-06 Matt ArsenaultR600/SI: Add combine for isinfinite pattern
2015-01-06 Matt ArsenaultR600/SI: Pattern match isinf to v_cmp_class instructions
2015-01-06 Matt ArsenaultR600/SI: Add basic DAG combines for fp_class
2015-01-06 Matt ArsenaultR600/SI: Add class intrinsic
2015-01-06 Hal Finkel[PowerPC] Reuse a load operand in int->fp conversions
2015-01-06 Colin LeMahieu[Hexagon] Adding compound jump encodings.
2015-01-06 Tom StellardR600/SI: Insert s_waitcnt before s_barrier instructions.
2015-01-06 Tom StellardR600/SI: Fix dependency calculation for DS writes instr...
2015-01-06 Colin LeMahieu[Hexagon] Adding encoding for misc v4 instructions...
2015-01-06 Colin LeMahieu[Hexagon] Adding encoding information for absolute...
2015-01-06 Tom StellardR600/SI: Add a stub GCNTargetMachine
2015-01-06 Tom StellardR600/SI: Remove MachineFunction dump from AsmPrinter
2015-01-06 Colin LeMahieu[Hexagon] Fix 225267. GP register is not yet fully...
2015-01-06 Colin LeMahieu[Hexagon] Adding dealloc_return encoding and absolute...
2015-01-06 Asiri Rathnayake[ARM] Cleanup so_imm* tblgen defintions
2015-01-06 Craig Topper[X86] Add OpSize32 to XBEGIN_4. Add XBEGIN_2 with OpSize16.
2015-01-06 Craig Topper[X86] Make isel select the 2-byte register form of...
2015-01-06 Hal Finkel[PowerPC] Remove old README.txt entry regarding struct...
2015-01-06 David MajnemerX86: Don't make illegal GOTTPOFF relocations
2015-01-06 Hal Finkel[PowerPC] Add some missing names in getTargetNodeName
2015-01-06 Hal Finkel[PowerPC] Improve int_to_fp(fp_to_int(x)) combining
2015-01-06 Craig Topper[X86] Remove 16-bit and 32-bit offset jump instructions...
2015-01-06 Craig Topper[X86] Make isel select the shorter form of jump instruc...
2015-01-06 Eric ChristopherRemove dead variable.
2015-01-06 Eric ChristopherUse the same call off of the TargetMachine rather than...
2015-01-06 Eric ChristopherRewrite the Mips16HardFloat pass to avoid using the...
2015-01-06 Lang HamesRevert r225048: It broke ObjC on AArch64.
2015-01-06 Brad SmithRemove X86 .quad workaround for buggy GNU assembler...
2015-01-05 Duncan P. N. Exon... Revert "Use the integrated assembler by default on...
2015-01-05 Hal Finkel[PowerPC] Remove old README.txt entry
2015-01-05 Simon Pilgrim[X86][SSE] lowerVectorShuffleAsByteShift tidyup
2015-01-05 Hal Finkel[PowerPC] Convert a README.txt entry into a better...
2015-01-05 Brad SmithUse the integrated assembler by default on 32-bit Power...
2015-01-05 Hal Finkel[PowerPC] Remove README.txt entry
2015-01-05 Colin LeMahieu[Hexagon] Adding add/sub with carry, logical shift...
2015-01-05 Hal Finkel[PowerPC] Add a test for truncating a shifted load
2015-01-05 Hal Finkel[PowerPC] Add another test for load/store with update
2015-01-05 Hal Finkel[PowerPC] Fold i1 extensions with other ops
2015-01-05 Simon Pilgrim[X86][SSE] Fixed description for isSequentialOrUndefInR...
2015-01-05 Colin LeMahieu[Hexagon] Adding rounding reg/reg variants, accumulatin...
2015-01-05 Colin LeMahieu[Hexagon] Adding V4 bit manipulating instructions,...
2015-01-05 Colin LeMahieu[Hexagon] Adding V4 logic-logic instructions and tests.
2015-01-05 Colin LeMahieu[Hexagon] Adding orand, bitsplit reg/reg, and modwrap...
2015-01-05 Hal Finkel[PowerPC] Remove zexts after i32 ctlz
2015-01-05 Hal Finkel[PowerPC] Remove zexts after byte-swapping loads
2015-01-05 Colin LeMahieu[Hexagon] Adding round reg/imm and bitsplit instructions.
2015-01-05 Ahmed Bougacha[AArch64] Improve codegen of store lane instructions...
2015-01-05 Ahmed Bougacha[AArch64] Improve codegen of store lane 0 instructions...
2015-01-05 Karthik BhatSelect lower fsub,fabs pattern to fabd on AArch64
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