Make one of the AttributeSet ctors maintain the invariant that the
[oota-llvm.git] / lib / Target /
2013-08-02 Joey GoulyAdd a missing 'return' statement.
2013-08-02 Akira Hatanaka[mips] Expand vector truncating stores and extending...
2013-08-02 Joey Gouly[ARMv8] Add an assembler warning for the deprecated...
2013-08-02 Renato GolinFixes ARM LNT bot from SLP change in O3
2013-08-01 Akira Hatanaka[mips] Make load/store accumulator pseudo instructions...
2013-08-01 Bill WendlingUse function attributes to indicate that we don't want...
2013-08-01 Daniel MaleaFixed the Intel-syntax X86 disassembler to respect...
2013-08-01 Reed KotlerFix some issues with Mips16 floating when certain intri...
2013-08-01 Tom StellardR600: Add 64-bit float load/store support
2013-08-01 Tom StellardR600: Use 64-bit alignment for 64-bit kernel arguments
2013-08-01 Tom StellardR600/SI: Custom lower i64 ZERO_EXTEND
2013-08-01 Elena DemikhovskyEVEX and compressed displacement encoding for AVX512
2013-08-01 Richard Sandiford[SystemZ] Reuse CC results for integer comparisons...
2013-08-01 Richard Sandiford[SystemZ] Prefer comparisons with zero
2013-08-01 Vladimir MedicMoving definition of MnemonicContainsDot field from...
2013-08-01 Tim NorthoverAArch64: add initial NEON support
2013-08-01 Robert LyttonXCore target: Fix Vararg handling
2013-08-01 Robert LyttonXCore target: Add byval handling
2013-08-01 Robert LyttonXcore target
2013-08-01 Reed KotlerFix some misc. issues with Mips16 fp stubs.
2013-08-01 Reed KotlerAdd an omitted IsCall=1.
2013-07-31 Kevin EnderbyAdded the B9.3.19 SUBS PC, LR, #imm (Thumb2) system...
2013-07-31 Tom StellardRevert "R600: Non vector only instruction can be schedu...
2013-07-31 Tom StellardRevert "R600: Use SchedModel enum for is{Trans,Vector...
2013-07-31 Vincent LejeuneR600: Do not mergevector after a vector reg is used
2013-07-31 Vincent LejeuneR600: Avoid more than 4 literals in the same instructio...
2013-07-31 Vincent LejeuneR600: Non vector only instruction can be scheduled...
2013-07-31 Vincent LejeuneR600: Don't mix LDS and non-LDS instructions in the...
2013-07-31 Vincent LejeuneR600: Use SchedModel enum for is{Trans,Vector}Only...
2013-07-31 Vincent LejeuneR600: Remove predicated_break inst
2013-07-31 Richard Sandiford[SystemZ] Implement isLegalAddressingMode()
2013-07-31 Richard Sandiford[SystemZ] Be more careful about inverting CC masks...
2013-07-31 Richard Sandiford[SystemZ] Be more careful about inverting CC masks
2013-07-31 Richard Sandiford[SystemZ] Move compare-and-branch generation even later
2013-07-31 Elena DemikhovskyFixed assertion in Extract128BitVector()
2013-07-31 Richard Sandiford[SystemZ] Postpone NI->RISBG conversion to convertToThr...
2013-07-31 Elena DemikhovskyAdded INSERT and EXTRACT intructions from AVX-512 ISA.
2013-07-31 Richard Sandiford[SystemZ] Add RISBLG and RISBHG instruction definitions
2013-07-31 Craig TopperIncrement arg_count inside the loop in printInline...
2013-07-31 Craig TopperChanged register names (and pointer keywords) to be...
2013-07-31 Craig TopperRemove trailing whitespace and some tab characters.
2013-07-31 Craig TopperFixed incorrect disassembly for MOV16o16a when using...
2013-07-31 Akira Hatanaka[mips] Rename instruction DANDi to ANDi64.
2013-07-31 Akira Hatanaka[mips] Define instruction itineraries IIArith and IILogic.
2013-07-30 Akira Hatanaka[mips] Delete instruction format for "bal".
2013-07-30 Akira Hatanaka[mips] Define "bal" as a pseudo instruction. Also,...
2013-07-30 Venkatraman Govind... [Sparc] Rewrite MBB's live-in registers for leaf functi...
2013-07-30 Tom StellardR600/SI: Expand vector fp <-> int conversions
2013-07-30 Vladimir MedicThis patch implements parsing of mips FCC register...
2013-07-30 Saleem Abdulrasool[ARM] check bitwidth in PerformORCombine
2013-07-30 Venkatraman Govind... [Sparc] Use call's debugloc for the unimp instruction.
2013-07-30 Bill Schmidt[PowerPC] Skeletal FastISel support for 64-bit PowerPC...
2013-07-30 Quentin Colombet[R600] Replicate old DAGCombiner behavior in target...
2013-07-29 Akira Hatanaka[mips] Add comment and simplify function.
2013-07-29 Nico RieckUse proper section suffix for COFF weak symbols
2013-07-29 Nico RieckProper va_arg/va_copy lowering on win64
2013-07-29 Silviu BarangaAllow generation of vmla.f32 instructions when targetin...
2013-07-29 Robert Lyttontest commit
2013-07-28 Elena DemikhovskyAdded encoding prefixes for KNL instructions (EVEX).
2013-07-28 Bill Schmidt[PowerPC] Add comment explaining preprocessor directive.
2013-07-28 Bill SchmidtRevert 187318
2013-07-28 Bill Schmidt[PowerPC] Remove unnecessary preprocessor checking.
2013-07-27 Chandler CarruthCreate a constant pool symbol for the GOT in the ARMCGB...
2013-07-27 Chandler CarruthFix yet another memory leak found by the vg-leak bot...
2013-07-27 Chandler CarruthFix a memory leak in the hexagon scheduler. We call...
2013-07-27 Tom StellardSimplifyCFG: Use parallel-and and parallel-or mode...
2013-07-26 Rafael EspindolaRevert "[PowerPC] Improve consistency in use of __ppc__...
2013-07-26 Bill Schmidt[PowerPC] Improve consistency in use of __ppc__, __powe...
2013-07-26 Akira Hatanaka[mips] Implement llvm.trap intrinsic.
2013-07-26 Akira Hatanaka[mips] Fix FP conditional move instructions to have...
2013-07-26 Akira Hatanaka[mips] Fix FP branch instructions to have explicit...
2013-07-26 Akira Hatanaka[mips] Increase the number of floating point condition...
2013-07-26 Akira Hatanaka[mips] Fix floating point branch, comparison, and condi...
2013-07-26 Akira Hatanaka[mips] Delete register print method MipsInstPrinter...
2013-07-26 Akira Hatanaka[mips] Print instructions "beq", "bne" and "or" using...
2013-07-26 Justin HolewinskiAdd a target legalize hook for SplitVectorOperand ...
2013-07-26 Rafael EspindolaRevert "Add a target legalize hook for SplitVectorOperand"
2013-07-26 Justin HolewinskiAdd a target legalize hook for SplitVectorOperand
2013-07-26 Richard Osbornetest commit
2013-07-26 Richard Osborne[XCore] Add TODO regarding byval structs
2013-07-26 Craig TopperFix more Intel syntax issues with FP instruction aliase...
2013-07-26 Craig TopperTake advantage of the register enums being in order...
2013-07-26 Bill Schmidt[PowerPC] Support powerpc64le as a syntax-checking...
2013-07-25 Roman DivackyPPC32 va_list is an actual structure so va_copy needs...
2013-07-25 Rafael EspindolaRemove the mblaze backend from llvm.
2013-07-25 Tim NorthoverAArch64: fix even more JIT failures
2013-07-25 Richard Sandiford[SystemZ] Rework compare and branch support
2013-07-25 Richard Sandiford[SystemZ] Add LOCR and LOCGR
2013-07-25 Richard Sandiford[SystemZ] Add LOC and LOCG
2013-07-25 Richard Sandiford[SystemZ] Add STOC and STOCG
2013-07-25 Bill WendlingReplace the "NoFramePointerElimNonLeaf" target option...
2013-07-24 Akira Hatanaka[mips] Make MipsAsmParser::parseCCRRegs return NoMatch...
2013-07-24 Petar Jovanovic[test commit] Minor comment change.
2013-07-24 Elena DemikhovskyI'm starting to commit KNL backend. I'll push patches...
2013-07-24 David Fangallow tests to run on powerpc-darwin8 again, checking...
2013-07-24 Craig TopperSplit generated asm mnemonic matching table into a...
2013-07-24 Craig TopperRevert accidental commit.
2013-07-24 Craig TopperFix aliases for shrd/shld to handle Intel syntax proper...
2013-07-23 Tom StellardDAGCombiner: Pass the correct type to TargetLowering...
2013-07-23 Tom StellardR600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS...
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