[fuzzer] add -runs=N to limit the number of runs per session. Also, make sure we...
[oota-llvm.git] / lib / Target /
2015-02-04 Tom StellardR600/SI: Expand misaligned 16-bit memory accesses
2015-02-04 Tom StellardR600/SI: Make more store operations legal
2015-02-04 Tom StellardR600: Don't promote i64 stores to v2i32 during DAG...
2015-02-04 Colin LeMahieu[Hexagon] Adding selection for GlobalAddress and conver...
2015-02-04 Colin LeMahieu[Hexagon] Replacing some load patterns with cleaner...
2015-02-04 Colin LeMahieu[Hexagon] Adding missing isCodeGenOnly = 0
2015-02-04 Colin LeMahieu[Hexagon] Adding encoding information for absolute...
2015-02-04 Colin LeMahieu[Hexagon] Adding encoding information for absolute...
2015-02-04 Colin LeMahieu[Hexagon] Adding encoding bits for indirect long load...
2015-02-04 Bradley Smith[ARM] Fix subtarget feature set truncation when using...
2015-02-04 Zoran Jovanovic[mips][microMIPS] Implement CodeGen support for SW16...
2015-02-04 Daniel Sanders[mips] Make MipsSubtarget::hasMips*() functions consist...
2015-02-04 Renato GolinAdding support to LLVM for targeting Cortex-A72
2015-02-04 Chandler Carruth[x86] Give movss and movsd execution domains in the...
2015-02-04 Renato GolinReverting VLD1/VST1 base-updating/post-incrementing...
2015-02-04 Chandler Carruth[x86] Start to introduce bit-masking based blend lowering.
2015-02-04 Chandler Carruth[x86] Add missing patterns for andps, orps, xorps,...
2015-02-04 Bill SchmidtReplace tabs with spaces from r228116. Oops.
2015-02-04 Bill Schmidt[PowerPC] Handle 32-bit targets properly in PPCTLSDynam...
2015-02-04 Frederic RissFix some unnoticed/unwanted behavior change from r222319.
2015-02-04 Colin LeMahieu[Hexagon] Revert change to isCodeGenOnly = 1 in r228080
2015-02-04 Colin LeMahieu[Hexagon] Changing some isCodeGenOnly to isAsmParserOnl...
2015-02-03 Chandler Carruth[x86] Fix signed vs. unsigned comparison.
2015-02-03 Simon PilgrimFixed unused variable warning.
2015-02-03 Colin LeMahieu[Hexagon] Marking a bunch of non-encoded instructions...
2015-02-03 Simon Pilgrim[X86][SSE] psrl(w/d/q) and psll(w/d/q) bit shifts for...
2015-02-03 Bill Schmidt[PowerPC] Implement the vpopcnt instructions for POWER8
2015-02-03 Marek OlsakR600/SI: Remove useless patterns in VALU which are...
2015-02-03 Marek OlsakR600/SI: Rewrite VOP1InstSI to contain a pseudo and...
2015-02-03 Marek OlsakR600/SI: Fix B64 VALU shifts on VI
2015-02-03 Simon PilgrimFixed signed/unsigned comparison warning.
2015-02-03 Colin LeMahieu[Hexagon] Converting XTYPE/SHIFT intrinsics. Cleaning...
2015-02-03 Simon PilgrimFixed unused variable warning.
2015-02-03 Simon Pilgrim[X86][SSE] Added general integer shuffle matching for...
2015-02-03 Colin LeMahieu[Hexagon] Updating XTYPE/PRED intrinsics.
2015-02-03 Jingyue WuAdd straight-line strength reduction to LLVM
2015-02-03 Colin LeMahieu[Hexagon] Updating XTYPE/PERM intrinsics.
2015-02-03 Simon Pilgrim[X86][AVX2] Enabled shuffle matching for the AVX2 zero...
2015-02-03 Colin LeMahieu[Hexagon] Adding missing vector multiply instruction...
2015-02-03 Sanjay PatelMerge consecutive 16-byte loads into one 32-byte load...
2015-02-03 Sanjay Patelremove variable names from comments; NFC
2015-02-03 Colin LeMahieu[Hexagon] Converting complex number intrinsics and...
2015-02-03 Colin LeMahieu[Hexagon] Adding vector intrinsics for alu32/alu and...
2015-02-03 Jingyue WuRemove usernames from TODOs, NFC
2015-02-03 Marek OlsakR600/SI: Don't generate non-existent LSHL, LSHR, ASHR...
2015-02-03 Marek OlsakR600/SI: Remove VOP2_REV definitions from target-specif...
2015-02-03 Marek OlsakR600/SI: Trivial instruction definition corrections...
2015-02-03 Marek OlsakR600/SI: Determine target-specific encoding of READLANE...
2015-02-03 Marek OlsakR600/SI: Fix dependency between instruction writing...
2015-02-03 Sanjay PatelFix program crashes due to alignment exceptions generat...
2015-02-03 Bill Schmidt[PowerPC] Yet another approach to __tls_get_addr
2015-02-03 Bruno Cardoso Lopes[X86][MMX] Improve transfer from mmx to i32
2015-02-03 Craig Topper[X86] Make fxsave64/fxrstor64/xsave64/xsrstor64/xsaveop...
2015-02-03 Craig Topper[X86] Add Requires[In64BitMode] around MOVSX64rr32...
2015-02-03 Eric ChristopherOnly access TLOF via the TargetMachine, not TargetLowering.
2015-02-03 Eric ChristopherDefine a runOnMachineFunction for the Hexagon AsmPrinte...
2015-02-03 Eric ChristopherMigrate away from using a Subtarget except for the...
2015-02-02 Eric ChristopherMigrate to using the subtarget on the machine function...
2015-02-02 Eric ChristopherUse the function template getSubtarget off of the machi...
2015-02-02 Eric ChristopherUse the cached subtarget on the MachineFunction.
2015-02-02 Eric ChristopherRemove dead header.
2015-02-02 Eric ChristopherRemove dead code in the HexagonMCInst classes. This...
2015-02-02 Eric Christopher80-col fixup.
2015-02-02 Eric ChristopherRemove dead code in the HexagonMCInst classes. This...
2015-02-02 Eric Christopher80-col fixup.
2015-02-02 Eric ChristopherRemove unused class variables and update all callers...
2015-02-02 Eric ChristopherMigrate the HexagonSplitConst32AndConst64 pass from...
2015-02-02 Eric ChristopherRemove #if'd code and update comment.
2015-02-02 Eric ChristopherMove HexagonMachineScheduler to use the subtarget off...
2015-02-02 Eric ChristopherCache and use the subtarget that owns the target lowering.
2015-02-02 Alexei Starovoitovbpf: Use the getSubtarget call off of the MachineFuncti...
2015-02-02 Jingyue WuResurrect the assertion removed by r227717
2015-02-02 Eric ChristopherMigrate HexagonISelDAGToDAG to setting a subtarget...
2015-02-02 Eric ChristopherUse the getSubtarget call off of the MachineFunction...
2015-02-02 Eric ChristopherRemove unused class variables and update calls to get...
2015-02-02 Eric ChristopherSink queries into asserts since the variable is unused...
2015-02-02 Eric ChristopherUpdate CMake build for removed files.
2015-02-02 Eric ChristopherGet TargetRegisterInfo and TargetInstrInfo off of the...
2015-02-02 Eric ChristopherUse the function template getSubtarget to remove an...
2015-02-02 Eric ChristopherGrab TargetInstrInfo off of the MachineFunction and...
2015-02-02 Eric ChristopherRemove unused files.
2015-02-02 Tom StellardR600/SI: 64-bit and larger memory access must be at...
2015-02-02 Ahmed Bougacha[AArch64] Prefer DUP/MOV ("CPY") to INS for vector_extract.
2015-02-02 Eric ChristopherSince TargetLowering is already subtarget dependent...
2015-02-02 Eric ChristopherUse the function template getSubtarget on the MachineFu...
2015-02-02 Eric ChristopherRemove unused class variable.
2015-02-02 Eric ChristopherRemove unused class variable.
2015-02-02 Eric ChristopherReuse a bunch of cached subtargets and remove getSubtar...
2015-02-02 Eric ChristopherRemove some unused forward declarations.
2015-02-02 Jan Wen VoungFix ARM peephole optimizeCompare to avoid optimizing...
2015-02-01 Hal Finkel[PowerPC] Put PPCEarlyReturn into its own source file
2015-02-01 Hal Finkel[PowerPC] Remove unnecessary include
2015-02-01 Hal Finkel[PowerPC] Put PPCVSXCopy into its own source file
2015-02-01 Hal Finkel[PowerPC] Put PPCVSXFMAMutate into its own source file
2015-02-01 Hal Finkel[PowerPC] Remove the PPCVSXCopyCleanup pass
2015-02-01 Hal Finkel[PowerPC] Add implicit ops to conditional returns in...
2015-02-01 Hal Finkel[PowerPC] VSX stores don't also read
2015-02-01 Hal Finkel[PowerPC] Better scheduling for isel on P7/P8
2015-02-01 Michael Kuperstein[X86] Convert esp-relative movs of function arguments...
2015-02-01 Michael KupersteinRevert r227728 due to bad line endings.
next