really kill off the last MRMInitReg inst, remove logic from encoder.
[oota-llvm.git] / lib / Target / X86 / X86InstrSSE.td
2010-02-05 Chris Lattnerreally kill off the last MRMInitReg inst, remove logic...
2010-02-05 Chris Lattnerlower the last of the MRMInitReg instructions in MCInst...
2010-01-11 David GreeneImplement a feature (-vector-unaligned-mem) to allow...
2009-12-22 Evan ChengRemove target attribute break-sse-dep. Instead, do...
2009-12-18 Evan ChengOn recent Intel u-arch's, folding loads into some unary...
2009-12-18 Sean CallananInstruction fixes, added instructions, and AsmString...
2009-12-09 Evan ChengOptimize splat of a scalar load into a shuffle of a...
2009-11-20 Sean CallananRecommitting PALIGNR shift width fixes.
2009-11-20 Sean CallananReverting PALIGNR fix until I figure out how this
2009-11-20 Sean CallananFixed PALIGNR to take 8-bit rotations in all cases.
2009-11-17 Evan ChengRe-apply 89011. It's not to be blamed.
2009-11-17 Evan ChengRevert 89011. Buildbot thinks it might be breaking...
2009-11-17 Evan ChengA few more instructions that should be marked re-materi...
2009-11-16 Evan Cheng- Check memoperand alignment instead of checking stack...
2009-11-07 Nate Begemanx86 vector shuffle cleanup/fixes:
2009-11-07 Eric ChristopherFix a couple of shuffle patterns to use movhlps instead
2009-10-29 Dan GohmanRename usesCustomDAGSchedInserter to usesCustomInserter...
2009-10-28 Evan ChengX86 palignr intrinsics immediate field is in bits....
2009-10-19 Nate BegemanAdd support for matching shuffle patterns with palignr.
2009-09-21 Dan GohmanAdd support for rematerializing FsFLD0SS and FsFLD0SD...
2009-09-16 Sean CallananAdded a variety of floating-point and SSE instructions.
2009-08-20 Sean CallananFixed PCMPESTRM128 to have opcode 0x60 instead of 0x62...
2009-08-18 Eric ChristopherImplement sse4.2 string/text processing instructions:
2009-08-11 Daniel DunbarAdd 'isCodeGenOnly' bit to Instruction .td records.
2009-08-10 Eric ChristopherFix up whitespace, remove commented out code.
2009-08-10 Daniel Dunbarllvm-mc/AsmMatcher: Change assembler parser match class...
2009-08-09 Daniel DunbarExtend comment on ParserMatchClass .td field, and add...
2009-08-08 Eric ChristopherAdd crc32 instruction and intrinsics. Add a new class...
2009-07-31 Eric ChristopherWhitespace and 80-col cleanup.
2009-07-30 Dan GohmanAdd a new register class to describe operands that...
2009-07-29 Eric ChristopherAdd support for gcc __builtin_ia32_ptest{z,c,nzc} intri...
2009-07-24 Eric ChristopherUpdate insertps handling based on feedback. Move to...
2009-07-23 Eric ChristopherSupport insertps via the intrinsic and add a couple...
2009-06-19 Eli FriedmanFix for PR2484: add an SSE1 pattern for a shuffle we...
2009-06-06 Eli FriedmanFix an obvious typo.
2009-05-28 Bill WendlingThe MONITOR and MWAIT instructions have insufficient...
2009-05-28 Evan ChengFix MOVMSKPDrr encoding.
2009-05-28 Evan ChengFix PSIGND encoding bug. Patch by Sean Callanan.
2009-05-28 Bill Wendling"The instructions MMX_PSADBWrm and MMX_PSADBWrr have...
2009-05-27 Evan ChengFix sfence jit encoding. Patch by Sean Callanan.
2009-05-12 Evan Cheng80 col violations.
2009-04-29 Nate BegemanFix infinite recursion in the C++ code which handles...
2009-04-27 Nate Begeman2nd attempt, fixing SSE4.1 issues and implementing...
2009-04-24 Rafael EspindolaRevert 69952. Causes testsuite failures on linux x86-64.
2009-04-24 Nate BegemanPR2957
2009-04-08 Rafael EspindolaRe-apply 68552.
2009-04-07 Bill WendlingTemporarily revert r68552. This was causing a failure...
2009-04-07 Rafael EspindolaReduce code duplication on the TLS implementation.
2009-02-26 Evan ChengADDS{D|S}rr_Int and MULS{D|S}rr_Int are not commutable...
2009-02-23 Nate BegemanGenerate better code for v8i16 shuffles on SSE2
2009-02-10 Evan ChengHandle llvm.x86.sse2.maskmov.dqu in 64-bit.
2009-02-05 Evan ChengA few more isAsCheapAsAMove.
2009-01-28 Evan ChengThe memory alignment requirement on some of the mov...
2009-01-09 Dan GohmanWhitespace and other minor adjustments to make SSE...
2008-12-18 Mon P WangFixed x86 code generation of multiple for v2i64. It...
2008-12-03 Dan GohmanRename isSimpleLoad to canFoldAsLoad, to better reflect...
2008-12-03 Dan GohmanMark x86's V_SET0 and V_SETALLONES with isSimpleLoad...
2008-10-17 Evan ChengFix lfence and mfence encoding. These look like MRM5r...
2008-10-16 Dan GohmanFix the predicate for memop64 to be a regular load...
2008-10-15 Dan GohmanNow that predicates can be composed, simplify several of
2008-10-10 Dale JohannesenFix SSE4.1 roundss, roundsd. While the instructions...
2008-10-07 Anders CarlssonCertain patterns involving the "movss" instruction...
2008-10-02 Bill Wendling"The original bug was a complaint that _mm_srli_si128...
2008-09-26 Evan ChengImplement "punpckldq %xmm0, $xmm0" as "pshufd $0x50...
2008-09-26 Evan Chengunpckhps requires sse1, punpckhdq requires sse2.
2008-09-25 Evan ChengWith sse3 and when the source is a load or has multiple...
2008-09-25 Evan Chengpmovsxbq etc. requires sse4.1.
2008-09-24 Evan ChengFix patterns for SSE4.1 move and sign extend instructio...
2008-09-12 Dan GohmanRename ConstantSDNode::getValue to getZExtValue, for...
2008-09-05 Eli FriedmanFix for PR2687: Add patterns to match sint_to_fp and...
2008-08-28 Evan ChengFsFLD0S{S|D} and V_SETALLONES are as cheap as moves.
2008-08-20 Dan GohmanTablegen generated code already tests the opcode value...
2008-08-08 Dan GohmanAdd an EXTRACTPSmr pattern to match the pattern that
2008-08-05 Evan ChengFix PR2620: Fix X86cmppd selection code so it expects...
2008-07-17 Nate BegemanFix a typo in last commit
2008-07-17 Nate BegemanSSE codegen for vsetcc nodes
2008-07-10 Evan ChengFix for PR2472. Use movss to set lower 32-bits of a...
2008-06-16 Evan ChengHorizontal-add instructions are not commutative.
2008-06-16 Evan Chengmpsadbw is commutable.
2008-06-13 Duncan SandsDisable some DAG combiner optimizations that may be
2008-05-29 Evan ChengImplement vector shift up / down and insert zero with...
2008-05-28 Dan GohmanFix the encoding for two more "rm" instructions that...
2008-05-28 Mon P WangFixed X86 encoding error CVTPS2PD and CVTPD2PS when...
2008-05-24 Evan ChengEliminate x86.sse2.punpckh.qdq and x86.sse2.punpckl...
2008-05-24 Evan ChengEliminate x86.sse2.movs.d, x86.sse2.shuf.pd, x86.sse2...
2008-05-24 Evan ChengRemove x86.sse2.loadh.pd and x86.sse2.loadl.pd. These...
2008-05-23 Evan ChengUse movlps / movhps to modify low / high half of 16...
2008-05-23 Evan ChengFix a duplicated pattern.
2008-05-23 Dan GohmanUse PMULDQ for v2i64 multiplies when SSE4.1 is availabl...
2008-05-23 Evan ChengBug: rcpps can only folds a load if the address is...
2008-05-22 Evan ChengAdd missing patterns.
2008-05-20 Evan Chengmovsd and movq do not require 16-byte alignment. This...
2008-05-13 Nate BegemanFix one more encoding bug.
2008-05-13 Nate BegemanFix and encoding error in the psrad xmm, imm8 instruction.
2008-05-12 Nate BegemanTeach Legalize how to scalarize VSETCC
2008-05-12 Nate BegemanInitial X86 codegen support for VSETCC.
2008-05-10 Evan ChengSome clean up.
2008-05-09 Evan ChengAdd a pattern to do move the low element of a v4f32...
2008-05-09 Evan ChengHandle a few more cases of folding load i64 into xmm...
2008-05-08 Evan ChengUse movq to move low half of XMM register and zero...
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