[DAG] Pass the argument list to the CallLoweringInfo via move semantics. NFCI.
[oota-llvm.git] / lib / Target / X86 / X86ISelLowering.cpp
2014-07-01 Juergen Ributzka[DAG] Pass the argument list to the CallLoweringInfo...
2014-07-01 Tim NorthoverX86: delegate expanding atomic libcalls to generic...
2014-07-01 Tim NorthoverX86: expand atomics in IR instead of as MachineInstrs.
2014-06-30 Andrea Di Biagio[X86] Add support for builtin to read performance monit...
2014-06-28 Chandler Carruth[x86] Fix a bug in the v8i16 shuffling exposed by the...
2014-06-28 Chandler Carruth[x86] Add handling for splat-like widenings of v16i8...
2014-06-27 Chandler Carruth[x86] Fix another bug hit when bootstrapping with the...
2014-06-27 Chandler Carruth[x86] Fix a miscompile in the new shuffle lowering...
2014-06-27 Alexander KornienkoClean up unused variable warning in release build.
2014-06-27 Chandler Carruth[x86] Clean up some unused variables, especially in...
2014-06-27 Chandler Carruth[x86] Teach the target combine step to aggressively...
2014-06-27 Chandler Carruth[x86] Teach the target-specific combining how to aggres...
2014-06-27 Chandler Carruth[x86] Teach the X86 backend to DAG-combine SSE2 shuffle...
2014-06-27 Chandler Carruth[x86] Begin a significant overhaul of how vector loweri...
2014-06-26 Andrea Di BiagioSilence a warning due to a comparison between signed...
2014-06-26 Andrea Di Biagio[X86] Improve the selection of SSE3/AVX addsub instruct...
2014-06-25 Andrea Di Biagio[X86] Always prefer to lower a VECTOR_SHUFFLE into...
2014-06-25 Chandler Carruth[x86] Add intrinsics for the pshufd, pshuflw, and pshuf...
2014-06-25 NAKAMURA TakumiRe-apply r211399, "Generate native unwind info on Win64...
2014-06-25 Andrea Di Biagio[X86] Add target combine rule to select ADDSUB instruct...
2014-06-24 Robert Khasanovvpblend intrinsics combines as shifts intrinsics due...
2014-06-22 NAKAMURA TakumiRevert r211399, "Generate native unwind info on Win64"
2014-06-22 Filipe CabecinhasFix PR20087 by using the source index when changing...
2014-06-20 Reid KlecknerGenerate native unwind info on Win64
2014-06-20 Chandler Carruth[x86] Make the x86 PACKSSWB, PACKSSDW, PACKUSWB, and...
2014-06-19 Andrea Di Biagio[X86] Teach how to combine horizontal binop even in...
2014-06-16 Cameron McInallyHook up vector int_ctlz for AVX512.
2014-06-13 Tim NorthoverX86: lower ATOMIC_CMP_SWAP_WITH_SUCCESS directly
2014-06-13 Tim NorthoverIR: add "cmpxchg weak" variant to support permitted...
2014-06-12 Andrea Di Biagio[X86] Teach how to dump the name of target node RDTSCP_DAG.
2014-06-12 Andrea Di Biagio[X86] Teach how to combine AVX and AVX2 horizontal...
2014-06-11 Tim NorthoverX86: add stringy name for X86ISD::LCMPXCHG16_DAG
2014-06-11 Andrea Di Biagio[X86] Refactor the logic to select horizontal adds...
2014-06-10 Eric ChristopherUse the TargetMachine on the DAG or the MachineFunction...
2014-06-10 Eric ChristopherAdd a FIXME.
2014-06-10 Andrea Di Biagio[X86] Improved target combine rules for selecting horiz...
2014-06-10 Tom StellardSelectionDAG: Don't use MVT::Other to determine legalit...
2014-06-10 Tim NorthoverRevert "X86: elide comparisons after cmpxchg instructions."
2014-06-10 Tim NorthoverX86: elide comparisons after cmpxchg instructions.
2014-06-09 Eric ChristopherMove all of the x86 subtarget initialized variables...
2014-06-09 Andrea Di Biagio[X86] Add target combine rules for horizontal add/sub.
2014-06-09 Andrea Di Biagio[X86] Avoid emitting unnecessary test instructions.
2014-06-09 Alexey Volkov[X86] Use ADD/SUB instead of INC/DEC for Silvermont
2014-06-08 Craig Topper[C++11] Use 'nullptr'.
2014-06-06 Benjamin KramerX86: Don't turn shifts into ands if there's another...
2014-06-06 Filipe CabecinhasFixed a bug in lowering shuffle_vectors to insertps
2014-06-02 Andrea Di Biagio[X86] Fix checked arithmetic for i8 on X86.
2014-05-31 Eric ChristopherHave the TLOF creation take a Triple rather than needin...
2014-05-30 Andrea Di Biagio[X86] Add two combine rules to simplify dag nodes intro...
2014-05-30 Filipe CabecinhasSeparate the check for blend shuffle_vector masks
2014-05-23 Rafael EspindolaDelete dead code.
2014-05-22 Andrea Di Biagio[X86] Improve the lowering of BITCAST from MVT::f64...
2014-05-21 Quentin Colombet[X86] Fix a bug in the lowering of BLENDI introduced...
2014-05-20 Simon AtanasyanAdd parentheses to suppress the gcc warning '-Wparenthe...
2014-05-19 Filipe CabecinhasAdded more insertps optimizations
2014-05-19 Benjamin KramerSDAG: Legalize vector BSWAP into a shuffle if the shuff...
2014-05-17 Saleem AbdulrasoolTarget: remove old constructors for CallLoweringInfo
2014-05-17 Chandler Carruth[x86] Fix a bad predicate I spotted by inspection ...
2014-05-16 Filipe CabecinhasImplemented special cases for PerformVSELECTCombine.
2014-05-16 Filipe CabecinhasLower vselects into X86ISD::BLENDI when appropriate.
2014-05-16 Filipe CabecinhasImplemented LowerVSELECT to custom lower some instructions.
2014-05-16 Rafael EspindolaDelete getAliasedGlobal.
2014-05-15 Andrea Di Biagio[X86] Teach the backend how to fold SSE4.1/AVX/AVX2...
2014-05-15 Alp TokerFix typos
2014-05-14 Jay FoadRename ComputeMaskedBits to computeKnownBits. "Masked...
2014-05-12 Reid KlecknerTry to fix an SDAG dependence issue with sret
2014-05-12 Aaron BallmanSilencing an MSVC warning about not all control paths...
2014-05-12 Benjamin KramerX86: Make sure that we have SSE4.1 before we generate...
2014-05-12 NAKAMURA TakumiX86ISelLowering.cpp:LowerINTRINSIC_W_CHAIN(): Prune...
2014-05-12 Elena DemikhovskyFixed compilation issue
2014-05-12 Elena DemikhovskyAVX-512: changes in intrinsics
2014-05-11 Hal FinkelPass the value type to TLI::getRegisterByName
2014-05-11 Filipe CabecinhasFixed a bug when lowering build_vector (PR19694)
2014-05-09 Reid KlecknerAllow sret on the second parameter as well as the first
2014-05-09 Andrea Di BiagioFix 80 col violation.
2014-05-08 Filipe CabecinhasOptimize shufflevector that copies an i64/f64 and zeros...
2014-05-08 Andrea Di Biagio[X86] Add target specific combine rules to fold SSE2...
2014-05-08 Filipe CabecinhasLower certain build_vectors to insertps instructions
2014-05-06 Andrea Di Biagio[X86] Improve the lowering of BITCAST dag nodes from...
2014-05-06 Renato GolinImplememting named register intrinsics
2014-05-06 Reid KlecknerFix i128 div/mod on mingw64
2014-05-05 Filipe CabecinhasRevert "Optimize shufflevector that copies an i64/f64...
2014-05-05 Filipe CabecinhasOptimize shufflevector that copies an i64/f64 and zeros...
2014-04-30 Craig TopperUse makeArrayRef insted of calling ArrayRef<T> construc...
2014-04-29 Reid KlecknerImplement X86 code generation for musttail
2014-04-29 Elena DemikhovskyAVX-512: optimized a shuffle pattern to VINSERTI64x4.
2014-04-28 Quentin Colombet[X86] Add more details in the comments of X86TargetLowe...
2014-04-28 Craig Topper[C++] Use 'nullptr'.
2014-04-27 Craig TopperConvert one last signature of getNode to take an ArrayR...
2014-04-27 Craig TopperConvert SelectionDAG::getMergeValues to use ArrayRef.
2014-04-27 Benjamin KramerX86: If SSE4.1 is missing lower SMUL_LOHI of v4i32...
2014-04-26 Craig TopperConvert getMemIntrinsicNode to take ArrayRef of SDValue...
2014-04-26 Craig TopperConvert SelectionDAG::getNode methods to use ArrayRef...
2014-04-26 Benjamin KramerPrint X86ISD::PMULDQ nodes properly in debug output.
2014-04-26 Benjamin KramerX86: Lower SMUL_LOHI of v4i32 to pmuldq when SSE4.1...
2014-04-26 Benjamin KramerX86: Add patterns for MULHU/MULHS of v8i16 and v16i16.
2014-04-26 Benjamin KramerRip out X86-specific vector SDIV lowering, make the...
2014-04-26 Benjamin KramerX86: Custom lower v4i32 UMUL_LOHI into 2 pmuludqs.
2014-04-26 Quentin Colombet[X86] Implement TargetLowering::getScalingFactorCost...
2014-04-25 Filipe CabecinhasOptimization for certain shufflevector by using insertps.
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