[SystemZ] Be more careful about inverting CC masks (conditional loads)
[oota-llvm.git] / lib / Target / SystemZ / SystemZISelDAGToDAG.cpp
2013-07-31 Richard Sandiford[SystemZ] Be more careful about inverting CC masks...
2013-07-31 Richard Sandiford[SystemZ] Postpone NI->RISBG conversion to convertToThr...
2013-07-18 Richard Sandiford[SystemZ] Use RNSBG
2013-07-18 Richard Sandiford[SystemZ] Generalize RxSBG SRA case
2013-07-18 Richard Sandiford[SystemZ] Use RXSBG
2013-07-18 Richard Sandiford[SystemZ] Rename and formatting fixes
2013-07-17 Aaron BallmanSilencing an MSVC warning about signed vs unsigned...
2013-07-16 Richard Sandiford[SystemZ] Use ROSBG and non-zero form of RISBG for...
2013-07-16 Richard Sandiford[SystemZ] Use RISBG for (shift (and ...))
2013-07-11 Richard Sandiford[SystemZ] Use zeroing form of RISBG for shift-and-AND...
2013-07-11 Richard Sandiford[SystemZ] Use zeroing form of RISBG for some AND sequences
2013-07-09 Richard Sandiford[SystemZ] Use MVC for simple load/store pairs
2013-05-25 Andrew TrickTrack IR ordering of SelectionDAG nodes 2/4.
2013-05-06 Ulrich Weigand[SystemZ] Add back end
2011-10-24 Dan GohmanRemove the SystemZ backend.
2010-09-21 Chris Lattnerfix a long standing wart: all the ComplexPattern's...
2010-09-04 Chris Lattnerzap dead code.
2010-05-28 Jakob Stoklund OlesenMerge the SystemZ subreg_even32 SubRegIndex into subreg...
2010-05-25 Jakob Stoklund OlesenUse enums instead of literals for SystemZ subregisters
2010-04-17 Dan GohmanUse const qualifiers with TargetLowering. This eliminat...
2010-03-02 Chris LattnerSink InstructionSelect() out of each target into SDISel...
2010-02-15 Evan ChengSplit SelectionDAGISel::IsLegalAndProfitableToFold to
2010-02-09 Chris Lattnermove target-independent opcodes out of TargetInstrInfo
2010-01-05 Dan GohmanChange SelectCode's argument from SDValue to SDNode...
2010-01-04 Anton KorobeynikovFix invalid chain folding for memory variant of sdiv...
2009-11-05 Dan GohmanRemove uninteresting and confusing debug output.
2009-09-25 Dan GohmanRename getTargetNode to getMachineNode, for consistency...
2009-08-23 Daniel DunbarFix some refactos for iostream changes (in -Asserts...
2009-08-23 Chris Lattnereliminate uses of cerr()
2009-08-23 Chris Lattnereliminate the last DOUTs from the targets.
2009-08-11 Owen AndersonSplit EVT into MVT and EVT, the former representing...
2009-08-10 Owen AndersonRename MVT to EVT, in preparation for splitting SimpleV...
2009-07-17 Daniel DunbarFix 'may be used uninitialized' warning.
2009-07-16 Anton KorobeynikovUnbreak
2009-07-16 Anton KorobeynikovFix logic inversion for RI-mode address selection
2009-07-16 Anton KorobeynikovUnbreak mvi and friends - emit only 'significant' part...
2009-07-16 Anton KorobeynikovProvide consistent subreg idx scheme. This (hopefully...
2009-07-16 Anton KorobeynikovUse divide single for 32 bit signed divides
2009-07-16 Anton KorobeynikovRemove redundand register move
2009-07-16 Anton KorobeynikovProperly handle divides. As a bonus - implement memory...
2009-07-16 Anton Korobeynikov32 bit shifts have only 12 bit displacements
2009-07-16 Anton KorobeynikovTypos
2009-07-16 Anton KorobeynikovConsolidate reg-imm / reg-reg-imm address mode selectio...
2009-07-16 Anton KorobeynikovAdd support for 12 bit displacements
2009-07-16 Anton Korobeynikov32-bit ri addressing mode has only 12-bit displacement
2009-07-16 Anton KorobeynikovSwap the order of imm and idx field for rri addrmode...
2009-07-16 Anton KorobeynikovDo not truncate sign bits for negative imms
2009-07-16 Anton KorobeynikovAdd address computation stuff
2009-07-16 Anton KorobeynikovAdd stores and truncstores
2009-07-16 Anton KorobeynikovAdd patterns for various extloads
2009-07-16 Anton KorobeynikovDo some heroic rri address matching (shamelessly stolen...
2009-07-16 Anton KorobeynikovAdd shifts and reg-imm address matching
2009-07-16 Anton KorobeynikovAdd bunch of reg-imm movs
2009-07-16 Anton KorobeynikovProvide masked reg-imm 'or' and 'and'
2009-07-16 Anton KorobeynikovLet's start another backend :)