AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.
[oota-llvm.git] / lib / Target / R600 /
2014-05-22 Matt ArsenaultR600: Add definition for flat address space ID.
2014-05-22 Matt ArsenaultR600: Try to convert BFE back to standard bit ops when...
2014-05-22 Matt ArsenaultR600: Add dag combine for BFE
2014-05-22 Matt ArsenaultR600: Implement ComputeNumSignBitsForTargetNode for BFE
2014-05-22 Matt ArsenaultR600: Implement computeMaskedBitsForTargetNode for BFE
2014-05-22 Matt ArsenaultR600: Expand mul24 for GPUs without it
2014-05-22 Matt ArsenaultR600: Expand mad24 for GPUs without it
2014-05-22 Matt ArsenaultR600: Add intrinsics for mad24
2014-05-22 Matt ArsenaultR600/SI: Move instruction pattern to instruction definition
2014-05-22 Matt ArsenaultR600/SI: Match fp_to_uint / uint_to_fp for f64
2014-05-21 Matt ArsenaultR600: Add comment describing problems with LowerConstan...
2014-05-21 Matt ArsenaultR600: Partially fix constant initializers for structs...
2014-05-21 Matt ArsenaultUse cast<> instead of unchecked dyn_cast
2014-05-19 Matt ArsenaultRemove unused method declaration
2014-05-19 Aaron BallmanResolving MSVC warnings about switch statements with...
2014-05-16 Tom StellardR600/SI: Refactor the VOP3_32 tablegen class
2014-05-16 Tom StellardR600/SI: Add a PredicateControl class for managing...
2014-05-16 Tom StellardR600/SI: Move tablegen patterns away from instruction...
2014-05-16 Tom StellardR600/SI: Remove unused instruction
2014-05-16 Tom StellardR600/SI: Promote f32 SELECT to i32
2014-05-16 Tom StellardR600/SI: Remove duplicate pattern
2014-05-15 Matt ArsenaultUse range for
2014-05-15 Tom StellardR600/SI: Stop using VSrc_* as the default register...
2014-05-15 Tom StellardR600/SI: Fix a bug with handling of INSERT_SUBREG in...
2014-05-15 Tom StellardR600/SI: Only use SALU instructions for 64-bit add...
2014-05-15 Tom StellardR600/SI: Use VALU instructions for i1 ops
2014-05-14 Jay FoadRename ComputeMaskedBits to computeKnownBits. "Masked...
2014-05-13 Matt ArsenaultR600/SI: Try to fix BFE operands when moving to VALU
2014-05-12 Matt ArsenaultUse cast<> for unchecked use
2014-05-12 Matt ArsenaultUse cast<> for unchecked use
2014-05-12 Matt ArsenaultUse range for
2014-05-12 Matt ArsenaultR600: Add mul24 intrinsics
2014-05-11 Matt ArsenaultFix return before else
2014-05-10 Vincent LejeuneR600/SI: Fold fabs/fneg into src input modifier
2014-05-10 Vincent LejeuneR600/SI: Prettier display of input modifiers
2014-05-10 Vincent LejeuneR600/SI: Use pseudo instruction for fabs/clamp/fneg
2014-05-09 Tom StellardR600/SI: Teach SIInstrInfo::moveToVALU() how to move...
2014-05-09 Tom StellardR600/SI: Fix SMRD pattern for offsets > 32 bits
2014-05-09 Tom StellardR600: Expand i64 SELECT_CC
2014-05-09 Tom StellardR600: Move MIN/MAX matching from LowerOperation() to...
2014-05-08 Matt ArsenaultR600: Promote f64 vector load/stores to i64 for consistency
2014-05-05 Tom StellardR600: Expand i64 ISD:SUB
2014-05-05 Marek OlsakR600/SI: allow 5 more input SGPRs to a shader
2014-05-02 Tom StellardR600/SI: Add processor type for Mullins.
2014-05-02 Tom StellardR600: Expand vector sin and cos.
2014-05-02 Tom StellardR600: Expand TruncStore i64 -> {i16,i8}
2014-05-02 Tom StellardR600/SI: Only create one instruction when spilling...
2014-05-01 Matt ArsenaultR600/SI: Fix verifier error with pseudo store instructions.
2014-04-30 Tom StellardR600/SI: Use VALU instructions for copying i1 values
2014-04-30 Tom StellardR600/SI: Teach moveToVALU how to handle some SMRD instr...
2014-04-30 Tom StellardR600: Remove unused function AMDGPUSubtarget::getDefaul...
2014-04-30 Craig TopperUse makeArrayRef insted of calling ArrayRef<T> construc...
2014-04-30 Craig TopperDe-virtualize or remove some methods that have no overr...
2014-04-29 Tom StellardR600: Remove duplicate setting of SELECT expansion.
2014-04-29 Tom StellardR600/SI: Custom lower SI_IF and SI_ELSE to avoid machin...
2014-04-29 Tom StellardR600/SI: Only select SALU instructions in the entry...
2014-04-29 Tom StellardR600: optimize the UDIVREM 64 algorithm
2014-04-29 Tom StellardR600: Implement iterative algorithm for udivrem
2014-04-29 Tom StellardR600: Change UDIV/UREM to UDIVREM when legalizing types
2014-04-29 Tom StellardR600: remove unused variable
2014-04-29 Craig Topper[C++11] Add 'override' keywords and remove 'virtual...
2014-04-28 Craig TopperConvert more SelectionDAG functions to use ArrayRef.
2014-04-28 Craig Topper[C++] Use 'nullptr'.
2014-04-27 Craig TopperConvert SelectionDAG::MorphNodeTo to use ArrayRef.
2014-04-27 Craig TopperConvert SelectionDAG::SelectNodeTo to use ArrayRef.
2014-04-27 Craig TopperConvert SelectionDAG::getMergeValues to use ArrayRef.
2014-04-26 Craig TopperConvert getMemIntrinsicNode to take ArrayRef of SDValue...
2014-04-26 Craig TopperConvert SelectionDAG::getNode methods to use ArrayRef...
2014-04-25 Matt ArsenaultR600: Fix function name printing in LowerCall
2014-04-25 Duncan P. N. Exon... SCC: Change clients to use const, NFC
2014-04-25 Craig Topper[C++] Use 'nullptr'. Target edition.
2014-04-24 Matt ArsenaultR600/SI: Use address space in allowsUnalignedMemoryAccesses
2014-04-22 Matt ArsenaultR600: Emit error instead of unreachable on function...
2014-04-22 Tom StellardR600/SI: Reorganize SIInstructions.td
2014-04-22 Matt ArsenaultR600: Change how vector truncating stores are packed.
2014-04-22 Matt ArsenaultR600: Make sign_extend_inreg legal.
2014-04-22 Chandler Carruth[Modules] Fix potential ODR violations by sinking the...
2014-04-22 Chandler Carruth[cleanup] Lift using directives, DEBUG_TYPE definitions...
2014-04-21 Chandler Carruth[Modules] Make Support/Debug.h modular. This requires...
2014-04-21 David BlaikieUse unique_ptr to manage objects owned by the ScheduleD...
2014-04-21 Benjamin Kramer[C++11] Replace OwningPtr with std::unique_ptr in place...
2014-04-18 Matt ArsenaultR600: Minor cleanups.
2014-04-18 Matt ArsenaultR600/SI: Try to use scalar BFE.
2014-04-18 Matt ArsenaultR600/SI: Match sign_extend_inreg to s_sext_i32_i8 and...
2014-04-18 Tom StellardR600/SI: Use SReg_64 instead of VSrc_64 when selecting...
2014-04-17 Tom StellardR600: Add comment clariying use of sext for result...
2014-04-17 Tom StellardR600/SI: Stop using i128 as the resource descriptor...
2014-04-17 Tom StellardR600/SI: Change default register class for i32 to SReg_32
2014-04-17 Tom StellardR600/SI: Teach SIInstrInfo::moveToVALU() how to handle...
2014-04-17 Tom StellardR600/SI: Legalize operands after changing dst reg in...
2014-04-17 Matt ArsenaultR600/SI: f64 frint is legal on CI
2014-04-17 Matt ArsenaultR600/SI: Fix zext from i1 to i64
2014-04-16 Craig TopperConvert SelectionDAG::getVTList to use ArrayRef
2014-04-16 Matt ArsenaultR600: Expand sign extension of vectors.
2014-04-15 Matt ArsenaultR600/SI: Print code size along with used registers
2014-04-15 Matt ArsenaultR600/SI: Print more immediates in hex format
2014-04-15 Matt ArsenaultR600/SI: Cleanup parsing of register names.
2014-04-15 Matt ArsenaultR600/SI: Fix loads of i1
2014-04-15 Nick LewyckyBreak PseudoSourceValue out of the Value hierarchy...
2014-04-11 Matt ArsenaultR600: Check if a sextload should be used for parameter...
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