Remove useless .debug_macinfo section setup.
[oota-llvm.git] / lib / Target / R600 /
2015-03-02 Jan VeselyR600: Use c++11 style for loop
2015-03-01 Benjamin KramerMake some non-constant static variables non-static...
2015-02-28 Benjamin KramerArrayRefize memory operand folding. NFC.
2015-02-27 Tom StellardR600/SI: Add missing mubuf instructions
2015-02-27 Tom StellardR600/SI: Consistently put soffset before the offset...
2015-02-27 Tom StellardR600/SI: Add slc, glc, and tfe to non-atomic _ADDR64...
2015-02-26 Tom StellardR600/SI: Remove M0 from DS assembly strings
2015-02-26 Eric ChristopherRemove an argument-less call to getSubtargetImpl from...
2015-02-24 Tom StellardR600/SI: Remove isel mubuf legalization
2015-02-21 Matt ArsenaultR600/SI: Use v_madmk_f32
2015-02-21 Matt ArsenaultR600/SI: Try to use v_madak_f32
2015-02-21 Matt ArsenaultR600/SI: Don't crash when getting immediate operand...
2015-02-21 Matt ArsenaultR600/SI: Fix mad*k definitions
2015-02-21 Tim NorthoverCodeGen: convert CCState interface to using ArrayRefs
2015-02-20 Matt ArsenaultR600/SI: Remove v_sub_f64 pseudo
2015-02-20 Matt ArsenaultR600: Use new fmad node.
2015-02-19 Michael KupersteinReverting r229831 due to multiple ARM/PPC/MIPS build...
2015-02-19 Michael KupersteinUse std::bitset for SubtargetFeatures
2015-02-19 Eric ChristopherRemove a few more calls to TargetMachine::getSubtarget...
2015-02-19 Eric ChristopherGrab the subtarget off of the machine function for...
2015-02-19 Eric ChristopherRemove the DisasmEnabled AsmPrinter variable and just...
2015-02-19 Eric Christopher80-column fixups.
2015-02-18 Marek OlsakR600/SI: Fix READLANE and WRITELANE lane select for VI
2015-02-18 Marek OlsakR600/SI: Simplify verification of AMDGPU::OPERAND_REG_I...
2015-02-18 Marek OlsakR600/SI: Remove explicit VOP operand checking
2015-02-18 Tom StellardR600/SI: Don't set isCodeGenOnly = 1 on all instructions
2015-02-18 Tom StellardR600/SI: Add missing VOP1 instructions
2015-02-18 Tom StellardR600/SI: Add missing VOP2 instructions
2015-02-18 Tom StellardR600/SI: Add definition for S_CBRANCH_G_FORK
2015-02-18 Tom StellardR600/SI: Add missing SOP1 instructions
2015-02-18 Tom StellardR600/SI: Refactor SOP2 definitions
2015-02-18 Matt ArsenaultR600/SI: Rename dst encoding field to be consistent...
2015-02-18 Matt ArsenaultR600/SI: Consistently capitalize encoding field names
2015-02-18 Matt ArsenaultR600/SI: Set noNamedPositionallyEncodedOperands
2015-02-18 Matt ArsenaultR600/SI: Fix src1_modifiers for class instructions
2015-02-18 Matt ArsenaultR600/SI: Fix not setting clamp / omod for v_cndmask_b32_e64
2015-02-18 Matt ArsenaultR600: Fix operand encoding error
2015-02-18 Matt ArsenaultR600/SI: Fix encoding error from glc bit on VI SMRD...
2015-02-18 Matt ArsenaultR600/SI: Fix operand encoding for flat instructions
2015-02-18 Matt ArsenaultR600/SI: Fix error from vdst on no return atomics
2015-02-18 Matt ArsenaultR600/SI: Add missing offset operand to buffer bothen
2015-02-18 Matt ArsenaultR600/SI: Add missing soffset operand to global atomics
2015-02-18 Matt ArsenaultR600/SI: Fix brace identation
2015-02-17 Tom StellardR600/SI: Fix asam errors in SIFoldOperands
2015-02-17 Tom StellardR600/SI: Extend private extload pattern to include...
2015-02-17 Benjamin KramerPrefer SmallVector::append/insert over push_back loops.
2015-02-16 Andrew TrickAArch64: Safely handle the incoming sret call argument.
2015-02-15 Aaron BallmanRemoving LLVM_DELETED_FUNCTION, as MSVC 2012 was the...
2015-02-14 Matt ArsenaultR600/SI: Implement correct f64 fdiv
2015-02-14 Matt ArsenaultR600/SI: Use complex operand folding for div_scale
2015-02-14 Matt ArsenaultR600/SI: Fix implicit vcc operand to v_div_fmas_*
2015-02-14 Matt ArsenaultR600/SI: Fix schedule model for v_div_scale_{f32|f64}
2015-02-14 Matt ArsenaultR600/SI: Really fix size of VReg_1
2015-02-14 Matt ArsenaultR600/SI: Rename encoding field to match docs for VOP3b
2015-02-14 Matt ArsenaultR600/SI: Fix not encoding src2 for v_div_scale_{f32...
2015-02-14 Matt ArsenaultR600/SI: Fix VOP3b encoding on VI
2015-02-14 Matt ArsenaultR600/SI: Fix phys reg copies in SIFoldOperands
2015-02-14 Matt ArsenaultR600/SI: Fix copies from SGPR to VCC
2015-02-14 Matt ArsenaultR600/SI: Add hack to copy from a VGPR to VCC
2015-02-14 Matt ArsenaultR600/SI: Fix size of VReg_1
2015-02-14 Duncan P. N. Exon... R600: Canonicalize access to function attributes, NFC
2015-02-13 Tom StellardR600/SI: Refactor SOP1 classes
2015-02-13 Tom StellardR600/SI: Lowercase register names
2015-02-13 Tom StellardR600/SI: Remove some unused TableGen classes
2015-02-13 Matt ArsenaultR600/SI: Remove handling of fpimm
2015-02-13 Matt ArsenaultR600/SI: Allow f64 inline immediates in i64 operands
2015-02-13 Chandler Carruth[PM] Remove the old 'PassManager.h' header file at...
2015-02-13 Matt ArsenaultR600/SI: Remove unnecessary check for fpimm
2015-02-12 Benjamin KramerMathExtras: Bring Count(Trailing|Leading)Ones and Count...
2015-02-11 Tom StellardR600/SI: Disable subreg liveness
2015-02-11 Tom StellardR600: Split AMDGPUPassConfig into R600PassConfig and...
2015-02-11 Tom StellardR600: Create an R600TargetMachine for pre-gcn GPUs
2015-02-11 Tom StellardR600/SI: Store immediate offsets > 12-bits in soffset
2015-02-11 Tom StellardR600/SI: Add soffset operand to mubuf addr64 instruction
2015-02-06 Benjamin KramerMake helper functions/classes/globals static. NFC.
2015-02-06 Michel DanzerR600/SI: Don't enable WQM for V_INTERP_* instructions v2
2015-02-06 Michel DanzerR600/SI: Also enable WQM for image opcodes which calcul...
2015-02-05 Tom StellardR600/SI: Fix bug in TTI loop unrolling preferences
2015-02-05 Tom StellardR600/SI: Fix bug from insertion of llvm.SI.end.cf into...
2015-02-05 Matt ArsenaultR600/SI: Fix i64 truncate to i1
2015-02-04 Tom StellardR600/SI: Enable subreg liveness by default
2015-02-04 Tom StellardR600/SI: Expand misaligned 16-bit memory accesses
2015-02-04 Tom StellardR600/SI: Make more store operations legal
2015-02-04 Tom StellardR600: Don't promote i64 stores to v2i32 during DAG...
2015-02-03 Marek OlsakR600/SI: Remove useless patterns in VALU which are...
2015-02-03 Marek OlsakR600/SI: Rewrite VOP1InstSI to contain a pseudo and...
2015-02-03 Marek OlsakR600/SI: Fix B64 VALU shifts on VI
2015-02-03 Marek OlsakR600/SI: Don't generate non-existent LSHL, LSHR, ASHR...
2015-02-03 Marek OlsakR600/SI: Remove VOP2_REV definitions from target-specif...
2015-02-03 Marek OlsakR600/SI: Trivial instruction definition corrections...
2015-02-03 Marek OlsakR600/SI: Determine target-specific encoding of READLANE...
2015-02-03 Marek OlsakR600/SI: Fix dependency between instruction writing...
2015-02-02 Tom StellardR600/SI: 64-bit and larger memory access must be at...
2015-02-01 Chandler Carruth[multiversion] Remove the function parameter from the...
2015-02-01 Chandler Carruth[multiversion] Switch the TTI queries from TargetMachin...
2015-02-01 Chandler Carruth[multiversion] Remove the cached TargetMachine pointer...
2015-02-01 Chandler Carruth[multiversion] Switch all of the targets over to use the
2015-02-01 Chandler Carruth[multiversion] Remove a false freedom to leave the...
2015-02-01 Chandler Carruth[PM] Remove a bunch of stale TTI creation method declar...
2015-01-31 Matt ArsenaultFix typo
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