Revert 239644.
[oota-llvm.git] / lib / Target / R600 / R600RegisterInfo.cpp
2015-03-11 Eric ChristopherRemove the need to cache the subtarget in the R600...
2014-06-13 Tom StellardR600: Remove AMDIL instruction and register definitions
2014-06-13 Tom StellardR600: Move AMDGPUInstrInfo from AMDGPUTargetMachine...
2013-11-15 Tom StellardR600: Fix scheduling of instructions that use the LDS...
2013-11-13 Tom StellardR600/SI: Add support for private address space load...
2013-10-22 Tom StellardR600: Simplify handling of private address space
2013-08-14 Tom StellardR600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
2013-06-07 Bill WendlingDon't cache the instruction and register info from...
2013-05-17 Vincent LejeuneR600: Use bottom up scheduling algorithm
2013-02-19 Tom StellardR600: Mark all members of the TRegMem register class...
2013-02-07 Tom StellardR600: Consolidate sub register indices.
2013-02-06 Tom StellardR600: Support for indirect addressing v4
2013-02-05 Tom StellardR600: improve inputs/interpolation handling
2013-01-23 Tom StellardR600: rework handling of the constants
2012-12-11 Tom StellardAdd R600 backend