| 2013-12-28 |
Andrew Trick | New machine model for cortex-a9. Schedule for resources... |
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| 2013-12-28 |
Andrew Trick | The Cortex-A9 machine model is incomplete. Mark it... |
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| 2013-12-05 |
Andrew Trick | MI-Sched: handle latency of in-order operations with... |
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| 2013-12-05 |
Andrew Trick | Fix the A9 machine model. VTRN writes two registers. |
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| 2013-12-05 |
Alp Toker | Correct word hyphenations |
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| 2013-09-04 |
Silviu Baranga | Fix scheduling for vldm/vstm instructions that load... |
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| 2013-06-15 |
Andrew Trick | Update machine models. Specify buffer sizes for OOO... |
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| 2013-06-15 |
Andrew Trick | Machine Model: Add MicroOpBufferSize and resource Buffe... |
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| 2013-06-06 |
Arnold Schwaighofer | ARM sched model: Add integer VFP/SIMD instructions... |
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| 2013-06-06 |
Arnold Schwaighofer | ARM sched model: Cortex A9 - More InstRW sched resources |
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| 2013-06-05 |
Arnold Schwaighofer | ARM sched model: Add divsion, loads, branches, vfp cvt |
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| 2013-06-04 |
Arnold Schwaighofer | Revert series of sched model patches until I figure... |
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| 2013-06-04 |
Arnold Schwaighofer | ARM sched model: Cortex A9 - More InstRW sched resources |
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| 2013-06-04 |
Arnold Schwaighofer | ARM sched model: Add divsion, loads, branches, vfp cvt |
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| 2013-04-05 |
Arnold Schwaighofer | ARM scheduler model: Add scheduler info to more instruc... |
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| 2013-04-01 |
Arnold Schwaighofer | ARM Scheduler Model: Add resources instructions, map... |
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| 2013-03-26 |
Arnold Schwaighofer | Revert ARM Scheduler Model: Add resources instructions... |
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| 2013-03-26 |
Arnold Schwaighofer | ARM Scheduler Model: Add resources instructions, map... |
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| 2013-01-09 |
Andrew Trick | MIsched: add an ILP window property to machine model. |
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| 2012-09-21 |
Andrew Trick | Cortex-A9 latency fixes (w/ -schedmodel only). |
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| 2012-09-14 |
Andrew Trick | Cortex-A9 instruction-level scheduling machine model. |
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| 2012-08-08 |
Andrew Trick | Added MispredictPenalty to SchedMachineModel. |
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| 2012-07-07 |
Andrew Trick | I'm introducing a new machine model to simultaneously... |
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| 2012-07-02 |
Andrew Trick | Reapply "Make NumMicroOps a variable in the subtarget... |
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| 2012-06-29 |
Andrew Trick | Revert "Make NumMicroOps a variable in the subtarget... |
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| 2012-06-29 |
Andrew Trick | Make NumMicroOps a variable in the subtarget's instruct... |
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| 2012-06-05 |
Andrew Trick | ARM itinerary properties. |
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| 2012-04-11 |
Evan Cheng | Fix a number of problems with ARM fused multiply add... |
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| 2011-04-19 |
Bob Wilson | Improvements for the Cortex-A9 scheduling itineraries. |
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| 2011-04-19 |
Evan Cheng | Change A9 scheduling itineraries VLD* / VST* entries... |
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| 2011-01-20 |
Evan Cheng | Sorry, several patches in one. |
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| 2011-01-04 |
Andrew Trick | Fix the ARM IIC_iCMPsi itinerary and add an important... |
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| 2010-12-08 |
Evan Cheng | Fix an obvious cut-n-paste error. |
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| 2010-11-30 |
Bob Wilson | Add support for NEON VLD3-dup instructions. |
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| 2010-11-29 |
Bob Wilson | Add support for NEON VLD3-dup instructions. |
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| 2010-11-29 |
Bob Wilson | Fix copy-and-paste errors in VLD2-dup scheduling itiner... |
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| 2010-11-28 |
Bob Wilson | Add support for NEON VLD2-dup instructions. |
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| 2010-11-27 |
Bob Wilson | Add NEON VLD1-dup instructions (load 1 element to all... |
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| 2010-11-27 |
Bob Wilson | Fix incorrect scheduling itineraries for NEON vld1... |
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| 2010-11-13 |
Evan Cheng | Conditional moves are slightly more expensive than... |
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| 2010-11-03 |
Evan Cheng | Fix preload instruction isel. Only v7 supports pli... |
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| 2010-11-03 |
Evan Cheng | Modify scheduling itineraries to correct instruction... |
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| 2010-11-02 |
Bob Wilson | Add NEON VST1-lane instructions. Partial fix for Radar... |
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| 2010-11-01 |
Bob Wilson | Add NEON VLD1-lane instructions. Partial fix for Radar... |
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| 2010-10-29 |
Evan Cheng | Fix fpscr <-> GPR latency info. |
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| 2010-10-28 |
Evan Cheng | Re-commit 117518 and 117519 now that ARM MC test failur... |
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| 2010-10-28 |
Evan Cheng | Revert 117518 and 117519 for now. They changed scheduli... |
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| 2010-10-28 |
Evan Cheng | - Assign load / store with shifter op address modes... |
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| 2010-10-21 |
Andrew Trick | putback r116983 and fix simple-fp-encoding.ll tests |
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| 2010-10-21 |
Owen Anderson | Revert r116983, which is breaking all the buildbots. |
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| 2010-10-21 |
Evan Cheng | Add missing scheduling itineraries for transfers betwee... |
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| 2010-10-13 |
Evan Cheng | Limit load / store issues (at least until we have a... |
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| 2010-10-11 |
Evan Cheng | More ARM scheduling itinerary fixes. |
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| 2010-10-11 |
Evan Cheng | Proper VST scheduling itineraries. |
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| 2010-10-09 |
Evan Cheng | Add VLD4 scheduling itineraries. |
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| 2010-10-09 |
Evan Cheng | Finish vld3 and vld4. |
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| 2010-10-09 |
Evan Cheng | Correct some load / store instruction itinerary mistakes: |
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| 2010-10-07 |
Evan Cheng | Model operand cycles of vldm / vstm; also fixes schedul... |
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| 2010-10-06 |
Evan Cheng | - Add TargetInstrInfo::getOperandLatency() to compute... |
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| 2010-10-03 |
Evan Cheng | Major changes to Cortex-A9 itinerary. |
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| 2010-10-01 |
Evan Cheng | Fix r115332: correctly model AGU / NEON mux. |
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| 2010-10-01 |
Evan Cheng | Add operand cycles for vldr / vstr. |
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| 2010-10-01 |
Evan Cheng | NEON scheduling info fix. vmov reg, reg are single... |
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| 2010-10-01 |
Evan Cheng | Per Cortex-A9 pipeline diagram. AGU (core load / store... |
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| 2010-09-30 |
Evan Cheng | ARM instruction itinerary fixes: |
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| 2010-09-29 |
Evan Cheng | Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC... |
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| 2010-09-29 |
Evan Cheng | Separate itinerary classes for mvn from mov; for tst... |
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| 2010-09-29 |
Evan Cheng | Assign bitwise binary instructions different itinerary... |
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| 2010-09-28 |
Evan Cheng | Add support to model pipeline bypass / forwarding. |
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| 2010-09-25 |
Evan Cheng | Fix IIC_iEXTAr itinerary class of Cortex-A9. |
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| 2010-09-25 |
Evan Cheng | Remove a unused instruction itinerary class. |
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| 2010-09-25 |
Evan Cheng | Fix zero and sign extension instructions scheduling... |
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| 2010-09-24 |
Evan Cheng | More pseudo instruction scheduling itinerary fixes. |
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| 2010-09-24 |
Evan Cheng | Fix scheduling itinerary for pseudo mov immediate instr... |
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| 2010-09-08 |
Evan Cheng | Fix LDM_RET schedule itinery. |
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| 2010-06-28 |
Jim Grosbach | minor housekeeping cleanup: 80-column, trailing whitesp... |
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| 2010-05-29 |
Anton Korobeynikov | Some A9 load/store cleanups |
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| 2010-05-29 |
Anton Korobeynikov | Some rough approximations for load/stores on A9 |
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| 2010-05-29 |
Anton Korobeynikov | NEON/VFP stuff can be issued only via Pipe1 on A9 |
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| 2010-05-29 |
Anton Korobeynikov | Add some integer instruction itineraries for A9 |
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| 2010-04-18 |
Anton Korobeynikov | Make processor FUs unique for given itinerary. This... |
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| 2010-04-07 |
Anton Korobeynikov | Split A8/A9 itins - they already were too big. |
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projects / oota-llvm.git / history