Encode the multi-load/store instructions with their respective modes ('ia',
[oota-llvm.git] / lib / Target / ARM / ARMInstrThumb.td
2010-11-16 Bill WendlingEncode the multi-load/store instructions with their...
2010-11-13 Bill WendlingComment out the defms until they're activated.
2010-11-13 Bill WendlingAdd uses of the *_ldst_multi multiclasses. These aren...
2010-11-13 Bill WendlingConvert the modes to lower case.
2010-11-13 Bill WendlingAdd *_ldst_mult multiclasses to the ARM back-end. These...
2010-11-03 Jim GrosbachBreak ARM addrmode4 (load/store multiple base address...
2010-11-01 Jim GrosbachAdd 'IsThumb' predicate to patterns marked as 'IsThumb1...
2010-11-01 Chris Lattnerreject instructions that contain a \n in their asmstrin...
2010-10-31 Chris Lattnertwo changes: make the asmmatcher generator ignore ARM...
2010-10-31 Chris Lattnerreapply r117858 with apparent editor malfunction fixed...
2010-10-31 Chris Lattnerrevert r117858 while I check out a failure I missed.
2010-10-31 Chris Lattnerthe asm matcher can't handle operands with modifiers...
2010-10-06 Jim GrosbachKill of the vestiges of the 'call' Modifier (no longer...
2010-10-06 Evan Cheng- Add TargetInstrInfo::getOperandLatency() to compute...
2010-10-01 Jim GrosbachNuke the rest of the :comment references
2010-09-30 Jim GrosbachNuke a few more unused asm strings
2010-09-30 Jim GrosbachThe asm strings are never used at all, so just nuke...
2010-09-30 Jim GrosbachGo ahead and jump!
2010-09-30 Evan ChengARM instruction itinerary fixes:
2010-09-29 Evan ChengSeparate itinerary classes for mvn from mov; for tst...
2010-09-29 Evan ChengAssign bitwise binary instructions different itinerary...
2010-09-23 Owen AndersonRevert r114703 and r114702, removing the isConditionalM...
2010-09-23 Owen AndersonAdd isConditionalMove bits to X86 and ARM instructions.
2010-09-23 Jim GrosbachClean up the 'trap' instruction printing a bit. Non...
2010-09-14 Gabor Greifset isCompare for another three Thumb1 instructions
2010-09-14 Gabor Greifset comparable for a bunch of Thumb instructions
2010-09-09 Evan ChengFor each instruction itinerary class, specify the numbe...
2010-09-07 Jim Grosbachgrammar tweak
2010-08-30 Jim GrosbachMake ARM add rN, sp, #imm instructions rematerializable...
2010-08-10 Evan ChengDelete some unused instructions.
2010-07-31 Bob WilsonMove newlines before inline jumptables from the asm...
2010-06-21 Jim GrosbachLEApcrelJT shouldn't be marked as neverHasSideEffects...
2010-06-02 Jim GrosbachClean up 80 column violations. No functional change.
2010-05-28 Jim GrosbachCosmetic cleanup. No functional change.
2010-05-28 Jim Grosbachmake sure accesses to set up the jmpbuf don't get moved...
2010-05-27 Jim GrosbachUpdate the saved stack pointer in the sjlj function...
2010-05-26 Jim Grosbachfix off by 1 (insn) error in eh.sjlj.setjmp thumb code...
2010-05-22 Jim GrosbachImplement eh.sjlj.longjmp for ARM. Clean up the intrins...
2010-05-19 Evan Chengt2LEApcrel and tLEApcrel are re-materializable. This...
2010-05-19 Evan ChengMark pattern-less mayLoad / mayStore instructions never...
2010-05-19 Evan ChengMark a few more pattern-less instructions with neverHas...
2010-05-17 Bob WilsonFix a regression in 464.h264 for thumb1 and thumb2...
2010-05-16 Anton KorobeynikovChris said that the comment char should be escaped...
2010-05-15 Anton Korobeynikov"trap" pseudo-op turned out to be apple-local.
2010-05-11 Evan ChengSelect @llvm.trap to the special B with 1111 condition...
2010-03-19 Chris Lattnerset SDNPVariadic on nodes throughout the rest of the...
2010-03-16 Bob WilsonRemove the writeback flag from ARM's address mode 4...
2010-03-13 Bob WilsonChange ARM ld/st multiple instructions to have variant...
2010-03-10 Johnny ChenFactored out the disassembly printing of CPS option...
2010-03-03 Johnny ChenModified the asm string of 16-bit Thumb MUL instruction...
2010-03-02 Johnny ChenAdded 32-bit Thumb instructions: CPS, SDIV, UDIV, SXTB1...
2010-02-27 Dan GohmanThe mayHaveSideEffects flag is no longer used.
2010-02-25 Johnny ChenAdded the following 16-bit Thumb instructions for disas...
2010-02-25 Johnny ChenAdded tNOP for disassembly only.
2010-02-25 Johnny ChenAdded tSVC and tTRAP for disassembly only.
2010-02-22 Jim GrosbachUpdated version of r96634 (which was reverted due to...
2010-02-16 Jim Grosbach80 column cleanup
2010-02-16 Jim GrosbachRemove trailing whitespace
2010-02-11 Johnny ChenAdded BKPT/tBKPT (breakpoint) to the instruction table...
2010-02-09 Jim GrosbachRadar 7417921
2010-02-08 Jim Grosbachtighten up eh.setjmp sequence a bit.
2010-01-27 Jim GrosbachAdjust setjmp instruction sequence to not need 32-bit...
2010-01-22 Jim GrosbachFix PR5694. The CMN instructions set the flags differen...
2010-01-18 Johnny ChenThe most significant encoding bit of GPR:$src or GPR...
2010-01-14 Johnny ChenAdded 16-bit Thumb Load/Store immediate instructions...
2010-01-13 Johnny ChenFixed a couple of places for Thumb MOV where encoding...
2010-01-13 Jakob Stoklund OlesenRemove the JustSP single-register regclass.
2009-12-22 Jakob Stoklund OlesenAdd a SPR register class to the ARM target.
2009-12-16 Johnny ChenRenamed "tCMNZ" to "tCMNz" to be consistent with other...
2009-12-16 Johnny ChenAdd encoding bits for some Thumb instructions. Plus...
2009-12-15 Johnny ChenAdded encoding bits for the Thumb ISA. Initial checkin.
2009-12-01 Jim GrosbachThumb1 exception handling setjmp
2009-11-20 Evan ChengRemat VLDRD from constpool. Clean up some instruction...
2009-11-19 Evan ChengMore consistent thumb1 asm printing.
2009-11-06 Evan Cheng- Add pseudo instructions tLDRpci_pic and t2LDRpci_pic...
2009-11-04 Evan ChengThe .n suffix must go after the predicate.
2009-11-04 Evan ChengUse ldr.n to workaround a darwin assembler bug.
2009-11-03 Bob WilsonFor Thumb indirect branches, use "mov pc, reg" which...
2009-11-02 Bob WilsonPut BlockAddresses into ARM constant pools.
2009-10-31 Evan ChengUse cbz and cbnz instructions.
2009-10-30 Bob WilsonAdd ARM codegen for indirect branches.
2009-10-29 Dan GohmanRename usesCustomDAGSchedInserter to usesCustomInserter...
2009-10-28 Bob WilsonAdd a Thumb BRIND pattern. Change the ARM BRIND assemb...
2009-10-27 Evan ChengChange Thumb1 and Thumb2 instructions to separate opcod...
2009-10-01 Evan ChengAdd hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq...
2009-10-01 Evan ChengChange ld/st multiples to explicitly model the writebac...
2009-09-30 Jim GrosbachAdd "isBarrier = 1" to return instructions.
2009-09-09 Evan ChengRemove comments which don't add much to .s readibility.
2009-09-03 David GoodwinCalls clobber FPSCR.
2009-08-31 Evan ChengRemove .n suffix for some 16-bit opcodes now that Darwi...
2009-08-28 Evan ChengPrint a nl before pic labels so they start at a new...
2009-08-28 Evan Chengv4, v5 does not support sxtb / sxth.
2009-08-21 Bob WilsonRename ARM "lane_cst" operands to "nohash_imm" since...
2009-08-20 Evan ChengFix an obvious copy-n-paste bug.
2009-08-19 David GoodwinUpdate Cortex-A8 instruction itineraries for integer...
2009-08-18 Evan ChengFix revsh pattern.
2009-08-14 Evan ChengAlso shrink immediate branches; also more assembler...
2009-08-14 Evan ChengShrink ADR and LDR from constantpool late during consta...
2009-08-13 David GoodwinFinalize itineraries for cortex-a8 integer multiply
2009-08-12 David GoodwinEnhance the InstrStage object to enable the specificati...
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