| 2009-12-12 |
Jim Grosbach | Framework for atomic binary operations. The emitter... |
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| 2009-12-11 |
Jim Grosbach | memory barrier instructions by definition have side... |
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| 2009-12-11 |
Jim Grosbach | Update properties. |
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| 2009-12-11 |
Jim Grosbach | Rough first pass at compare_and_swap atomic builtins... |
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| 2009-12-10 |
Jim Grosbach | Add instruction encoding for DMB/DSB |
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| 2009-12-10 |
Jim Grosbach | Add memory barrier intrinsic support for ARM. Moving... |
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| 2009-11-30 |
Bob Wilson | Fix some more ARM unified syntax warnings. |
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| 2009-11-24 |
Anton Korobeynikov | Materialize global addresses via movt/movw pair, this... |
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| 2009-11-23 |
Dan Gohman | Remove ISD::DEBUG_LOC and ISD::DBG_LABEL, which are... |
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| 2009-11-23 |
Jim Grosbach | fold immediate of a + Const into the user as a subtract... |
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| 2009-11-20 |
Evan Cheng | Remat VLDRD from constpool. Clean up some instruction... |
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| 2009-11-18 |
Bob Wilson | Fix a few places that were missed when we converted... |
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| 2009-11-17 |
Johnny Chen | Set Inst{15-12} (Rd/Rt) to 0b1111 (PC) for BR_JTadd... |
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| 2009-11-16 |
Johnny Chen | Set Rm bits of BX_RET to 0b1110 (R14); and set conditio... |
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| 2009-11-09 |
Jim Grosbach | Use Unified Assembly Syntax for the ARM backend. |
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| 2009-11-07 |
Jim Grosbach | Support alignment specifier for NEON vld/vst instructions |
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| 2009-11-07 |
Johnny Chen | My previous patch (r84124) for setting the encoding... |
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| 2009-11-02 |
Bob Wilson | Put BlockAddresses into ARM constant pools. |
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| 2009-11-02 |
David Goodwin | Fix schedule model for BFC. |
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| 2009-10-30 |
Bob Wilson | Add ARM codegen for indirect branches. |
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| 2009-10-28 |
Bob Wilson | Add a Thumb BRIND pattern. Change the ARM BRIND assemb... |
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| 2009-10-28 |
Bob Wilson | Add an indirect branch pattern for ARM. Testcase will... |
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| 2009-10-27 |
Johnny Chen | Similar to r85280, do not clear the "S" bit for RSBri... |
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| 2009-10-27 |
Johnny Chen | Set condition code bits of BL and BLr9 to 0b1110 (ALway... |
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| 2009-10-27 |
Bob Wilson | Do not clear the "S" bit for RSCri and RSCrs. They... |
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| 2009-10-27 |
Johnny Chen | Explicitly specify 0b00, i.e, zero rotation, as the... |
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| 2009-10-26 |
Evan Cheng | Change ARM asm strings to separate opcode from operands... |
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| 2009-10-26 |
Bob Wilson | Try to get ahead of Johnny Chen and pro-actively add... |
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| 2009-10-26 |
Bob Wilson | Add more ARM instruction encodings for 's' bit set... |
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| 2009-10-21 |
Jim Grosbach | Improve handling of immediates by splitting 32-bit... |
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| 2009-10-21 |
Evan Cheng | Match more patterns to movt. |
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| 2009-10-20 |
Chris Lattner | implement printSORegOperand, add lowering for the nasty... |
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| 2009-10-14 |
Bob Wilson | Set instruction encoding bits 4 and 7 for ARM register... |
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| 2009-10-13 |
Sandeep Patel | Add ARMv6T2 SBFX/UBFX instructions. Approved by Anton... |
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| 2009-10-13 |
Bob Wilson | Add some ARM instruction encoding bits. |
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| 2009-10-13 |
Bob Wilson | Fix a tab. Thanks to Johnny Chen for pointing it out. |
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| 2009-10-09 |
Dan Gohman | Mark the LDR instruction with isReMaterializable, as... |
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| 2009-10-06 |
Bob Wilson | Fix a comment typo. |
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| 2009-10-01 |
Evan Cheng | Add hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq... |
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| 2009-10-01 |
Evan Cheng | Change ld/st multiples to explicitly model the writebac... |
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| 2009-09-30 |
Jim Grosbach | Add "isBarrier = 1" to return instructions. |
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| 2009-09-28 |
Evan Cheng | Make ARM and Thumb2 32-bit immediate materialization... |
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| 2009-09-28 |
Anton Korobeynikov | Fix thinko in my recent movt commit: it's not safe... |
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| 2009-09-27 |
Anton Korobeynikov | Use movt/movw pair to materialize 32 bit constants... |
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| 2009-09-09 |
Evan Cheng | Fix arm jit encoding bug introduced by 75048. Some... |
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| 2009-09-03 |
David Goodwin | Calls clobber FPSCR. |
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| 2009-09-01 |
David Goodwin | RRX reads CPSR. |
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| 2009-08-28 |
Evan Cheng | Print a nl before pic labels so they start at a new... |
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| 2009-08-27 |
Misha Brukman | STRD and LDRD require ARMv5TE, not just ARMv5T. |
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| 2009-08-21 |
Bob Wilson | Rename ARM "lane_cst" operands to "nohash_imm" since... |
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| 2009-08-19 |
David Goodwin | Update Cortex-A8 instruction itineraries for integer... |
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| 2009-08-13 |
Jim Grosbach | Add missing defs of R2 and D1. |
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| 2009-08-13 |
David Goodwin | Finalize itineraries for cortex-a8 integer multiply |
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| 2009-08-13 |
Jim Grosbach | Remove unnecessary newline |
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| 2009-08-13 |
Jim Grosbach | Correct comment wording |
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| 2009-08-12 |
David Goodwin | Enhance the InstrStage object to enable the specificati... |
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| 2009-08-12 |
Jim Grosbach | register naming cleanup (s/ip/r12/) |
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| 2009-08-11 |
Owen Anderson | Split EVT into MVT and EVT, the former representing... |
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| 2009-08-11 |
Jim Grosbach | SjLj based exception handling unwinding support. This... |
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| 2009-08-10 |
Owen Anderson | Rename MVT to EVT, in preparation for splitting SimpleV... |
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| 2009-08-08 |
Anton Korobeynikov | Use subclassing to print lane-like immediates (w/o... |
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| 2009-08-08 |
Anton Korobeynikov | Use VLDM / VSTM to spill/reload 128-bit Neon registers |
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| 2009-08-06 |
David Goodwin | Add parameter to pattern classes to enable an itinerary... |
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| 2009-08-04 |
David Goodwin | Initial support for single-precision FP using NEON... |
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| 2009-07-29 |
Evan Cheng | Make sure Thumb2 uses the right call instructions. |
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| 2009-07-29 |
Evan Cheng | - Fix an obvious copy and paste error. |
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| 2009-07-29 |
Evan Cheng | Optimize Thumb2 jumptable to use tbb / tbh when all... |
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| 2009-07-28 |
Evan Cheng | In thumb2 mode, add pc is unpredictable. Use add +... |
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| 2009-07-25 |
Evan Cheng | Change Thumb2 jumptable codegen to one that uses two... |
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| 2009-07-22 |
Evan Cheng | Use getTargetConstant instead of getConstant since... |
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| 2009-07-22 |
Evan Cheng | Don't forget D16 - D31 are clobbered by calls and sjlj eh. |
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| 2009-07-14 |
Evan Cheng | 1. In Thumb mode, select tBx instead of ARM variants. |
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| 2009-07-14 |
David Goodwin | Fix detection of valid BFC immediates. |
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| 2009-07-11 |
Evan Cheng | Major changes to Thumb (not Thumb2). Many 16-bit instru... |
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| 2009-07-09 |
Evan Cheng | LDM_RET should be marked mayLoad. |
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| 2009-07-08 |
Evan Cheng | Change how so_imm and t2_so_imm are handled. At instruc... |
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| 2009-07-07 |
Evan Cheng | Also statically set bit 25 for BR_JT instructions. |
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| 2009-07-07 |
Evan Cheng | Statically encode bit 25 to indicate immediate form... |
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| 2009-07-07 |
Evan Cheng | Add BX and BXr9 encodings. Patch by Sean Callanan. |
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| 2009-07-06 |
Evan Cheng | Add bfc to armv6t2. |
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| 2009-07-06 |
Evan Cheng | Added ARM::mls for armv6t2. |
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| 2009-07-02 |
Evan Cheng | Change the meaning of predicate hasThumb2 to mean thumb... |
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| 2009-07-02 |
Evan Cheng | 80 col violation. |
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| 2009-07-01 |
Bob Wilson | Add a new addressing mode for NEON load/store instructions. |
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| 2009-06-29 |
David Goodwin | Rename ARMcmpNZ to ARMcmpZ and use it to represent... |
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| 2009-06-29 |
Evan Cheng | Implement Thumb2 ldr. |
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| 2009-06-26 |
Evan Cheng | Simplify predicate CarryDefIsUsed. |
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| 2009-06-26 |
Evan Cheng | Mark a bunch of instructions commutable. |
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| 2009-06-25 |
Evan Cheng | Select ADC, SBC, and RSC instead of the ADCS, SBCS... |
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| 2009-06-25 |
Evan Cheng | ISD::ADDE / ISD::SUBE updates the carry bit so they... |
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| 2009-06-24 |
Evan Cheng | 80 col violation. |
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| 2009-06-23 |
Evan Cheng | Initial Thumb2 support. Majority of the work is done... |
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| 2009-06-23 |
Evan Cheng | Minor reorg. |
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| 2009-06-22 |
Bob Wilson | Add support for ARM's Advanced SIMD (NEON) instruction... |
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| 2009-06-22 |
Bob Wilson | Add explicit types for shift count constants. This... |
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| 2009-06-22 |
Bob Wilson | For Darwin on ARMv6 and newer, make register r9 availab... |
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| 2009-06-19 |
Evan Cheng | Latency information for ARM v6. It's rough and not... |
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| 2009-06-17 |
Anton Korobeynikov | Initial support for some Thumb2 instructions. |
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| 2009-06-15 |
Anton Korobeynikov | Rename methods for the sake of consistency. |
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| 2009-06-15 |
Evan Cheng | Part 1. |
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