Set instruction encoding bits 4 and 7 for ARM register-register and
authorBob Wilson <bob.wilson@apple.com>
Wed, 14 Oct 2009 19:00:24 +0000 (19:00 +0000)
committerBob Wilson <bob.wilson@apple.com>
Wed, 14 Oct 2009 19:00:24 +0000 (19:00 +0000)
commit8e86b5195bca5a7301bb3d633b56b1d1f58221d9
tree746446b5be9f293dd46d5a44d174543324906df9
parent24f995d84b1fcb556f07ee40983f287cd13b2aa2
Set instruction encoding bits 4 and 7 for ARM register-register and
register-shifted-register instructions.  Patch by Johnny Chen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84124 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrInfo.td