Fix tablegen warning: hasSideEffects is inferred for eh_sjlj_dispatchsetup.
[oota-llvm.git] / lib / Target / ARM / ARMInstrInfo.td
2011-11-16 Bob WilsonFix tablegen warning: hasSideEffects is inferred for...
2011-11-16 Bob WilsonFix ARM SjLj-EH dispatch setup code. <rdar://problem...
2011-11-15 Jim GrosbachARM assembly parsing two operand forms for shift instru...
2011-11-15 Jim GrosbachARM assembly parsing for two-operand form of 'mul'...
2011-11-15 Jay FoadFix typo in comment.
2011-11-12 Jim GrosbachARM refactor simple immediate asm operand render methods.
2011-11-10 Jim GrosbachARM assembly parsing for LSR/LSL/ROR(immediate).
2011-11-10 Jim GrosbachARM assembly parsing for ASR(immediate).
2011-11-10 Jim GrosbachTidy up.
2011-11-04 Evan ChengFix some minor scheduling itinerary bug. It's not expec...
2011-10-28 Jim GrosbachARM mode 'mov' to 'mvn' assembler alias.
2011-10-28 Owen AndersonReapply r143202, with a manual decoding hook for SWP...
2011-10-28 Owen AndersonRevert r143202.
2011-10-28 Owen AndersonSpecify fixed bits on CPS instructions to enable roundt...
2011-10-20 Owen AndersonRevert r142618, r142622, and r142624, which were based...
2011-10-20 Owen AndersonSeparate out ARM MSR instructions into M-class versions...
2011-10-18 Andrew TrickUse ARM/t2PseudoInst class from ARM/Thumb2 special...
2011-10-18 David MeyerRemove NaClMode
2011-10-18 Joe AbbeyCommit test, capitalizing store... keep it simple.
2011-10-17 Bill WendlingNow Igor, throw the switch...give my creation life!
2011-10-12 Jim GrosbachARM parsing and encoding for the <option> form of LDC...
2011-10-11 Jim GrosbachARM assembly parsing and encoding for LDC{2}{L}/STC...
2011-10-11 Jim GrosbachARM addressing mode cleanup for LDC/STC.
2011-10-11 Jim GrosbachARM parse alignment specifier for NEON load/store instr...
2011-10-10 Bill WendlingReapply r141365 now that PR11107 is fixed.
2011-10-10 Jim GrosbachAdd a name to sub-operand for clarity.
2011-10-10 Bill WendlingRevert r141365. It was causing MultiSource/Benchmarks...
2011-10-07 Anton KorobeynikovPeephole optimization for ABS on ARM.
2011-10-04 Kevin EnderbyAdding back support for printing operands symbolically...
2011-09-28 James MolloyCheck in a patch that has already been code reviewed...
2011-09-21 Andrew TrickLower ARM adds/subs to add/sub after adding optional...
2011-09-20 Andrew TrickRestore hasPostISelHook tblgen flag.
2011-09-20 Andrew TrickARM isel bug fix for adds/subs operands.
2011-09-20 Jim GrosbachThumb2 assembly parsing and encoding for USAX.
2011-09-20 Jim GrosbachThumb2 assembly parsing and encoding for UQASX/UQSAX.
2011-09-19 Jim GrosbachThumb2 assembly parsing and encoding for UHASX/UHSAX.
2011-09-19 Jim GrosbachThumb2 assembly parsing and encoding for UASX.
2011-09-16 Jim GrosbachThumb2 assembly parsing and encoding for SSAX.
2011-09-15 Jim GrosbachThumb2 assembly parsing and encoding for SHASX/SHSAX.
2011-09-15 Jim GrosbachThumb2 assembly parsing and encoding for SASX.
2011-09-15 Jim GrosbachARM support the pre-UAL mnemonic 'qsubaddx' for 'qsax.'
2011-09-14 Jim GrosbachARM tighten up the register classes for the PKH instruc...
2011-09-13 Eli FriedmanZap some junk from the ARM instruction descriptions.
2011-09-08 Owen AndersonRemove the "common" set of instructions shared between...
2011-09-07 Jim GrosbachThumb2 parsing and encoding for LDMDB.
2011-09-06 Eli FriedmanAdd mayLoad/mayStore markings to ARM 64-bit atomic...
2011-09-06 Evan ChengFix fall outs from my recent change on how carry bit...
2011-09-06 Jakob Stoklund OlesenAtomic pseudos don't use (as in read) CPSR. They clobbe...
2011-09-05 Nick LewyckyAdd a new MC bit for NaCl (Native Client) mode. NaCl...
2011-08-31 Eli Friedman64-bit atomic cmpxchg for ARM.
2011-08-31 Eli FriedmanSome minor cleanups for r138845.
2011-08-31 Eli FriedmanSome 64-bit atomic operations on ARM. 64-bit cmpxchg...
2011-08-30 Evan ChengFollow up to r138791.
2011-08-30 Evan ChengChange ARM / Thumb2 addc / adde and subc / sube modelin...
2011-08-29 Owen AndersonSpecify an additional fixed bit in the PLD/PLDW/PLI...
2011-08-26 Owen AndersonImprove encoding support for BLX with immediat eoperand...
2011-08-26 Owen Andersoninvalid-LDR_PRE-arm.txt was already passing, but for...
2011-08-26 Owen AndersonSupport an extension of ARM asm syntax to allow immedia...
2011-08-26 Eli FriedmanAtomic load/store on ARM/Thumb.
2011-08-22 Jim GrosbachClean up predicates on ARM target instruction aliases.
2011-08-17 Jim GrosbachFix predicate for imm1_32
2011-08-15 Owen AndersonFix incorrect encoding of UMAAL and friends. Patch...
2011-08-12 Owen AndersonFix some remaining issues with decoding ARM-mode memory...
2011-08-12 Owen AndersonFix decoding of ARM-mode STRH.
2011-08-12 Owen AndersonSpecify fixed bit in the LDRBT encoding, which allows...
2011-08-12 Owen AndersonFix decoding of pre-indexed stores.
2011-08-12 Owen AndersonSeparate decoding for STREXD and LDREXD to make each...
2011-08-11 Jim GrosbachRemove no-longer-true comments. These are for the assem...
2011-08-11 Jim GrosbachARM STRT assembly parsing and encoding.
2011-08-11 Owen AndersonMake the USAT16 operand decoder auto-generate-able.
2011-08-11 Owen AndersonMaking SEL decodings auto-generate-able.
2011-08-11 Jim GrosbachTidy up comment.
2011-08-11 Owen AndersonFix decoding support for STREXD and LDREXD.
2011-08-11 Jim GrosbachARM STRH assembly parsing and encoding.
2011-08-11 Jim GrosbachTidy up. Remove unused template parameter.
2011-08-11 Jim GrosbachARM STRD assembly parsing and encoding.
2011-08-11 Owen AndersonContinue to tighten decoding by performing more operand...
2011-08-11 Jim GrosbachTidy up.
2011-08-11 Jim GrosbachARM STRBT assembly parsing and encoding.
2011-08-11 Jim GrosbachARM STR(immediate) assembly parsing and encoding.
2011-08-11 Owen AndersonTighten operand decoding of addrmode2 instruction....
2011-08-10 Jim GrosbachARM LDRT assembly parsing and encoding.
2011-08-10 Jim GrosbachTidy up. 80 columns.
2011-08-10 Jim GrosbachARM LDRH(immediate) assembly parsing and encoding support.
2011-08-10 Jim GrosbachARM LDRD(register) assembly parsing and encoding.
2011-08-10 Jim GrosbachARM LDRD(immediate) assembly parsing and encoding support.
2011-08-10 Owen AndersonTabs --> spaces.
2011-08-10 Owen AndersonPush GPRnopc through a large number of instruction...
2011-08-09 Owen AndersonTighten operand checking of register-shifted-register...
2011-08-09 Owen AndersonTighten operand checking on memory barrier instructions.
2011-08-09 Owen AndersonTighten operand checking on CPS instructions.
2011-08-09 Owen AndersonCreate a new register class for the set of all GPRs...
2011-08-09 Owen AndersonReplace the existing ARM disassembler with a new one...
2011-08-08 Jim GrosbachARM parsing and encoding for LDRBT instruction.
2011-08-05 Jim GrosbachARM indexed load assembly parsing and encoding.
2011-08-05 Jim GrosbachARM refactor indexed store instructions.
2011-08-05 Jim GrosbachARM use a dedicated printer for postidx_reg operands.
2011-08-04 Jim GrosbachARM assembly parsing and encoding for LDR instructions.
2011-08-04 Owen AndersonLDCL_POST and STCL_POST need one's-complement offsets...
2011-08-03 Jim GrosbachARM refactoring assembly parsing of memory address...
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