| 2010-11-16 |
Bill Wendling | Encode the multi-load/store instructions with their... |
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| 2010-11-15 |
Jim Grosbach | ARM LDR_PRE/LDR_POST/STR_PRE/STR_POST (and the *B count... |
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| 2010-11-15 |
Jim Grosbach | Nuke redundant encoding bit set. |
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| 2010-11-15 |
Chris Lattner | add fields to the .td files unconditionally, simplifyin... |
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| 2010-11-13 |
Bill Wendling | Comment out the defms until they're activated. |
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| 2010-11-13 |
Bill Wendling | Add uses of the *_ldst_multi multiclasses. These aren... |
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| 2010-11-13 |
Bill Wendling | Convert the modes to lower case. |
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| 2010-11-13 |
Bill Wendling | Minor cleanups: |
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| 2010-11-13 |
Bill Wendling | Add *_ldst_mult multiclasses to the ARM back-end. These... |
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| 2010-11-13 |
Evan Cheng | Conditional moves are slightly more expensive than... |
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| 2010-11-13 |
Evan Cheng | Add conditional move of large immediate. |
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| 2010-11-13 |
Jim Grosbach | Swap multiclass operand order for consistency with... |
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| 2010-11-13 |
Jim Grosbach | Continue ARM indexed load refactoring. Multiclass for... |
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| 2010-11-13 |
Jim Grosbach | More ARM load/store indexed refactoring. Also fix an... |
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| 2010-11-12 |
Evan Cheng | For pre-v6t2 targets, only select MOVi32imm if the... |
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| 2010-11-12 |
Evan Cheng | Eliminate ARM::MOVi2pieces. Just use MOVi32imm and... |
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| 2010-11-12 |
Evan Cheng | Add conditional mvn instructions. |
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| 2010-11-12 |
Jim Grosbach | Zap a copy/paste-o bit of dead code. |
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| 2010-11-12 |
Jim Grosbach | Refactor to parameterize some ARM load/store encoding... |
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| 2010-11-12 |
Jim Grosbach | Fill in the default predication bits for ARM unconditio... |
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| 2010-11-11 |
Jim Grosbach | ARM fixup encoding for direct call instructions (BL). |
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| 2010-11-11 |
Jim Grosbach | Encoding of destination fixup for ARM branch and condit... |
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| 2010-11-11 |
Jim Grosbach | Encoding for ARM LDRSH_POST. |
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| 2010-11-11 |
Jim Grosbach | Encoding for ARM LDRSH and LDRSH_PRE. Cannonicalize... |
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| 2010-11-11 |
Jim Grosbach | Fix encoding of Ra register for ARM smla* instructions. |
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| 2010-11-11 |
Jim Grosbach | ARM STRH encoding information. |
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| 2010-11-10 |
Jim Grosbach | Move LDM predicate operand encoding into base clase... |
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| 2010-11-10 |
Jim Grosbach | ARM LDM encoding for the mode (ia, ib, da, db) operand. |
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| 2010-11-10 |
Jim Grosbach | Fix ARM encoding of non-return LDM instructions. |
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| 2010-11-10 |
Jim Grosbach | Fix ARM encoding of LDM+Return instruction. |
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| 2010-11-09 |
Jim Grosbach | Add encoding of Rt to ARM LDR/STR w/ reg+reg offset... |
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| 2010-11-09 |
Jim Grosbach | Add encoder method for ARM load/store shifted register... |
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| 2010-11-09 |
Bill Wendling | Revert r118457 and r118458. These won't hold for GPRs. |
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| 2010-11-08 |
Bill Wendling | reglist has two operands. |
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| 2010-11-08 |
Bill Wendling | Make RegList an ASM operand so that TableGen will gener... |
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| 2010-11-04 |
Evan Cheng | Fix @llvm.prefetch isel. Selecting between pld / pldw... |
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| 2010-11-03 |
Evan Cheng | Fix preload instruction isel. Only v7 supports pli... |
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| 2010-11-03 |
Evan Cheng | Add support to match @llvm.prefetch to pld / pldw ... |
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| 2010-11-03 |
Bill Wendling | The MC code couldn't handle ARM LDR instructions with... |
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| 2010-11-03 |
Jim Grosbach | Break ARM addrmode4 (load/store multiple base address... |
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| 2010-11-02 |
Chris Lattner | Completely reject instructions that have an operand... |
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| 2010-11-02 |
Bill Wendling | Rename getAddrModeImm12OpValue to getAddrModeImmOpValue... |
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| 2010-11-02 |
Owen Anderson | Rename encoder methods to match naming convention. |
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| 2010-11-02 |
Jim Grosbach | Sort bit assignments. Cosmetic change only. |
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| 2010-11-02 |
Owen Anderson | Add correct NEON encodings for vld2, vld3, and vld4... |
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| 2010-11-02 |
Owen Anderson | Add correct NEON encodings for the "multiple single... |
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| 2010-11-01 |
Bob Wilson | Add support for alignment operands on VLD1-lane instruc... |
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| 2010-11-01 |
Jim Grosbach | Mark ARM subtarget features that are available for... |
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| 2010-10-31 |
Chris Lattner | reapply r117858 with apparent editor malfunction fixed... |
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| 2010-10-31 |
Chris Lattner | revert r117858 while I check out a failure I missed. |
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| 2010-10-31 |
Chris Lattner | the asm matcher can't handle operands with modifiers... |
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| 2010-10-30 |
Bob Wilson | Overhaul memory barriers in the ARM backend. Radar... |
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| 2010-10-30 |
Jim Grosbach | Encode the register list operands for ARM mode LDM... |
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| 2010-10-29 |
Jim Grosbach | s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consi... |
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| 2010-10-29 |
Jim Grosbach | Convert ARM::MOVi2pieces to a true pseudo-instruction... |
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| 2010-10-29 |
Jim Grosbach | Fix typo. |
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| 2010-10-29 |
Jim Grosbach | ARM encoding information for CLREX, SWP and SWPB. Add... |
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| 2010-10-29 |
Jim Grosbach | ARM mode LDREX*/STREX* binary encodings. |
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| 2010-10-29 |
Jim Grosbach | Encoding information for ARM conditional move instructions. |
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| 2010-10-29 |
Chris Lattner | add simple support for addrmode5 operands, allowing |
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| 2010-10-28 |
Jim Grosbach | PLD, PLDW, PLI encodings, plus refactor their use of... |
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| 2010-10-28 |
Evan Cheng | Re-commit 117518 and 117519 now that ARM MC test failur... |
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| 2010-10-28 |
Evan Cheng | Revert 117518 and 117519 for now. They changed scheduli... |
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| 2010-10-28 |
Evan Cheng | - Assign load / store with shifter op address modes... |
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| 2010-10-27 |
Evan Cheng | Shifter ops are not always free. Do not fold them ... |
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| 2010-10-27 |
Jim Grosbach | Refactor ARM STR/STRB instruction patterns into STR... |
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| 2010-10-27 |
Owen Anderson | Provide correct encodings for NEON vcvt, which has... |
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| 2010-10-27 |
Jim Grosbach | ARM JIT fix for LDRi12 and company. |
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| 2010-10-27 |
Jim Grosbach | Split ARM::LDRB into LDRBi12 and LDRBrs. Adjust accordi... |
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| 2010-10-26 |
Jim Grosbach | Since I parameterized this bit, I should probably actua... |
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| 2010-10-26 |
Jim Grosbach | First part of refactoring ARM addrmode2 (load/store... |
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| 2010-10-22 |
Jim Grosbach | Trailing whitespace. |
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| 2010-10-22 |
Jim Grosbach | ARM mode encoding information for CLZ, RBIT, REV*,... |
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| 2010-10-22 |
Jim Grosbach | Add the encoding information for the rest of the ARM... |
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| 2010-10-22 |
Jim Grosbach | More ARM multiply instuction binary encodings. |
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| 2010-10-22 |
Jim Grosbach | Parameterize a bit of ARM encoding information, simplif... |
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| 2010-10-22 |
Jim Grosbach | More ARM multiply instruction encoding information. |
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| 2010-10-21 |
Jim Grosbach | ARM binary encoding for some of the multiply instructions. |
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| 2010-10-21 |
Jim Grosbach | ARM binary encodings for MVN variants. |
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| 2010-10-21 |
Jim Grosbach | ARM Binary encoding information for BFC/BFI instructions. |
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| 2010-10-19 |
Jim Grosbach | Add a pre-dispatch SjLj EH hook on the unwind edge... |
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| 2010-10-18 |
Jim Grosbach | ARM encoding information for [SU]SAT* instructions. |
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| 2010-10-15 |
Jim Grosbach | Encoding information for the various ARM saturating... |
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| 2010-10-15 |
Jim Grosbach | ARM binary encoding information for RSB and RSC instruc... |
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| 2010-10-15 |
Jim Grosbach | ARM mode encoding information for UBFX and SBFX instruc... |
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| 2010-10-15 |
Bob Wilson | Remove unused ARMISD::AND selection DAG node. |
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| 2010-10-15 |
Jim Grosbach | Encoding info for extension instructions. |
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| 2010-10-14 |
Jim Grosbach | Add missing Rd encoding for MOVs instruction. |
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| 2010-10-14 |
Jim Grosbach | Refactor the MOVsr[al]_flag and RRX pseudo-instructions... |
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| 2010-10-14 |
Jim Grosbach | Tweak the ARM backend to use the RRX mnemonic instead... |
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| 2010-10-14 |
Jim Grosbach | MOVi16 and MOVT ARM mode encodings. |
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| 2010-10-14 |
Jim Grosbach | Simplify encoding information and add 'dst' operand... |
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| 2010-10-13 |
Jim Grosbach | Add a FIXME. |
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| 2010-10-13 |
Jim Grosbach | Add operand encoding bits for SMC and SVC in ARM mode. |
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| 2010-10-13 |
Jim Grosbach | More encoding cleanup. Also add register Rd operands... |
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| 2010-10-13 |
Jim Grosbach | Simplify some ARM encoding information. |
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| 2010-10-13 |
Jim Grosbach | Add a FIXME. The ADR instruction is a bit odd. |
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| 2010-10-13 |
Jim Grosbach | Refactor the ARM 'setend' instruction pattern. Use... |
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| 2010-10-13 |
Jim Grosbach | Add a FIXME. |
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| 2010-10-13 |
Jim Grosbach | Make a few more bits of some simple instructions explic... |
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