Use VLDM / VSTM to spill/reload 128-bit Neon registers
[oota-llvm.git] / lib / Target / ARM / ARMInstrFormats.td
2009-08-08 Anton KorobeynikovUse VLDM / VSTM to spill/reload 128-bit Neon registers
2009-08-06 David GoodwinAdd parameter to pattern classes to enable an itinerary...
2009-08-04 Evan ChengFix part 1 of pr4682. PICADD is a 16-bit instruction...
2009-08-04 David GoodwinAdd NEON single-precision FP support for fabs and fneg.
2009-08-04 David GoodwinInitial support for single-precision FP using NEON...
2009-08-01 Evan ChengFix Thumb2 function call isel. Thumb1 and Thumb2 should...
2009-07-27 David GoodwinRemove TPat. No patterns depend on just isThumb()....
2009-07-22 David GoodwinFix typo in addrmode definition.
2009-07-11 Evan ChengMajor changes to Thumb (not Thumb2). Many 16-bit instru...
2009-07-10 David GoodwinPredicate VFP instructions on HasVFP2 instead of IsARM...
2009-07-08 Evan Cheng- Add some NEON ld / st instruction static encoding.
2009-07-08 Bob WilsonImplement NEON vld1 instructions.
2009-07-08 Evan ChengAdd a Thumb2 instruction flag to that indicates whether...
2009-07-02 Evan ChengThumb2 pre/post indexed loads.
2009-07-02 Evan ChengChange the meaning of predicate hasThumb2 to mean thumb...
2009-07-01 Bob WilsonAdd a new addressing mode for NEON load/store instructions.
2009-06-30 David GoodwinAdd conditional and unconditional thumb-2 branch. Add...
2009-06-30 Evan ChengA few more load instructions.
2009-06-29 Evan ChengImplement Thumb2 ldr.
2009-06-27 Evan ChengRenaming for consistency.
2009-06-25 Evan ChengChange thumb2 instruction definitions so if-converter...
2009-06-23 Evan ChengAdd IsThumb1Only to most 16-bit thumb instructions...
2009-06-23 Evan ChengInitial Thumb2 support. Majority of the work is done...
2009-06-22 Bob WilsonAdd support for ARM's Advanced SIMD (NEON) instruction...
2008-11-13 Evan ChengHandle the rest of pseudo instructions.
2008-11-13 Evan ChengFix pre- and post-indexed load / store encoding bugs.
2008-11-12 Evan ChengConsolidate formats; fix FCMPED etc. encodings.
2008-11-12 Evan ChengFix VFP conversion instruction encodings.
2008-11-11 Evan ChengFix FMDRR encoding.
2008-11-11 Evan ChengEncode VFP load / store instructions.
2008-11-11 Evan ChengEncode VFP conversion instructions.
2008-11-11 Evan ChengEncode VFP arithmetic instructions.
2008-11-07 Evan ChengJump table JIT support. Work in progress.
2008-11-07 Evan ChengEncode misc arithmetic instructions.
2008-11-06 Evan ChengEncode extend instructions; more clean up.
2008-11-06 Evan Cheng- Improve naming consistency: Branch -> BrFrm, BranchMi...
2008-11-06 Evan ChengRemove opcode from instruction TS flags; add MOVCC...
2008-11-06 Evan ChengHandle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>.
2008-11-06 Evan ChengFix encoding of multiple instructions with 3 src operan...
2008-11-05 Evan ChengEncode pic load / store instructions; fix some encoding...
2008-11-05 Evan ChengRestructure ARM code emitter to use instruction formats...
2008-11-04 Evan ChengLDM_RET restores pc, do not set 's' bit which would...
2008-11-03 Jim GrosbachAdd binary encoding support for multiply instructions...
2008-10-14 Jim GrosbachUpdate ARM Insn encoding to get endian-ness to match...
2008-09-17 Evan ChengFix addrmode1 instruction encodings; fix bx_ret encoding.
2008-09-17 Evan ChengSpecify instruction encoding using range list to avoid...
2008-09-13 Evan ChengRevert 56176. All those instruction formats are still...
2008-09-12 Evan ChengEliminate unnecessary instruction formats.
2008-09-12 Evan ChengAddrmode 1 S bit can be dynamically set. Look for CPSR...
2008-09-01 Evan ChengControl flow instruction encodings.
2008-09-01 Evan Chengldm / stm instruction encodings.
2008-09-01 Evan ChengAXI2 and AXI3 instruction encodings.
2008-09-01 Evan ChengReorganize instruction formats again; AXI1 encoding.
2008-09-01 Evan Chengaddrmode3 instruction encodings.
2008-09-01 Evan ChengReorganize some instruction format definitions. No...
2008-09-01 Evan ChengRest of addrmode2 instruction encodings.
2008-08-31 Evan ChengAddr2 word / byte load encodings.
2008-08-31 Evan ChengAddr1 instructions opcodes are encoded in bits 21-24...
2008-08-29 Evan Chengaddrmode1 (data processing) instruction encoding: bits...
2008-08-29 Evan ChengMore refactoring.
2008-08-28 Evan ChengRefactor ARM instruction format definitions into a...