ARM pre-UAL NEG mnemonic for convenience when porting old code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146511 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 0b198f9129d8ff37204bf73ea90785aa72228d1f..b696bccefda26b0a16f7c2aa0c221a675b0f6f21 100644 (file)
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -5127,3 +5127,7 @@ def : ARMInstAlias<"ror${s}${p} $Rn, $Rm",
 // 'mul' instruction can be specified with only two operands.
 def : ARMInstAlias<"mul${s}${p} $Rn, $Rm",
                    (MUL rGPR:$Rn, rGPR:$Rm, rGPR:$Rn, pred:$p, cc_out:$s)>;
 // 'mul' instruction can be specified with only two operands.
 def : ARMInstAlias<"mul${s}${p} $Rn, $Rm",
                    (MUL rGPR:$Rn, rGPR:$Rm, rGPR:$Rn, pred:$p, cc_out:$s)>;

+
+// "neg" is and alias for "rsb rd, rn, #0"
+def : ARMInstAlias<"neg${s}${p} $Rd, $Rm",
+                   (RSBri GPR:$Rd, GPR:$Rm, 0, pred:$p, cc_out:$s)>;

diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index c6cc98db66ceb281554c8fe39d87c0ae15fef87d..ac1a2294a7cec05a6b3db61e8b735a6469351398 100644 (file)
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -1131,9 +1131,6 @@ def tRSB :                      // A8.6.141
                "rsb", "\t$Rd, $Rn, #0",
                [(set tGPR:$Rd, (ineg tGPR:$Rn))]>;
 
                "rsb", "\t$Rd, $Rn, #0",
                [(set tGPR:$Rd, (ineg tGPR:$Rn))]>;
 

-def : tInstAlias<"neg${s}${p} $Rd, $Rm",
-                 (tRSB tGPR:$Rd, s_cc_out:$s, tGPR:$Rm, pred:$p)>;
-

 // Subtract with carry register
 let Uses = [CPSR] in
 def tSBC :                      // A8.6.151
 // Subtract with carry register
 let Uses = [CPSR] in
 def tSBC :                      // A8.6.151


@@ -1435,3 +1432,8 @@ def : InstAlias<"nop", (tMOVr R8, R8, 14, 0)>,Requires<[IsThumb, IsThumb1Only]>;
 // nothing).
 def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>;
 def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>;
 // nothing).
 def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>;
 def : tInstAlias<"cps$imod", (tCPS imod_op:$imod, 0)>;

+
+// "neg" is and alias for "rsb rd, rn, #0"
+def : tInstAlias<"neg${s}${p} $Rd, $Rm",
+                 (tRSB tGPR:$Rd, s_cc_out:$s, tGPR:$Rm, pred:$p)>;
+

diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index f81cfa3b0503410f73c8cfded3b6cf7003deb97a..8ab45c6e16a83742109462680dd94faee674edc0 100644 (file)
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -4122,3 +4122,7 @@ def : t2InstAlias<"add${s}${p} $Rd, $imm",
 // Wide 'mul' encoding can be specified with only two operands.
 def : t2InstAlias<"mul${p} $Rn, $Rm",
                   (t2MUL rGPR:$Rn, rGPR:$Rm, rGPR:$Rn, pred:$p)>;
 // Wide 'mul' encoding can be specified with only two operands.
 def : t2InstAlias<"mul${p} $Rn, $Rm",
                   (t2MUL rGPR:$Rn, rGPR:$Rm, rGPR:$Rn, pred:$p)>;

+
+// "neg" is and alias for "rsb rd, rn, #0"
+def : t2InstAlias<"neg${s}${p} $Rd, $Rm",
+                  (t2RSBri rGPR:$Rd, rGPR:$Rm, 0, pred:$p, cc_out:$s)>;

diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index 6dba430a22b9295476456c910baad7801b56249e..c61f17b3035bdc1a584b08ee43dec2a5e7fa16e7 100644 (file)
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -1079,6 +1079,14 @@ Lforward:
 @ CHECK: mvngt r5, r6, asr r7          @ encoding: [0x56,0x57,0xe0,0xc1]
 @ CHECK: mvnslt        r5, r6, ror r7          @ encoding: [0x76,0x57,0xf0,0xb1]
 
 @ CHECK: mvngt r5, r6, asr r7          @ encoding: [0x56,0x57,0xe0,0xc1]
 @ CHECK: mvnslt        r5, r6, ror r7          @ encoding: [0x76,0x57,0xf0,0xb1]
 

+@------------------------------------------------------------------------------
+@ NEG
+@------------------------------------------------------------------------------
+        neg r5, r8
+
+@ CHECK: rsb   r5, r8, #0              @ encoding: [0x00,0x50,0x68,0xe2]
+
+

 @------------------------------------------------------------------------------
 @ NOP
 @------------------------------------------------------------------------------
 @------------------------------------------------------------------------------
 @ NOP
 @------------------------------------------------------------------------------

diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index 2550858051d289b6976330a9a067a242faae0bfc..c3500bb4916c9c7dcb5c8ae8a059cf184232871c 100644 (file)
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -1293,6 +1293,16 @@ _func:
 @ CHECK: it    eq                      @ encoding: [0x08,0xbf]
 @ CHECK: mvneq r2, r3                  @ encoding: [0xda,0x43]
 
 @ CHECK: it    eq                      @ encoding: [0x08,0xbf]
 @ CHECK: mvneq r2, r3                  @ encoding: [0xda,0x43]
 

+@------------------------------------------------------------------------------
+@ NEG
+@------------------------------------------------------------------------------
+        neg r5, r2
+        neg r5, r8
+
+@ CHECK: rsb.w r5, r2, #0              @ encoding: [0xc2,0xf1,0x00,0x05]
+@ CHECK: rsb.w r5, r8, #0              @ encoding: [0xc8,0xf1,0x00,0x05]
+
+

 @------------------------------------------------------------------------------
 @ NOP
 @------------------------------------------------------------------------------
 @------------------------------------------------------------------------------
 @ NOP
 @------------------------------------------------------------------------------