AMDGPU/SI: Fix a bug in SIFoldOperands
authorMarek Olsak <marek.olsak@amd.com>
Wed, 13 Jan 2016 11:44:29 +0000 (11:44 +0000)
committerMarek Olsak <marek.olsak@amd.com>
Wed, 13 Jan 2016 11:44:29 +0000 (11:44 +0000)
Summary: ret.ll will contain a test for this

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm

Differential Revision: http://reviews.llvm.org/D16029

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257590 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AMDGPU/SIFoldOperands.cpp

index ccbf7c8..6230d1e 100644 (file)
@@ -338,6 +338,17 @@ bool SIFoldOperands::runOnMachineFunction(MachineFunction &MF) {
           !TargetRegisterInfo::isVirtualRegister(OpToFold.getReg()))
         continue;
 
+      // Prevent folding operands backwards in the function. For example,
+      // the COPY opcode must not be replaced by 1 in this example:
+      //
+      //    %vreg3<def> = COPY %VGPR0; VGPR_32:%vreg3
+      //    ...
+      //    %VGPR0<def> = V_MOV_B32_e32 1, %EXEC<imp-use>
+      MachineOperand &Dst = MI.getOperand(0);
+      if (Dst.isReg() &&
+          !TargetRegisterInfo::isVirtualRegister(Dst.getReg()))
+        continue;
+
       // We need mutate the operands of new mov instructions to add implicit
       // uses of EXEC, but adding them invalidates the use_iterator, so defer
       // this.