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AMDGPU/SI: Fix a bug in SIFoldOperands
2016-01-13 Marek OlsakAMDGPU/SI: Fix a bug in SIFoldOperands
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2015-11-25 Marek OlsakAMDGPU/SI: select S_ABS_I32 when possible (v2)
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2015-10-29 Marek OlsakAMDGPU/SI: handle undef for llvm.SI.packf16
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2015-10-29 Marek OlsakAMDGPU/SI: use S_OR for fneg (fabs f32)
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2015-10-29 Marek OlsakAMDGPU/SI: use S_AND for i1 trunc
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2015-09-29 Marek OlsakAMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE...
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2015-07-27 Marek OlsakAMDGPU: don't match vgpr loads for constant loads
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2015-07-27 Marek OlsakAMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround
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2015-06-26 Marek OlsakAMDGPU: really don't commute REV opcodes if the target...
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2015-03-27 Marek OlsakR600/SI: Fix VOP2 VI encoding
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2015-03-24 Marek OlsakR600/SI: Insert more NOPs after READLANE on VI, don...
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2015-03-24 Marek OlsakR600/SI: Select V_BFE_U32 for and+shift with a non...
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2015-03-24 Marek OlsakR600/SI: Custom-select 32-bit S_BFE from bitwise opcodes
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2015-03-24 Marek OlsakR600/SI: Improve BFM support
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2015-03-24 Marek OlsakR600/SI: Use V_FRACT_F64 for faster 64-bit floor on SI
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2015-03-24 Marek OlsakR600/SI: Expand fract to floor, then only select V_FRACT...
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2015-03-09 Marek OlsakR600/SI: Limit SGPRs to 80 on Tonga and Iceland
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2015-03-09 Marek OlsakR600/SI: Fix getNumSGPRsAllowed for VI
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2015-03-04 Marek OlsakR600/SI: Add an intrinsic for S_FLBIT_I32 / V_FFBH_I32
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2015-02-18 Marek OlsakR600/SI: Fix READLANE and WRITELANE lane select for VI
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2015-02-18 Marek OlsakR600/SI: Simplify verification of AMDGPU::OPERAND_REG_INLINE_C
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2015-02-18 Marek OlsakR600/SI: Remove explicit VOP operand checking
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2015-02-11 Marek OlsakR600/SI: Enable a lot of existing tests for VI (squashed...
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2015-02-03 Marek OlsakR600/SI: Remove the -CHECK suffix from all FileCheck...
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2015-02-03 Marek OlsakR600/SI: Remove useless patterns in VALU which are...
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2015-02-03 Marek OlsakR600/SI: Rewrite VOP1InstSI to contain a pseudo and...
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2015-02-03 Marek OlsakR600/SI: Fix B64 VALU shifts on VI
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2015-02-03 Marek OlsakR600/SI: Don't generate non-existent LSHL, LSHR, ASHR...
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2015-02-03 Marek OlsakR600/SI: Remove VOP2_REV definitions from target-specific...
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2015-02-03 Marek OlsakR600/SI: Trivial instruction definition corrections...
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2015-02-03 Marek OlsakR600/SI: Determine target-specific encoding of READLANE...
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2015-02-03 Marek OlsakR600/SI: Fix dependency between instruction writing...
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2015-01-27 Marek OlsakR600/SI: Enable all tests that pass on VI without changes
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2015-01-27 Marek OlsakR600/SI: Fix MIN3/MAX3 on VI, define MED3
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2015-01-27 Marek OlsakR600/SI: Don't set patterns for chip-specific instructions...
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2015-01-27 Marek OlsakR600/SI: Add VI versions of LDS atomics
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2015-01-27 Marek OlsakR600/SI: Add VI versions of MUBUF atomics
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2015-01-27 Marek OlsakR600/SI: Add VI versions of MUBUF loads and stores
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2015-01-27 Marek OlsakR600/SI: Add pseudos for MUBUF loads and stores
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2015-01-15 Marek OlsakR600/SI: Unify VOP2 instructions which are VOP3-only...
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2015-01-15 Marek OlsakR600/SI: Use 64-bit encoding by default for opcodes...
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2015-01-15 Marek OlsakR600/SI: Add V_READLANE_B32 and V_WRITELANE_B32 for VI
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2015-01-15 Marek OlsakR600/SI: Don't shrink instructions whose e32 encoding...
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2015-01-15 Marek OlsakR600/SI: Add common class VOPAnyCommon
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2015-01-15 Marek OlsakR600/SI: Don't select SI-only VOP3 opcodes on VI
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2014-12-10 Marek OlsakR600/SI: Use getTargetConstant in AdjustRegClass
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2014-12-07 Marek OlsakR600/SI: Disable VMEM and SMEM clauses by breaking...
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2014-12-07 Marek OlsakR600/SI: Set 20-bit immediate byte offset for SMRD...
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2014-12-07 Marek OlsakR600/SI: Update instruction conversions for VI
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2014-12-07 Marek OlsakR600/SI: Add VI instructions
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2014-12-07 Marek OlsakR600/SI: Add SCC Defs/Uses to SOP1 and SOP2 opcodes
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2014-11-25 Marek OlsakR600/SI: Disable commutativity for MIN/MAX_LEGACY
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2014-07-11 Marek OlsakR600/SI: Use i32 vectors for resources and samplers
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2014-07-11 Marek OlsakR600/SI: add sample and image intrinsics exposing all...
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2014-07-11 Marek OlsakR600/SI: fix shadow mapping for 1D and 2D array textures
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2014-06-18 Marek OlsakR600/SI: add gather4 and getlod intrinsics (v3)
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2014-05-05 Marek OlsakR600/SI: allow 5 more input SGPRs to a shader
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
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C/C++ LLVM-based compilers that forbids OOTA behaviors