Prune CRLF.
authorNAKAMURA Takumi <geek4civic@gmail.com>
Mon, 27 Oct 2014 12:37:26 +0000 (12:37 +0000)
committerNAKAMURA Takumi <geek4civic@gmail.com>
Mon, 27 Oct 2014 12:37:26 +0000 (12:37 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220678 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/ADT/DenseSet.h
include/llvm/ADT/ScopedHashTable.h
include/llvm/ADT/SmallBitVector.h
include/llvm/ADT/SparseBitVector.h
include/llvm/ADT/SparseMultiSet.h
include/llvm/ADT/SparseSet.h
lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h

index ae7328c..9ab1be2 100644 (file)
@@ -29,7 +29,7 @@ class DenseSet {
 public:
   typedef ValueT key_type;
   typedef ValueT value_type;
-  typedef unsigned size_type;\r
+  typedef unsigned size_type;
 
   explicit DenseSet(unsigned NumInitBuckets = 0) : TheMap(NumInitBuckets) {}
 
@@ -45,7 +45,7 @@ public:
     TheMap.clear();
   }
 
-  /// Return 1 if the specified key is in the set, 0 otherwise.\r
+  /// Return 1 if the specified key is in the set, 0 otherwise.
   size_type count(const ValueT &V) const {
     return TheMap.count(V);
   }
index 02a6ea3..2f60ecc 100644 (file)
@@ -148,7 +148,7 @@ public:
   /// ScopeTy - This is a helpful typedef that allows clients to get easy access
   /// to the name of the scope for this hash table.
   typedef ScopedHashTableScope<K, V, KInfo, AllocatorTy> ScopeTy;
-  typedef unsigned size_type;\r
+  typedef unsigned size_type;
 private:
   typedef ScopedHashTableVal<K, V> ValTy;
   DenseMap<K, ValTy*, KInfo> TopLevelMap;
@@ -171,7 +171,7 @@ public:
   AllocatorTy &getAllocator() { return Allocator; }
   const AllocatorTy &getAllocator() const { return Allocator; }
 
-  /// Return 1 if the specified key is in the table, 0 otherwise.\r
+  /// Return 1 if the specified key is in the table, 0 otherwise.
   size_type count(const K &Key) const {
     return TopLevelMap.count(Key);
   }
index 0922017..ababf0f 100644 (file)
@@ -54,7 +54,7 @@ class SmallBitVector {
   };
 
 public:
-  typedef unsigned size_type;\r
+  typedef unsigned size_type;
   // Encapsulation of a single bit.
   class reference {
     SmallBitVector &TheVector;
index 36754d6..d5bde29 100644 (file)
@@ -45,7 +45,7 @@ struct SparseBitVectorElement
   : public ilist_node<SparseBitVectorElement<ElementSize> > {
 public:
   typedef unsigned long BitWord;
-  typedef unsigned size_type;\r
+  typedef unsigned size_type;
   enum {
     BITWORD_SIZE = sizeof(BitWord) * CHAR_BIT,
     BITWORDS_PER_ELEMENT = (ElementSize + BITWORD_SIZE - 1) / BITWORD_SIZE,
index dc1273e..f858536 100644 (file)
@@ -185,7 +185,7 @@ public:
   typedef const ValueT &const_reference;
   typedef ValueT *pointer;
   typedef const ValueT *const_pointer;
-  typedef unsigned size_type;\r
+  typedef unsigned size_type;
 
   SparseMultiSet()
     : Sparse(nullptr), Universe(0), FreelistIdx(SMSNode::INVALID), NumFree(0) {}
index 632d52a..9a13440 100644 (file)
@@ -124,7 +124,7 @@ class SparseSet {
 
   typedef typename KeyFunctorT::argument_type KeyT;
   typedef SmallVector<ValueT, 8> DenseT;
-  typedef unsigned size_type;\r
+  typedef unsigned size_type;
   DenseT Dense;
   SparseT *Sparse;
   unsigned Universe;
index b709c83..806855b 100644 (file)
-//===-- HexagonDisassembler.cpp - Disassembler for Hexagon ISA ------------===//\r
-//\r
-//                     The LLVM Compiler Infrastructure\r
-//\r
-// This file is distributed under the University of Illinois Open Source\r
-// License. See LICENSE.TXT for details.\r
-//\r
-//===----------------------------------------------------------------------===//\r
-\r
-#include "MCTargetDesc/HexagonBaseInfo.h"\r
-#include "MCTargetDesc/HexagonMCTargetDesc.h"\r
-\r
-#include "llvm/MC/MCContext.h"\r
-#include "llvm/MC/MCDisassembler.h"\r
-#include "llvm/MC/MCExpr.h"\r
-#include "llvm/MC/MCFixedLenDisassembler.h"\r
-#include "llvm/MC/MCInst.h"\r
-#include "llvm/MC/MCInstrDesc.h"\r
-#include "llvm/MC/MCSubtargetInfo.h"\r
-#include "llvm/Support/Debug.h"\r
-#include "llvm/Support/ErrorHandling.h"\r
-#include "llvm/Support/LEB128.h"\r
-#include "llvm/Support/MemoryObject.h"\r
-#include "llvm/Support/raw_ostream.h"\r
-#include "llvm/Support/TargetRegistry.h"\r
-#include "llvm/Support/Endian.h"\r
-\r
-#include <vector>\r
-#include <array>\r
-\r
-using namespace llvm;\r
-\r
-#define DEBUG_TYPE "hexagon-disassembler"\r
-\r
-// Pull DecodeStatus and its enum values into the global namespace.\r
-typedef llvm::MCDisassembler::DecodeStatus DecodeStatus;\r
-\r
-namespace {\r
-/// \brief Hexagon disassembler for all Hexagon platforms.\r
-class HexagonDisassembler : public MCDisassembler {\r
-public:\r
-  HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx)\r
-      : MCDisassembler(STI, Ctx) {}\r
-\r
-  DecodeStatus getInstruction(MCInst &instr, uint64_t &size,\r
-                              MemoryObject const &region, uint64_t address,\r
-                              raw_ostream &vStream, raw_ostream &cStream) const override;\r
-};\r
-}\r
-\r
-static const uint16_t IntRegDecoderTable[] = {\r
-    Hexagon::R0,  Hexagon::R1,  Hexagon::R2,  Hexagon::R3,  Hexagon::R4,\r
-    Hexagon::R5,  Hexagon::R6,  Hexagon::R7,  Hexagon::R8,  Hexagon::R9,\r
-    Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14,\r
-    Hexagon::R15, Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19,\r
-    Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24,\r
-    Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,\r
-    Hexagon::R30, Hexagon::R31};\r
-\r
-static const uint16_t PredRegDecoderTable[] = {Hexagon::P0, Hexagon::P1,\r
-                                               Hexagon::P2, Hexagon::P3};\r
-\r
-static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,\r
-                                               uint64_t /*Address*/,\r
-                                               void const *Decoder) {\r
-  if (RegNo > 31)\r
-    return MCDisassembler::Fail;\r
-\r
-  unsigned Register = IntRegDecoderTable[RegNo];\r
-  Inst.addOperand(MCOperand::CreateReg(Register));\r
-  return MCDisassembler::Success;\r
-}\r
-\r
-static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,\r
-                                                uint64_t /*Address*/,\r
-                                                void const *Decoder) {\r
-  if (RegNo > 3)\r
-    return MCDisassembler::Fail;\r
-\r
-  unsigned Register = PredRegDecoderTable[RegNo];\r
-  Inst.addOperand(MCOperand::CreateReg(Register));\r
-  return MCDisassembler::Success;\r
-}\r
-\r
-#include "HexagonGenDisassemblerTables.inc"\r
-\r
-static MCDisassembler *createHexagonDisassembler(Target const &T,\r
-                                                 MCSubtargetInfo const &STI,\r
-                                                 MCContext &Ctx) {\r
-  return new HexagonDisassembler(STI, Ctx);\r
-}\r
-\r
-extern "C" void LLVMInitializeHexagonDisassembler() {\r
-  TargetRegistry::RegisterMCDisassembler(TheHexagonTarget,\r
-                                         createHexagonDisassembler);\r
-}\r
-\r
-DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,\r
-                                                 MemoryObject const &Region,\r
-                                                 uint64_t Address,\r
-                                                 raw_ostream &os,\r
-                                                 raw_ostream &cs) const {\r
-  std::array<uint8_t, 4> Bytes;\r
-  Size = 4;\r
-  if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1) {\r
-    return MCDisassembler::Fail;\r
-  }\r
-  uint32_t insn =\r
-      llvm::support::endian::read<uint32_t, llvm::support::little,\r
-                                  llvm::support::unaligned>(Bytes.data());\r
-\r
-  // Remove parse bits.\r
-  insn &= ~static_cast<uint32_t>(HexagonII::InstParseBits::INST_PARSE_MASK);\r
-  return decodeInstruction(DecoderTable32, MI, insn, Address, this, STI);\r
-}\r
+//===-- HexagonDisassembler.cpp - Disassembler for Hexagon ISA ------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "MCTargetDesc/HexagonBaseInfo.h"
+#include "MCTargetDesc/HexagonMCTargetDesc.h"
+
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCDisassembler.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCFixedLenDisassembler.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCInstrDesc.h"
+#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/LEB128.h"
+#include "llvm/Support/MemoryObject.h"
+#include "llvm/Support/raw_ostream.h"
+#include "llvm/Support/TargetRegistry.h"
+#include "llvm/Support/Endian.h"
+
+#include <vector>
+#include <array>
+
+using namespace llvm;
+
+#define DEBUG_TYPE "hexagon-disassembler"
+
+// Pull DecodeStatus and its enum values into the global namespace.
+typedef llvm::MCDisassembler::DecodeStatus DecodeStatus;
+
+namespace {
+/// \brief Hexagon disassembler for all Hexagon platforms.
+class HexagonDisassembler : public MCDisassembler {
+public:
+  HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx)
+      : MCDisassembler(STI, Ctx) {}
+
+  DecodeStatus getInstruction(MCInst &instr, uint64_t &size,
+                              MemoryObject const &region, uint64_t address,
+                              raw_ostream &vStream, raw_ostream &cStream) const override;
+};
+}
+
+static const uint16_t IntRegDecoderTable[] = {
+    Hexagon::R0,  Hexagon::R1,  Hexagon::R2,  Hexagon::R3,  Hexagon::R4,
+    Hexagon::R5,  Hexagon::R6,  Hexagon::R7,  Hexagon::R8,  Hexagon::R9,
+    Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14,
+    Hexagon::R15, Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19,
+    Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24,
+    Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,
+    Hexagon::R30, Hexagon::R31};
+
+static const uint16_t PredRegDecoderTable[] = {Hexagon::P0, Hexagon::P1,
+                                               Hexagon::P2, Hexagon::P3};
+
+static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,
+                                               uint64_t /*Address*/,
+                                               void const *Decoder) {
+  if (RegNo > 31)
+    return MCDisassembler::Fail;
+
+  unsigned Register = IntRegDecoderTable[RegNo];
+  Inst.addOperand(MCOperand::CreateReg(Register));
+  return MCDisassembler::Success;
+}
+
+static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
+                                                uint64_t /*Address*/,
+                                                void const *Decoder) {
+  if (RegNo > 3)
+    return MCDisassembler::Fail;
+
+  unsigned Register = PredRegDecoderTable[RegNo];
+  Inst.addOperand(MCOperand::CreateReg(Register));
+  return MCDisassembler::Success;
+}
+
+#include "HexagonGenDisassemblerTables.inc"
+
+static MCDisassembler *createHexagonDisassembler(Target const &T,
+                                                 MCSubtargetInfo const &STI,
+                                                 MCContext &Ctx) {
+  return new HexagonDisassembler(STI, Ctx);
+}
+
+extern "C" void LLVMInitializeHexagonDisassembler() {
+  TargetRegistry::RegisterMCDisassembler(TheHexagonTarget,
+                                         createHexagonDisassembler);
+}
+
+DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
+                                                 MemoryObject const &Region,
+                                                 uint64_t Address,
+                                                 raw_ostream &os,
+                                                 raw_ostream &cs) const {
+  std::array<uint8_t, 4> Bytes;
+  Size = 4;
+  if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1) {
+    return MCDisassembler::Fail;
+  }
+  uint32_t insn =
+      llvm::support::endian::read<uint32_t, llvm::support::little,
+                                  llvm::support::unaligned>(Bytes.data());
+
+  // Remove parse bits.
+  insn &= ~static_cast<uint32_t>(HexagonII::InstParseBits::INST_PARSE_MASK);
+  return decodeInstruction(DecoderTable32, MI, insn, Address, this, STI);
+}
index c8e2d96..c0a3fae 100644 (file)
 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
 
-#include "HexagonMCTargetDesc.h"\r
-#include "llvm/Support/ErrorHandling.h"\r
-\r
-#include <stdint.h>\r
-\r
-namespace llvm {\r
-\r
-/// HexagonII - This namespace holds all of the target specific flags that\r
+#include "HexagonMCTargetDesc.h"
+#include "llvm/Support/ErrorHandling.h"
+
+#include <stdint.h>
+
+namespace llvm {
+
+/// HexagonII - This namespace holds all of the target specific flags that
 /// instruction info tracks.
 ///
 namespace HexagonII {
@@ -188,20 +188,20 @@ namespace HexagonII {
     MO_LO16, MO_HI16,
 
     // Offset from the base of the SDA.
-    MO_GPREL\r
-  };\r
-\r
-  enum class InstParseBits : uint32_t {\r
-    INST_PARSE_MASK       = 0x0000c000,\r
-    INST_PARSE_PACKET_END = 0x0000c000,\r
-    INST_PARSE_LOOP_END   = 0x00008000,\r
-    INST_PARSE_NOT_END    = 0x00004000,\r
-    INST_PARSE_DUPLEX     = 0x00000000,\r
-    INST_PARSE_EXTENDER   = 0x00000000\r
-  };\r
-\r
-} // End namespace HexagonII.\r
-\r
-} // End namespace llvm.\r
+    MO_GPREL
+  };
+
+  enum class InstParseBits : uint32_t {
+    INST_PARSE_MASK       = 0x0000c000,
+    INST_PARSE_PACKET_END = 0x0000c000,
+    INST_PARSE_LOOP_END   = 0x00008000,
+    INST_PARSE_NOT_END    = 0x00004000,
+    INST_PARSE_DUPLEX     = 0x00000000,
+    INST_PARSE_EXTENDER   = 0x00000000
+  };
+
+} // End namespace HexagonII.
+
+} // End namespace llvm.
 
 #endif