From af628cc0b84d3f6acfb2a8dab696b93945e73e88 Mon Sep 17 00:00:00 2001 From: NAKAMURA Takumi Date: Mon, 27 Oct 2014 12:37:26 +0000 Subject: [PATCH] Prune CRLF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220678 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/ADT/DenseSet.h | 4 +- include/llvm/ADT/ScopedHashTable.h | 4 +- include/llvm/ADT/SmallBitVector.h | 2 +- include/llvm/ADT/SparseBitVector.h | 2 +- include/llvm/ADT/SparseMultiSet.h | 2 +- include/llvm/ADT/SparseSet.h | 2 +- .../Disassembler/HexagonDisassembler.cpp | 230 +++++++++--------- .../Hexagon/MCTargetDesc/HexagonBaseInfo.h | 46 ++-- 8 files changed, 146 insertions(+), 146 deletions(-) diff --git a/include/llvm/ADT/DenseSet.h b/include/llvm/ADT/DenseSet.h index ae7328cc19a..9ab1be203b9 100644 --- a/include/llvm/ADT/DenseSet.h +++ b/include/llvm/ADT/DenseSet.h @@ -29,7 +29,7 @@ class DenseSet { public: typedef ValueT key_type; typedef ValueT value_type; - typedef unsigned size_type; + typedef unsigned size_type; explicit DenseSet(unsigned NumInitBuckets = 0) : TheMap(NumInitBuckets) {} @@ -45,7 +45,7 @@ public: TheMap.clear(); } - /// Return 1 if the specified key is in the set, 0 otherwise. + /// Return 1 if the specified key is in the set, 0 otherwise. size_type count(const ValueT &V) const { return TheMap.count(V); } diff --git a/include/llvm/ADT/ScopedHashTable.h b/include/llvm/ADT/ScopedHashTable.h index 02a6ea34583..2f60ecc9204 100644 --- a/include/llvm/ADT/ScopedHashTable.h +++ b/include/llvm/ADT/ScopedHashTable.h @@ -148,7 +148,7 @@ public: /// ScopeTy - This is a helpful typedef that allows clients to get easy access /// to the name of the scope for this hash table. typedef ScopedHashTableScope ScopeTy; - typedef unsigned size_type; + typedef unsigned size_type; private: typedef ScopedHashTableVal ValTy; DenseMap TopLevelMap; @@ -171,7 +171,7 @@ public: AllocatorTy &getAllocator() { return Allocator; } const AllocatorTy &getAllocator() const { return Allocator; } - /// Return 1 if the specified key is in the table, 0 otherwise. + /// Return 1 if the specified key is in the table, 0 otherwise. size_type count(const K &Key) const { return TopLevelMap.count(Key); } diff --git a/include/llvm/ADT/SmallBitVector.h b/include/llvm/ADT/SmallBitVector.h index 0922017ea61..ababf0f3cbe 100644 --- a/include/llvm/ADT/SmallBitVector.h +++ b/include/llvm/ADT/SmallBitVector.h @@ -54,7 +54,7 @@ class SmallBitVector { }; public: - typedef unsigned size_type; + typedef unsigned size_type; // Encapsulation of a single bit. class reference { SmallBitVector &TheVector; diff --git a/include/llvm/ADT/SparseBitVector.h b/include/llvm/ADT/SparseBitVector.h index 36754d68235..d5bde2963fb 100644 --- a/include/llvm/ADT/SparseBitVector.h +++ b/include/llvm/ADT/SparseBitVector.h @@ -45,7 +45,7 @@ struct SparseBitVectorElement : public ilist_node > { public: typedef unsigned long BitWord; - typedef unsigned size_type; + typedef unsigned size_type; enum { BITWORD_SIZE = sizeof(BitWord) * CHAR_BIT, BITWORDS_PER_ELEMENT = (ElementSize + BITWORD_SIZE - 1) / BITWORD_SIZE, diff --git a/include/llvm/ADT/SparseMultiSet.h b/include/llvm/ADT/SparseMultiSet.h index dc1273eb7ff..f858536b6ed 100644 --- a/include/llvm/ADT/SparseMultiSet.h +++ b/include/llvm/ADT/SparseMultiSet.h @@ -185,7 +185,7 @@ public: typedef const ValueT &const_reference; typedef ValueT *pointer; typedef const ValueT *const_pointer; - typedef unsigned size_type; + typedef unsigned size_type; SparseMultiSet() : Sparse(nullptr), Universe(0), FreelistIdx(SMSNode::INVALID), NumFree(0) {} diff --git a/include/llvm/ADT/SparseSet.h b/include/llvm/ADT/SparseSet.h index 632d52ad9d8..9a13440000a 100644 --- a/include/llvm/ADT/SparseSet.h +++ b/include/llvm/ADT/SparseSet.h @@ -124,7 +124,7 @@ class SparseSet { typedef typename KeyFunctorT::argument_type KeyT; typedef SmallVector DenseT; - typedef unsigned size_type; + typedef unsigned size_type; DenseT Dense; SparseT *Sparse; unsigned Universe; diff --git a/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp b/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp index b709c835acf..806855bb05c 100644 --- a/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp +++ b/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp @@ -1,115 +1,115 @@ -//===-- HexagonDisassembler.cpp - Disassembler for Hexagon ISA ------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// - -#include "MCTargetDesc/HexagonBaseInfo.h" -#include "MCTargetDesc/HexagonMCTargetDesc.h" - -#include "llvm/MC/MCContext.h" -#include "llvm/MC/MCDisassembler.h" -#include "llvm/MC/MCExpr.h" -#include "llvm/MC/MCFixedLenDisassembler.h" -#include "llvm/MC/MCInst.h" -#include "llvm/MC/MCInstrDesc.h" -#include "llvm/MC/MCSubtargetInfo.h" -#include "llvm/Support/Debug.h" -#include "llvm/Support/ErrorHandling.h" -#include "llvm/Support/LEB128.h" -#include "llvm/Support/MemoryObject.h" -#include "llvm/Support/raw_ostream.h" -#include "llvm/Support/TargetRegistry.h" -#include "llvm/Support/Endian.h" - -#include -#include - -using namespace llvm; - -#define DEBUG_TYPE "hexagon-disassembler" - -// Pull DecodeStatus and its enum values into the global namespace. -typedef llvm::MCDisassembler::DecodeStatus DecodeStatus; - -namespace { -/// \brief Hexagon disassembler for all Hexagon platforms. -class HexagonDisassembler : public MCDisassembler { -public: - HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx) - : MCDisassembler(STI, Ctx) {} - - DecodeStatus getInstruction(MCInst &instr, uint64_t &size, - MemoryObject const ®ion, uint64_t address, - raw_ostream &vStream, raw_ostream &cStream) const override; -}; -} - -static const uint16_t IntRegDecoderTable[] = { - Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4, - Hexagon::R5, Hexagon::R6, Hexagon::R7, Hexagon::R8, Hexagon::R9, - Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14, - Hexagon::R15, Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19, - Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24, - Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29, - Hexagon::R30, Hexagon::R31}; - -static const uint16_t PredRegDecoderTable[] = {Hexagon::P0, Hexagon::P1, - Hexagon::P2, Hexagon::P3}; - -static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t /*Address*/, - void const *Decoder) { - if (RegNo > 31) - return MCDisassembler::Fail; - - unsigned Register = IntRegDecoderTable[RegNo]; - Inst.addOperand(MCOperand::CreateReg(Register)); - return MCDisassembler::Success; -} - -static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo, - uint64_t /*Address*/, - void const *Decoder) { - if (RegNo > 3) - return MCDisassembler::Fail; - - unsigned Register = PredRegDecoderTable[RegNo]; - Inst.addOperand(MCOperand::CreateReg(Register)); - return MCDisassembler::Success; -} - -#include "HexagonGenDisassemblerTables.inc" - -static MCDisassembler *createHexagonDisassembler(Target const &T, - MCSubtargetInfo const &STI, - MCContext &Ctx) { - return new HexagonDisassembler(STI, Ctx); -} - -extern "C" void LLVMInitializeHexagonDisassembler() { - TargetRegistry::RegisterMCDisassembler(TheHexagonTarget, - createHexagonDisassembler); -} - -DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size, - MemoryObject const &Region, - uint64_t Address, - raw_ostream &os, - raw_ostream &cs) const { - std::array Bytes; - Size = 4; - if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1) { - return MCDisassembler::Fail; - } - uint32_t insn = - llvm::support::endian::read(Bytes.data()); - - // Remove parse bits. - insn &= ~static_cast(HexagonII::InstParseBits::INST_PARSE_MASK); - return decodeInstruction(DecoderTable32, MI, insn, Address, this, STI); -} +//===-- HexagonDisassembler.cpp - Disassembler for Hexagon ISA ------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// + +#include "MCTargetDesc/HexagonBaseInfo.h" +#include "MCTargetDesc/HexagonMCTargetDesc.h" + +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCDisassembler.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCFixedLenDisassembler.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCInstrDesc.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/LEB128.h" +#include "llvm/Support/MemoryObject.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/Endian.h" + +#include +#include + +using namespace llvm; + +#define DEBUG_TYPE "hexagon-disassembler" + +// Pull DecodeStatus and its enum values into the global namespace. +typedef llvm::MCDisassembler::DecodeStatus DecodeStatus; + +namespace { +/// \brief Hexagon disassembler for all Hexagon platforms. +class HexagonDisassembler : public MCDisassembler { +public: + HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx) + : MCDisassembler(STI, Ctx) {} + + DecodeStatus getInstruction(MCInst &instr, uint64_t &size, + MemoryObject const ®ion, uint64_t address, + raw_ostream &vStream, raw_ostream &cStream) const override; +}; +} + +static const uint16_t IntRegDecoderTable[] = { + Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4, + Hexagon::R5, Hexagon::R6, Hexagon::R7, Hexagon::R8, Hexagon::R9, + Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14, + Hexagon::R15, Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19, + Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24, + Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29, + Hexagon::R30, Hexagon::R31}; + +static const uint16_t PredRegDecoderTable[] = {Hexagon::P0, Hexagon::P1, + Hexagon::P2, Hexagon::P3}; + +static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t /*Address*/, + void const *Decoder) { + if (RegNo > 31) + return MCDisassembler::Fail; + + unsigned Register = IntRegDecoderTable[RegNo]; + Inst.addOperand(MCOperand::CreateReg(Register)); + return MCDisassembler::Success; +} + +static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo, + uint64_t /*Address*/, + void const *Decoder) { + if (RegNo > 3) + return MCDisassembler::Fail; + + unsigned Register = PredRegDecoderTable[RegNo]; + Inst.addOperand(MCOperand::CreateReg(Register)); + return MCDisassembler::Success; +} + +#include "HexagonGenDisassemblerTables.inc" + +static MCDisassembler *createHexagonDisassembler(Target const &T, + MCSubtargetInfo const &STI, + MCContext &Ctx) { + return new HexagonDisassembler(STI, Ctx); +} + +extern "C" void LLVMInitializeHexagonDisassembler() { + TargetRegistry::RegisterMCDisassembler(TheHexagonTarget, + createHexagonDisassembler); +} + +DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size, + MemoryObject const &Region, + uint64_t Address, + raw_ostream &os, + raw_ostream &cs) const { + std::array Bytes; + Size = 4; + if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1) { + return MCDisassembler::Fail; + } + uint32_t insn = + llvm::support::endian::read(Bytes.data()); + + // Remove parse bits. + insn &= ~static_cast(HexagonII::InstParseBits::INST_PARSE_MASK); + return decodeInstruction(DecoderTable32, MI, insn, Address, this, STI); +} diff --git a/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h b/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h index c8e2d965ccf..c0a3fae235e 100644 --- a/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h +++ b/lib/Target/Hexagon/MCTargetDesc/HexagonBaseInfo.h @@ -17,14 +17,14 @@ #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H -#include "HexagonMCTargetDesc.h" -#include "llvm/Support/ErrorHandling.h" - -#include - -namespace llvm { - -/// HexagonII - This namespace holds all of the target specific flags that +#include "HexagonMCTargetDesc.h" +#include "llvm/Support/ErrorHandling.h" + +#include + +namespace llvm { + +/// HexagonII - This namespace holds all of the target specific flags that /// instruction info tracks. /// namespace HexagonII { @@ -188,20 +188,20 @@ namespace HexagonII { MO_LO16, MO_HI16, // Offset from the base of the SDA. - MO_GPREL - }; - - enum class InstParseBits : uint32_t { - INST_PARSE_MASK = 0x0000c000, - INST_PARSE_PACKET_END = 0x0000c000, - INST_PARSE_LOOP_END = 0x00008000, - INST_PARSE_NOT_END = 0x00004000, - INST_PARSE_DUPLEX = 0x00000000, - INST_PARSE_EXTENDER = 0x00000000 - }; - -} // End namespace HexagonII. - -} // End namespace llvm. + MO_GPREL + }; + + enum class InstParseBits : uint32_t { + INST_PARSE_MASK = 0x0000c000, + INST_PARSE_PACKET_END = 0x0000c000, + INST_PARSE_LOOP_END = 0x00008000, + INST_PARSE_NOT_END = 0x00004000, + INST_PARSE_DUPLEX = 0x00000000, + INST_PARSE_EXTENDER = 0x00000000 + }; + +} // End namespace HexagonII. + +} // End namespace llvm. #endif -- 2.34.1