/// getAnalysisUsage - Record analysis usage.
///
- void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
/// doInitialization - Set up the AsmPrinter when we are working on a new
/// module. If your pass overrides this, it must make sure to explicitly
/// call this implementation.
- bool doInitialization(Module &M);
+ bool doInitialization(Module &M) override;
/// doFinalization - Shut down the asmprinter. If you override this in your
/// pass, you must make sure to call it explicitly.
- bool doFinalization(Module &M);
+ bool doFinalization(Module &M) override;
/// runOnMachineFunction - Emit the specified function out to the
/// OutStreamer.
- virtual bool runOnMachineFunction(MachineFunction &MF) {
+ bool runOnMachineFunction(MachineFunction &MF) override {
SetupMachineFunction(MF);
EmitFunctionHeader();
EmitFunctionBody();
void view() const;
private:
- virtual bool runOnMachineFunction(MachineFunction&);
- virtual void getAnalysisUsage(AnalysisUsage&) const;
+ bool runOnMachineFunction(MachineFunction&) override;
+ void getAnalysisUsage(AnalysisUsage&) const override;
};
/// Specialize WriteGraph, the standard implementation won't work.
/// occurred, more memory is allocated, and we reemit the code into it.
///
class JITCodeEmitter : public MachineCodeEmitter {
- virtual void anchor();
+ void anchor() override;
public:
virtual ~JITCodeEmitter() {}
/// about to be code generated. This initializes the BufferBegin/End/Ptr
/// fields.
///
- virtual void startFunction(MachineFunction &F) = 0;
+ void startFunction(MachineFunction &F) override = 0;
/// finishFunction - This callback is invoked when the specified function has
/// finished code generation. If a buffer overflow has occurred, this method
/// returns true (the callee is required to try again), otherwise it returns
/// false.
///
- virtual bool finishFunction(MachineFunction &F) = 0;
-
+ bool finishFunction(MachineFunction &F) override = 0;
+
/// allocIndirectGV - Allocates and fills storage for an indirect
/// GlobalValue, and returns the address.
virtual void *allocIndirectGV(const GlobalValue *GV,
/// emitLabel - Emits a label
- virtual void emitLabel(MCSymbol *Label) = 0;
+ void emitLabel(MCSymbol *Label) override = 0;
/// allocateSpace - Allocate a block of space in the current output buffer,
/// returning null (and setting conditions to indicate buffer overflow) on
/// failure. Alignment is the alignment in bytes of the buffer desired.
- virtual void *allocateSpace(uintptr_t Size, unsigned Alignment) {
+ void *allocateSpace(uintptr_t Size, unsigned Alignment) override {
emitAlignment(Alignment);
void *Result;
/// StartMachineBasicBlock - This should be called by the target when a new
/// basic block is about to be emitted. This way the MCE knows where the
/// start of the block is, and can implement getMachineBasicBlockAddress.
- virtual void StartMachineBasicBlock(MachineBasicBlock *MBB) = 0;
-
+ void StartMachineBasicBlock(MachineBasicBlock *MBB) override = 0;
+
/// getCurrentPCValue - This returns the address that the next emitted byte
/// will be output to.
///
- virtual uintptr_t getCurrentPCValue() const {
+ uintptr_t getCurrentPCValue() const override {
return (uintptr_t)CurBufferPtr;
}
/// getCurrentPCOffset - Return the offset from the start of the emitted
/// buffer that we are currently writing to.
- uintptr_t getCurrentPCOffset() const {
+ uintptr_t getCurrentPCOffset() const override {
return CurBufferPtr-BufferBegin;
}
/// creates jump tables or constant pools in memory on the fly while the
/// object code emitters rely on a linker to have real addresses and should
/// use relocations instead.
- bool earlyResolveAddresses() const { return true; }
+ bool earlyResolveAddresses() const override { return true; }
/// addRelocation - Whenever a relocatable address is needed, it should be
/// noted with this interface.
- virtual void addRelocation(const MachineRelocation &MR) = 0;
-
+ void addRelocation(const MachineRelocation &MR) override = 0;
+
/// FIXME: These should all be handled with relocations!
/// getConstantPoolEntryAddress - Return the address of the 'Index' entry in
/// the constant pool that was last emitted with the emitConstantPool method.
///
- virtual uintptr_t getConstantPoolEntryAddress(unsigned Index) const = 0;
+ uintptr_t getConstantPoolEntryAddress(unsigned Index) const override = 0;
/// getJumpTableEntryAddress - Return the address of the jump table with index
/// 'Index' in the function that last called initJumpTableInfo.
///
- virtual uintptr_t getJumpTableEntryAddress(unsigned Index) const = 0;
-
+ uintptr_t getJumpTableEntryAddress(unsigned Index) const override = 0;
+
/// getMachineBasicBlockAddress - Return the address of the specified
/// MachineBasicBlock, only usable after the label for the MBB has been
/// emitted.
///
- virtual uintptr_t getMachineBasicBlockAddress(MachineBasicBlock *MBB) const= 0;
+ uintptr_t
+ getMachineBasicBlockAddress(MachineBasicBlock *MBB) const override = 0;
/// getLabelAddress - Return the address of the specified Label, only usable
/// after the Label has been emitted.
///
- virtual uintptr_t getLabelAddress(MCSymbol *Label) const = 0;
-
+ uintptr_t getLabelAddress(MCSymbol *Label) const override = 0;
+
/// Specifies the MachineModuleInfo object. This is used for exception handling
/// purposes.
- virtual void setModuleInfo(MachineModuleInfo* Info) = 0;
+ void setModuleInfo(MachineModuleInfo* Info) override = 0;
/// getLabelLocations - Return the label locations map of the label IDs to
/// their address.
LatencyPriorityQueue() : Picker(this) {
}
- bool isBottomUp() const { return false; }
+ bool isBottomUp() const override { return false; }
- void initNodes(std::vector<SUnit> &sunits) {
+ void initNodes(std::vector<SUnit> &sunits) override {
SUnits = &sunits;
NumNodesSolelyBlocking.resize(SUnits->size(), 0);
}
- void addNode(const SUnit *SU) {
+ void addNode(const SUnit *SU) override {
NumNodesSolelyBlocking.resize(SUnits->size(), 0);
}
- void updateNode(const SUnit *SU) {
+ void updateNode(const SUnit *SU) override {
}
- void releaseState() {
+ void releaseState() override {
SUnits = 0;
}
return NumNodesSolelyBlocking[NodeNum];
}
- bool empty() const { return Queue.empty(); }
+ bool empty() const override { return Queue.empty(); }
- virtual void push(SUnit *U);
+ void push(SUnit *U) override;
- virtual SUnit *pop();
+ SUnit *pop() override;
- virtual void remove(SUnit *SU);
+ void remove(SUnit *SU) override;
- virtual void dump(ScheduleDAG* DAG) const;
+ void dump(ScheduleDAG* DAG) const override;
// scheduledNode - As nodes are scheduled, we look to see if there are any
// successor nodes that have a single unscheduled predecessor. If so, that
// single predecessor has a higher priority, since scheduling it will make
// the node available.
- void scheduledNode(SUnit *Node);
+ void scheduledNode(SUnit *Node) override;
private:
void AdjustPriorityOfUnscheduledPreds(SUnit *SU);
VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; }
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
- virtual void releaseMemory();
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ void releaseMemory() override;
/// runOnMachineFunction - pass entry point
- virtual bool runOnMachineFunction(MachineFunction&);
+ bool runOnMachineFunction(MachineFunction&) override;
/// print - Implement the dump method.
- virtual void print(raw_ostream &O, const Module* = 0) const;
+ void print(raw_ostream &O, const Module* = 0) const override;
/// intervalIsInOneMBB - If LI is confined to a single basic block, return
/// a pointer to that block. If LI is live in to or out of any block,
/// MachineRegisterInfo callback to notify when new virtual
/// registers are created.
- void MRI_NoteNewVirtualRegister(unsigned VReg);
+ void MRI_NoteNewVirtualRegister(unsigned VReg) override;
public:
/// Create a LiveRangeEdit for breaking down parent into smaller pieces.
BitVector RegMaskUsable;
// MachineFunctionPass boilerplate.
- virtual void getAnalysisUsage(AnalysisUsage&) const;
- virtual bool runOnMachineFunction(MachineFunction&);
- virtual void releaseMemory();
+ void getAnalysisUsage(AnalysisUsage&) const override;
+ bool runOnMachineFunction(MachineFunction&) override;
+ void releaseMemory() override;
public:
static char ID;
LiveRegMatrix();
VNInfo::Allocator& getVNInfoAllocator() { return VNInfoAllocator; }
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
- virtual void releaseMemory();
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ void releaseMemory() override;
/// runOnMachineFunction - pass entry point
- virtual bool runOnMachineFunction(MachineFunction&);
+ bool runOnMachineFunction(MachineFunction&) override;
/// print - Implement the dump method.
- virtual void print(raw_ostream &O, const Module* = 0) const;
+ void print(raw_ostream &O, const Module* = 0) const override;
};
}
void analyzePHINodes(const MachineFunction& Fn);
public:
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
/// RegisterDefIsDead - Return true if the specified instruction defines the
/// specified register, but that definition is dead.
(void)Removed;
return true;
}
-
- void getAnalysisUsage(AnalysisUsage &AU) const;
- virtual void releaseMemory() {
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+
+ void releaseMemory() override {
VirtRegInfo.clear();
}
~MachineBlockFrequencyInfo();
- void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
- bool runOnMachineFunction(MachineFunction &F);
+ bool runOnMachineFunction(MachineFunction &F) override;
/// getblockFreq - Return block frequency. Return 0 if we don't have the
/// information. Please note that initial frequency is equal to 1024. It means
initializeMachineBranchProbabilityInfoPass(Registry);
}
- void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
}
DominatorTreeBase<MachineBasicBlock>& getBase() { return *DT; }
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
/// getRoots - Return the root blocks of the current CFG. This may include
/// multiple blocks if we are computing post dominators. For forward
return DT->getRootNode();
}
- virtual bool runOnMachineFunction(MachineFunction &F);
+ bool runOnMachineFunction(MachineFunction &F) override;
inline bool dominates(const MachineDomTreeNode* A,
const MachineDomTreeNode* B) const {
return DT->isReachableFromEntry(A);
}
- virtual void releaseMemory();
+ void releaseMemory() override;
- virtual void print(raw_ostream &OS, const Module*) const;
+ void print(raw_ostream &OS, const Module*) const override;
};
//===-------------------------------------
~MachineFunctionAnalysis();
MachineFunction &getMF() const { return *MF; }
-
- virtual const char* getPassName() const {
+
+ const char* getPassName() const override {
return "Machine Function Analysis";
}
private:
- virtual bool doInitialization(Module &M);
- virtual bool runOnFunction(Function &F);
- virtual void releaseMemory();
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ bool doInitialization(Module &M) override;
+ bool runOnFunction(Function &F) override;
+ void releaseMemory() override;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
};
} // End llvm namespace
/// For MachineFunctionPasses, calling AU.preservesCFG() indicates that
/// the pass does not modify the MachineBasicBlock CFG.
///
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
private:
/// createPrinterPass - Get a machine function printer pass.
- virtual Pass *createPrinterPass(raw_ostream &O,
- const std::string &Banner) const;
+ Pass *createPrinterPass(raw_ostream &O,
+ const std::string &Banner) const override;
- virtual bool runOnFunction(Function &F);
+ bool runOnFunction(Function &F) override;
};
} // End llvm namespace
/// runOnFunction - Calculate the natural loop information.
///
- virtual bool runOnMachineFunction(MachineFunction &F);
+ bool runOnMachineFunction(MachineFunction &F) override;
- virtual void releaseMemory() { LI.releaseMemory(); }
+ void releaseMemory() override { LI.releaseMemory(); }
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
/// removeLoop - This removes the specified top-level loop from this loop info
/// object. The loop is not deleted, as it will presumably be inserted into
~MachineModuleInfo();
// Initialization and Finalization
- virtual bool doInitialization(Module &);
- virtual bool doFinalization(Module &);
+ bool doInitialization(Module &) override;
+ bool doFinalization(Module &) override;
/// EndFunction - Discard function meta information.
///
// Implement the MachinePassRegistryListener callbacks.
//
- virtual void NotifyAdd(const char *N,
- MachinePassCtor C,
- const char *D) {
+ void NotifyAdd(const char *N, MachinePassCtor C, const char *D) override {
this->addLiteralOption(N, (typename RegistryClass::FunctionPassCtor)C, D);
}
- virtual void NotifyRemove(const char *N) {
+ void NotifyRemove(const char *N) override {
this->removeLiteralOption(N);
}
};
return DT->findNearestCommonDominator(A, B);
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
- virtual void print(llvm::raw_ostream &OS, const Module *M = 0) const;
+ bool runOnMachineFunction(MachineFunction &MF) override;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ void print(llvm::raw_ostream &OS, const Module *M = 0) const override;
};
} //end of namespace llvm
/// Implement ScheduleDAGInstrs interface for scheduling a sequence of
/// reorderable instructions.
- virtual void schedule();
+ void schedule() override;
/// Change the position of an instruction within the basic block and update
/// live ranges and region boundary iterators.
virtual ~ScheduleDAGMILive();
/// Return true if this DAG supports VReg liveness and RegPressure.
- virtual bool hasVRegLiveness() const { return true; }
+ bool hasVRegLiveness() const override { return true; }
/// \brief Return true if register pressure tracking is enabled.
bool isTrackingPressure() const { return ShouldTrackPressure; }
/// Implement ScheduleDAGInstrs interface for scheduling a sequence of
/// reorderable instructions.
- virtual void schedule();
+ void schedule() override;
/// Compute the cyclic critical path through the DAG.
unsigned computeCyclicCriticalPath();
class Trace;
static char ID;
MachineTraceMetrics();
- void getAnalysisUsage(AnalysisUsage&) const;
- bool runOnMachineFunction(MachineFunction&);
- void releaseMemory();
- void verifyAnalysis() const;
+ void getAnalysisUsage(AnalysisUsage&) const override;
+ bool runOnMachineFunction(MachineFunction&) override;
+ void releaseMemory() override;
+ void verifyAnalysis() const override;
friend class Ensemble;
friend class Trace;
/// printCustom - Implement printing for PseudoSourceValue. This is called
/// from Value::print or Value's operator<<.
///
- virtual void printCustom(raw_ostream &O) const;
+ void printCustom(raw_ostream &O) const override;
public:
explicit PseudoSourceValue(enum ValueTy Subclass = PseudoSourceValueVal);
return V->getValueID() == FixedStackPseudoSourceValueVal;
}
- virtual bool isConstant(const MachineFrameInfo *MFI) const;
+ bool isConstant(const MachineFrameInfo *MFI) const override;
- virtual bool isAliased(const MachineFrameInfo *MFI) const;
+ bool isAliased(const MachineFrameInfo *MFI) const override;
- virtual bool mayAlias(const MachineFrameInfo *) const;
+ bool mayAlias(const MachineFrameInfo *) const override;
- virtual void printCustom(raw_ostream &OS) const;
+ void printCustom(raw_ostream &OS) const override;
int getFrameIndex() const { return FI; }
};
/// Build a PBQP instance to represent the register allocation problem for
/// the given MachineFunction.
- virtual PBQPRAProblem *build(MachineFunction *mf, const LiveIntervals *lis,
- const MachineBlockFrequencyInfo *mbfi,
- const RegSet &vregs);
+ PBQPRAProblem *build(MachineFunction *mf, const LiveIntervals *lis,
+ const MachineBlockFrequencyInfo *mbfi,
+ const RegSet &vregs) override;
private:
/// the level of the whole MachineFunction. By default does nothing.
virtual void finalizeSchedule() {}
- virtual void dumpNode(const SUnit *SU) const;
+ void dumpNode(const SUnit *SU) const override;
/// Return a label for a DAG node that points to an instruction.
- virtual std::string getGraphNodeLabel(const SUnit *SU) const;
+ std::string getGraphNodeLabel(const SUnit *SU) const override;
/// Return a label for the region of code covered by the DAG.
- virtual std::string getDAGName() const;
+ std::string getDAGName() const override;
/// \brief Fix register kill flags that scheduling has made invalid.
void fixupKills(MachineBasicBlock *MBB);
/// atIssueLimit - Return true if no more instructions may be issued in this
/// cycle.
- virtual bool atIssueLimit() const;
+ bool atIssueLimit() const override;
// Stalls provides an cycle offset at which SU will be scheduled. It will be
// negative for bottom-up scheduling.
- virtual HazardType getHazardType(SUnit *SU, int Stalls);
- virtual void Reset();
- virtual void EmitInstruction(SUnit *SU);
- virtual void AdvanceCycle();
- virtual void RecedeCycle();
+ HazardType getHazardType(SUnit *SU, int Stalls) override;
+ void Reset() override;
+ void EmitInstruction(SUnit *SU) override;
+ void AdvanceCycle() override;
+ void RecedeCycle() override;
};
}
initializeSlotIndexesPass(*PassRegistry::getPassRegistry());
}
- virtual void getAnalysisUsage(AnalysisUsage &au) const;
- virtual void releaseMemory();
+ void getAnalysisUsage(AnalysisUsage &au) const override;
+ void releaseMemory() override;
- virtual bool runOnMachineFunction(MachineFunction &fn);
+ bool runOnMachineFunction(MachineFunction &fn) override;
/// Dump the indexes.
void dump() const;
/// \brief Tell the pass manager which passes we depend on and what
/// information we preserve.
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
/// \brief Calculate the liveness information for the given machine function.
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
private:
/// \brief Performs the actual liveness calculation for the function.
initializeStackProtectorPass(*PassRegistry::getPassRegistry());
}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addPreserved<DominatorTreeWrapperPass>();
}
SSPLayoutKind getSSPLayout(const AllocaInst *AI) const;
void adjustForColoring(const AllocaInst *From, const AllocaInst *To);
- virtual bool runOnFunction(Function &Fn);
+ bool runOnFunction(Function &Fn) override;
};
} // end namespace llvm
static char ID;
VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) { }
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
/// the specified stack slot
void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
- void print(raw_ostream &OS, const Module* M = 0) const;
+ void print(raw_ostream &OS, const Module* M = 0) const override;
void dump() const;
};
virtual SmallVectorImpl<char> &getContents() = 0;
virtual const SmallVectorImpl<char> &getContents() const = 0;
- virtual uint8_t getBundlePadding() const {
+ uint8_t getBundlePadding() const override {
return BundlePadding;
}
- virtual void setBundlePadding(uint8_t N) {
+ void setBundlePadding(uint8_t N) override {
BundlePadding = N;
}
/// data and also have fixups registered.
///
class MCEncodedFragmentWithFixups : public MCEncodedFragment {
- virtual void anchor();
+ void anchor() override;
public:
MCEncodedFragmentWithFixups(MCFragment::FragmentType FType,
/// Fragment for data and encoded instructions.
///
class MCDataFragment : public MCEncodedFragmentWithFixups {
- virtual void anchor();
+ void anchor() override;
/// \brief Does this fragment contain encoded instructions anywhere in it?
bool HasInstructions;
{
}
- virtual SmallVectorImpl<char> &getContents() { return Contents; }
- virtual const SmallVectorImpl<char> &getContents() const { return Contents; }
+ SmallVectorImpl<char> &getContents() override { return Contents; }
+ virtual const SmallVectorImpl<char> &getContents() const override {
+ return Contents;
+ }
- SmallVectorImpl<MCFixup> &getFixups() {
+ SmallVectorImpl<MCFixup> &getFixups() override {
return Fixups;
}
- const SmallVectorImpl<MCFixup> &getFixups() const {
+ const SmallVectorImpl<MCFixup> &getFixups() const override {
return Fixups;
}
- virtual bool hasInstructions() const { return HasInstructions; }
+ bool hasInstructions() const override { return HasInstructions; }
virtual void setHasInstructions(bool V) { HasInstructions = V; }
- virtual bool alignToBundleEnd() const { return AlignToBundleEnd; }
- virtual void setAlignToBundleEnd(bool V) { AlignToBundleEnd = V; }
+ bool alignToBundleEnd() const override { return AlignToBundleEnd; }
+ void setAlignToBundleEnd(bool V) override { AlignToBundleEnd = V; }
- fixup_iterator fixup_begin() { return Fixups.begin(); }
- const_fixup_iterator fixup_begin() const { return Fixups.begin(); }
+ fixup_iterator fixup_begin() override { return Fixups.begin(); }
+ const_fixup_iterator fixup_begin() const override { return Fixups.begin(); }
- fixup_iterator fixup_end() {return Fixups.end();}
- const_fixup_iterator fixup_end() const {return Fixups.end();}
+ fixup_iterator fixup_end() override {return Fixups.end();}
+ const_fixup_iterator fixup_end() const override {return Fixups.end();}
static bool classof(const MCFragment *F) {
return F->getKind() == MCFragment::FT_Data;
/// consumption.
///
class MCCompactEncodedInstFragment : public MCEncodedFragment {
- virtual void anchor();
+ void anchor() override;
/// \brief Should this fragment be aligned to the end of a bundle?
bool AlignToBundleEnd;
{
}
- virtual bool hasInstructions() const {
+ bool hasInstructions() const override {
return true;
}
- virtual SmallVectorImpl<char> &getContents() { return Contents; }
- virtual const SmallVectorImpl<char> &getContents() const { return Contents; }
+ SmallVectorImpl<char> &getContents() override { return Contents; }
+ const SmallVectorImpl<char> &getContents() const override { return Contents; }
- virtual bool alignToBundleEnd() const { return AlignToBundleEnd; }
- virtual void setAlignToBundleEnd(bool V) { AlignToBundleEnd = V; }
+ bool alignToBundleEnd() const override { return AlignToBundleEnd; }
+ void setAlignToBundleEnd(bool V) override { AlignToBundleEnd = V; }
static bool classof(const MCFragment *F) {
return F->getKind() == MCFragment::FT_CompactEncodedInst;
/// relaxed during the assembler layout and relaxation stage.
///
class MCRelaxableFragment : public MCEncodedFragmentWithFixups {
- virtual void anchor();
+ void anchor() override;
/// Inst - The instruction this is a fragment for.
MCInst Inst;
: MCEncodedFragmentWithFixups(FT_Relaxable, SD), Inst(_Inst), STI(_STI) {
}
- virtual SmallVectorImpl<char> &getContents() { return Contents; }
- virtual const SmallVectorImpl<char> &getContents() const { return Contents; }
+ SmallVectorImpl<char> &getContents() override { return Contents; }
+ const SmallVectorImpl<char> &getContents() const override { return Contents; }
const MCInst &getInst() const { return Inst; }
void setInst(const MCInst& Value) { Inst = Value; }
const MCSubtargetInfo &getSubtargetInfo() { return STI; }
- SmallVectorImpl<MCFixup> &getFixups() {
+ SmallVectorImpl<MCFixup> &getFixups() override {
return Fixups;
}
- const SmallVectorImpl<MCFixup> &getFixups() const {
+ const SmallVectorImpl<MCFixup> &getFixups() const override {
return Fixups;
}
- virtual bool hasInstructions() const { return true; }
+ bool hasInstructions() const override { return true; }
- fixup_iterator fixup_begin() { return Fixups.begin(); }
- const_fixup_iterator fixup_begin() const { return Fixups.begin(); }
+ fixup_iterator fixup_begin() override { return Fixups.begin(); }
+ const_fixup_iterator fixup_begin() const override { return Fixups.begin(); }
- fixup_iterator fixup_end() {return Fixups.end();}
- const_fixup_iterator fixup_end() const {return Fixups.end();}
+ fixup_iterator fixup_end() override {return Fixups.end();}
+ const_fixup_iterator fixup_end() const override {return Fixups.end();}
static bool classof(const MCFragment *F) {
return F->getKind() == MCFragment::FT_Relaxable;
bool ShouldOmitSectionDirective(StringRef Name, const MCAsmInfo &MAI) const;
StringRef getSectionName() const { return SectionName; }
- virtual std::string getLabelBeginName() const {
+ std::string getLabelBeginName() const override {
return SectionName.str() + "_begin";
}
- virtual std::string getLabelEndName() const {
+ std::string getLabelEndName() const override {
return SectionName.str() + "_end";
}
unsigned getCharacteristics() const { return Characteristics; }
void setSelection(int Selection, const MCSectionCOFF *Assoc = 0) const;
- virtual void PrintSwitchToSection(const MCAsmInfo &MAI,
- raw_ostream &OS,
- const MCExpr *Subsection) const;
- virtual bool UseCodeAlign() const;
- virtual bool isVirtualSection() const;
+ void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS,
+ const MCExpr *Subsection) const override;
+ bool UseCodeAlign() const override;
+ bool isVirtualSection() const override;
static bool classof(const MCSection *S) {
return S->getVariant() == SV_COFF;
bool ShouldOmitSectionDirective(StringRef Name, const MCAsmInfo &MAI) const;
StringRef getSectionName() const { return SectionName; }
- virtual std::string getLabelBeginName() const {
+ std::string getLabelBeginName() const override {
if (Group)
return (SectionName.str() + '_' + Group->getName() + "_begin").str();
return SectionName.str() + "_begin";
}
- virtual std::string getLabelEndName() const {
+ std::string getLabelEndName() const override {
if (Group)
return (SectionName.str() + '_' + Group->getName() + "_end").str();
return SectionName.str() + "_end";
unsigned getEntrySize() const { return EntrySize; }
const MCSymbol *getGroup() const { return Group; }
- void PrintSwitchToSection(const MCAsmInfo &MAI,
- raw_ostream &OS,
- const MCExpr *Subsection) const;
- virtual bool UseCodeAlign() const;
- virtual bool isVirtualSection() const;
+ void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS,
+ const MCExpr *Subsection) const override;
+ bool UseCodeAlign() const override;
+ bool isVirtualSection() const override;
/// isBaseAddressKnownZero - We know that non-allocatable sections (like
/// debug info) have a base of zero.
- virtual bool isBaseAddressKnownZero() const {
+ bool isBaseAddressKnownZero() const override {
return (getFlags() & ELF::SHF_ALLOC) == 0;
}
return StringRef(SectionName);
}
- virtual std::string getLabelBeginName() const {
+ std::string getLabelBeginName() const override {
return StringRef(getSegmentName().str() + getSectionName().str() + "_begin");
}
- virtual std::string getLabelEndName() const {
+ std::string getLabelEndName() const override {
return StringRef(getSegmentName().str() + getSectionName().str() + "_end");
}
bool &TAAParsed, // Out.
unsigned &StubSize); // Out.
- virtual void PrintSwitchToSection(const MCAsmInfo &MAI,
- raw_ostream &OS,
- const MCExpr *Subsection) const;
- virtual bool UseCodeAlign() const;
- virtual bool isVirtualSection() const;
+ void PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS,
+ const MCExpr *Subsection) const override;
+ bool UseCodeAlign() const override;
+ bool isVirtualSection() const override;
static bool classof(const MCSection *S) {
return S->getVariant() == SV_MachO;
virtual void AnnotateTLSDescriptorSequence(const MCSymbolRefExpr *SRE);
- virtual void finish();
+ void finish() override;
/// Callback used to implement the ldr= pseudo.
/// Add a new entry to the constant pool for the current section and return an
~AggressiveAntiDepBreaker();
/// Start - Initialize anti-dep breaking for a new basic block.
- void StartBlock(MachineBasicBlock *BB);
+ void StartBlock(MachineBasicBlock *BB) override;
/// BreakAntiDependencies - Identifiy anti-dependencies along the critical
/// path
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned InsertPosIndex,
- DbgValueVector &DbgValues);
+ DbgValueVector &DbgValues) override;
/// Observe - Update liveness information to account for the current
/// instruction, which will not be scheduled.
///
- void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex);
+ void Observe(MachineInstr *MI, unsigned Count,
+ unsigned InsertPosIndex) override;
/// Finish - Finish anti-dep breaking for a basic block.
- void FinishBlock();
+ void FinishBlock() override;
private:
/// Keep track of a position in the allocation order for each regclass.
static char ID;
explicit BranchFolderPass(): MachineFunctionPass(ID) {}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<TargetPassConfig>();
MachineFunctionPass::getAnalysisUsage(AU);
}
: FunctionPass(ID), TM(TM), TLI(0) {
initializeCodeGenPreparePass(*PassRegistry::getPassRegistry());
}
- bool runOnFunction(Function &F);
+ bool runOnFunction(Function &F) override;
- const char *getPassName() const { return "CodeGen Prepare"; }
+ const char *getPassName() const override { return "CodeGen Prepare"; }
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addPreserved<DominatorTreeWrapperPass>();
AU.addRequired<TargetLibraryInfo>();
}
namespace {
class CodeGenPrepareFortifiedLibCalls : public SimplifyFortifiedLibCalls {
protected:
- void replaceCall(Value *With) {
+ void replaceCall(Value *With) override {
CI->replaceAllUsesWith(With);
CI->eraseFromParent();
}
- bool isFoldable(unsigned SizeCIOp, unsigned, bool) const {
+ bool isFoldable(unsigned SizeCIOp, unsigned, bool) const override {
if (ConstantInt *SizeCI =
dyn_cast<ConstantInt>(CI->getArgOperand(SizeCIOp)))
return SizeCI->isAllOnesValue();
}
/// \brief Move the instruction back to its original position.
- void undo() {
+ void undo() override {
DEBUG(dbgs() << "Undo: moveBefore: " << *Inst << "\n");
Position.insert(Inst);
}
}
/// \brief Restore the original value of the instruction.
- void undo() {
+ void undo() override {
DEBUG(dbgs() << "Undo: setOperand:" << Idx << "\n"
<< "for: " << *Inst << "\n"
<< "with: " << *Origin << "\n");
}
/// \brief Restore the original list of uses.
- void undo() {
+ void undo() override {
DEBUG(dbgs() << "Undo: OperandsHider: " << *Inst << "\n");
for (unsigned It = 0, EndIt = OriginalValues.size(); It != EndIt; ++It)
Inst->setOperand(It, OriginalValues[It]);
Instruction *getBuiltInstruction() { return Inst; }
/// \brief Remove the built instruction.
- void undo() {
+ void undo() override {
DEBUG(dbgs() << "Undo: TruncBuilder: " << *Inst << "\n");
Inst->eraseFromParent();
}
Instruction *getBuiltInstruction() { return Inst; }
/// \brief Remove the built instruction.
- void undo() {
+ void undo() override {
DEBUG(dbgs() << "Undo: SExtBuilder: " << *Inst << "\n");
Inst->eraseFromParent();
}
}
/// \brief Mutate the instruction back to its original type.
- void undo() {
+ void undo() override {
DEBUG(dbgs() << "Undo: MutateType: " << *Inst << " with " << *OrigTy
<< "\n");
Inst->mutateType(OrigTy);
}
/// \brief Reassign the original uses of Inst to Inst.
- void undo() {
+ void undo() override {
DEBUG(dbgs() << "Undo: UsersReplacer: " << *Inst << "\n");
for (use_iterator UseIt = OriginalUses.begin(),
EndIt = OriginalUses.end();
~InstructionRemover() { delete Replacer; }
/// \brief Really remove the instruction.
- void commit() { delete Inst; }
+ void commit() override { delete Inst; }
/// \brief Resurrect the instruction and reassign it to the proper uses if
/// new value was provided when build this action.
- void undo() {
+ void undo() override {
DEBUG(dbgs() << "Undo: InstructionRemover: " << *Inst << "\n");
Inserter.insert(Inst);
if (Replacer)
~CriticalAntiDepBreaker();
/// Start - Initialize anti-dep breaking for a new basic block.
- void StartBlock(MachineBasicBlock *BB);
+ void StartBlock(MachineBasicBlock *BB) override;
/// BreakAntiDependencies - Identifiy anti-dependencies along the critical
/// path
MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned InsertPosIndex,
- DbgValueVector &DbgValues);
+ DbgValueVector &DbgValues) override;
/// Observe - Update liveness information to account for the current
/// instruction, which will not be scheduled.
///
- void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex);
+ void Observe(MachineInstr *MI, unsigned Count,
+ unsigned InsertPosIndex) override;
/// Finish - Finish anti-dep breaking for a basic block.
- void FinishBlock();
+ void FinishBlock() override;
private:
void PrescanInstruction(MachineInstr *MI);
DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
MachineDominatorTree &MDT, bool IsPostRA);
// Schedule - Actual scheduling work.
- void schedule();
+ void schedule() override;
};
}
namespace {
class DeadMachineInstructionElim : public MachineFunctionPass {
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
const TargetRegisterInfo *TRI;
const MachineRegisterInfo *MRI;
initializeDominatorTreeWrapperPassPass(*PassRegistry::getPassRegistry());
}
- virtual bool runOnFunction(Function &Fn);
+ bool runOnFunction(Function &Fn) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const { }
+ void getAnalysisUsage(AnalysisUsage &AU) const override { }
- const char *getPassName() const {
+ const char *getPassName() const override {
return "Exception handling preparation";
}
};
public:
static char ID;
EarlyIfConverter() : MachineFunctionPass(ID) {}
- void getAnalysisUsage(AnalysisUsage &AU) const;
- bool runOnMachineFunction(MachineFunction &MF);
- const char *getPassName() const { return "Early If-Conversion"; }
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ bool runOnMachineFunction(MachineFunction &MF) override;
+ const char *getPassName() const override { return "Early If-Conversion"; }
private:
bool tryConvertIf(MachineBasicBlock*);
DebugLoc DL) const;
public:
ErlangGC();
- bool findCustomSafePoints(GCFunctionInfo &FI, MachineFunction &MF);
+ bool findCustomSafePoints(GCFunctionInfo &FI, MachineFunction &MF) override;
};
}
ExeDepsFix(const TargetRegisterClass *rc)
: MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual const char *getPassName() const {
+ const char *getPassName() const override {
return "Execution dependency fix";
}
ExpandISelPseudos() : MachineFunctionPass(ID) {}
private:
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
MachineFunctionPass::getAnalysisUsage(AU);
}
};
static char ID; // Pass identification, replacement for typeid
ExpandPostRA() : MachineFunctionPass(ID) {}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
}
/// runOnMachineFunction - pass entry point
- bool runOnMachineFunction(MachineFunction&);
+ bool runOnMachineFunction(MachineFunction&) override;
private:
bool LowerSubregToReg(MachineInstr *MI);
public:
explicit Printer(raw_ostream &OS) : FunctionPass(ID), OS(OS) {}
-
- const char *getPassName() const;
- void getAnalysisUsage(AnalysisUsage &AU) const;
-
- bool runOnFunction(Function &F);
- bool doFinalization(Module &M);
+
+ const char *getPassName() const override;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+
+ bool runOnFunction(Function &F) override;
+ bool doFinalization(Module &M) override;
};
}
static char ID;
LowerIntrinsics();
- const char *getPassName() const;
- void getAnalysisUsage(AnalysisUsage &AU) const;
+ const char *getPassName() const override;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
- bool doInitialization(Module &M);
- bool runOnFunction(Function &F);
+ bool doInitialization(Module &M) override;
+ bool runOnFunction(Function &F) override;
};
static char ID;
GCMachineCodeAnalysis();
- void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
- bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
};
}
initializeIfConverterPass(*PassRegistry::getPassRegistry());
}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineBranchProbabilityInfo>();
MachineFunctionPass::getAnalysisUsage(AU);
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
private:
bool ReverseBranchCondition(BBInfo &BBI);
TRI(*mf.getTarget().getRegisterInfo()),
MBFI(pass.getAnalysis<MachineBlockFrequencyInfo>()) {}
- void spill(LiveRangeEdit &);
+ void spill(LiveRangeEdit &) override;
private:
bool isSnippet(const LiveInterval &SnipLI);
private:
- virtual bool runOnMachineFunction(MachineFunction &);
- virtual void releaseMemory();
- virtual void getAnalysisUsage(AnalysisUsage &) const;
+ bool runOnMachineFunction(MachineFunction &) override;
+ void releaseMemory() override;
+ void getAnalysisUsage(AnalysisUsage &) const override;
};
explicit LocalStackSlotPass() : MachineFunctionPass(ID) {
initializeLocalStackSlotPassPass(*PassRegistry::getPassRegistry());
}
- bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
AU.addRequired<StackProtector>();
MachineFunctionPass::getAnalysisUsage(AU);
initializeMachineBlockPlacementPass(*PassRegistry::getPassRegistry());
}
- bool runOnMachineFunction(MachineFunction &F);
+ bool runOnMachineFunction(MachineFunction &F) override;
- void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineBranchProbabilityInfo>();
AU.addRequired<MachineBlockFrequencyInfo>();
AU.addRequired<MachineLoopInfo>();
initializeMachineBlockPlacementStatsPass(*PassRegistry::getPassRegistry());
}
- bool runOnMachineFunction(MachineFunction &F);
+ bool runOnMachineFunction(MachineFunction &F) override;
- void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineBranchProbabilityInfo>();
AU.addRequired<MachineBlockFrequencyInfo>();
AU.setPreservesAll();
initializeMachineCSEPass(*PassRegistry::getPassRegistry());
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
AU.addRequired<AliasAnalysis>();
AU.addPreserved<MachineDominatorTree>();
}
- virtual void releaseMemory() {
+ void releaseMemory() override {
ScopeMap.clear();
Exps.clear();
}
initializeMachineCopyPropagationPass(*PassRegistry::getPassRegistry());
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
private:
typedef SmallVector<unsigned, 4> DestList;
MachineFunctionPrinterPass(raw_ostream &os, const std::string &banner)
: MachineFunctionPass(ID), OS(os), Banner(banner) {}
- const char *getPassName() const { return "MachineFunction Printer"; }
+ const char *getPassName() const override { return "MachineFunction Printer"; }
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
- bool runOnMachineFunction(MachineFunction &MF) {
+ bool runOnMachineFunction(MachineFunction &MF) override {
OS << "# " << Banner << ":\n";
MF.print(OS, getAnalysisIfAvailable<SlotIndexes>());
return false;
initializeUnpackMachineBundlesPass(*PassRegistry::getPassRegistry());
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
};
} // end anonymous namespace
initializeFinalizeMachineBundlesPass(*PassRegistry::getPassRegistry());
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
};
} // end anonymous namespace
initializeMachineLICMPass(*PassRegistry::getPassRegistry());
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineLoopInfo>();
AU.addRequired<MachineDominatorTree>();
AU.addRequired<AliasAnalysis>();
MachineFunctionPass::getAnalysisUsage(AU);
}
- virtual void releaseMemory() {
+ void releaseMemory() override {
RegSeen.clear();
RegPressure.clear();
RegLimit.clear();
void setMap(MMIAddrLabelMap *map) { Map = map; }
- virtual void deleted();
- virtual void allUsesReplacedWith(Value *V2);
+ void deleted() override;
+ void allUsesReplacedWith(Value *V2) override;
};
class MMIAddrLabelMap {
public:
MachineSchedulerBase(char &ID): MachineFunctionPass(ID) {}
- virtual void print(raw_ostream &O, const Module* = 0) const;
+ void print(raw_ostream &O, const Module* = 0) const override;
protected:
void scheduleRegions(ScheduleDAGInstrs &Scheduler);
public:
MachineScheduler();
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
- virtual bool runOnMachineFunction(MachineFunction&);
+ bool runOnMachineFunction(MachineFunction&) override;
static char ID; // Class identification, replacement for typeinfo
public:
PostMachineScheduler();
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
- virtual bool runOnMachineFunction(MachineFunction&);
+ bool runOnMachineFunction(MachineFunction&) override;
static char ID; // Class identification, replacement for typeinfo
const TargetRegisterInfo *tri)
: TII(tii), TRI(tri) {}
- virtual void apply(ScheduleDAGMI *DAG);
+ void apply(ScheduleDAGMI *DAG) override;
protected:
void clusterNeighboringLoads(ArrayRef<SUnit*> Loads, ScheduleDAGMI *DAG);
};
public:
MacroFusion(const TargetInstrInfo *tii): TII(tii) {}
- virtual void apply(ScheduleDAGMI *DAG);
+ void apply(ScheduleDAGMI *DAG) override;
};
} // anonymous
public:
CopyConstrain(const TargetInstrInfo *, const TargetRegisterInfo *) {}
- virtual void apply(ScheduleDAGMI *DAG);
+ void apply(ScheduleDAGMI *DAG) override;
protected:
void constrainLocalCopy(SUnit *CopySU, ScheduleDAGMILive *DAG);
public:
ILPScheduler(bool MaximizeILP): DAG(0), Cmp(MaximizeILP) {}
- virtual void initialize(ScheduleDAGMI *dag) {
+ void initialize(ScheduleDAGMI *dag) override {
assert(dag->hasVRegLiveness() && "ILPScheduler needs vreg liveness");
DAG = static_cast<ScheduleDAGMILive*>(dag);
DAG->computeDFSResult();
ReadyQ.clear();
}
- virtual void registerRoots() {
+ void registerRoots() override {
// Restore the heap in ReadyQ with the updated DFS results.
std::make_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
}
/// -----------------------------------------
/// Callback to select the highest priority node from the ready Q.
- virtual SUnit *pickNode(bool &IsTopNode) {
+ SUnit *pickNode(bool &IsTopNode) override {
if (ReadyQ.empty()) return NULL;
std::pop_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
SUnit *SU = ReadyQ.back();
}
/// \brief Scheduler callback to notify that a new subtree is scheduled.
- virtual void scheduleTree(unsigned SubtreeID) {
+ void scheduleTree(unsigned SubtreeID) override {
std::make_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
}
/// Callback after a node is scheduled. Mark a newly scheduled tree, notify
/// DFSResults, and resort the priority Q.
- virtual void schedNode(SUnit *SU, bool IsTopNode) {
+ void schedNode(SUnit *SU, bool IsTopNode) override {
assert(!IsTopNode && "SchedDFSResult needs bottom-up");
}
- virtual void releaseTopNode(SUnit *) { /*only called for top roots*/ }
+ void releaseTopNode(SUnit *) override { /*only called for top roots*/ }
- virtual void releaseBottomNode(SUnit *SU) {
+ void releaseBottomNode(SUnit *SU) override {
ReadyQ.push_back(SU);
std::push_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
}
initializeMachineSinkingPass(*PassRegistry::getPassRegistry());
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
AU.addRequired<AliasAnalysis>();
AU.addPreserved<MachineLoopInfo>();
}
- virtual void releaseMemory() {
+ void releaseMemory() override {
CEBCandidates.clear();
}
// instructions.
namespace {
class MinInstrCountEnsemble : public MachineTraceMetrics::Ensemble {
- const char *getName() const { return "MinInstr"; }
- const MachineBasicBlock *pickTracePred(const MachineBasicBlock*);
- const MachineBasicBlock *pickTraceSucc(const MachineBasicBlock*);
+ const char *getName() const override { return "MinInstr"; }
+ const MachineBasicBlock *pickTracePred(const MachineBasicBlock*) override;
+ const MachineBasicBlock *pickTraceSucc(const MachineBasicBlock*) override;
public:
MinInstrCountEnsemble(MachineTraceMetrics *mtm)
initializeMachineVerifierPassPass(*PassRegistry::getPassRegistry());
}
- void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
- bool runOnMachineFunction(MachineFunction &MF) {
+ bool runOnMachineFunction(MachineFunction &MF) override {
MF.verify(this, Banner);
return false;
}
initializeOptimizePHIsPass(*PassRegistry::getPassRegistry());
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}
initializePHIEliminationPass(*PassRegistry::getPassRegistry());
}
- virtual bool runOnMachineFunction(MachineFunction &Fn);
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ bool runOnMachineFunction(MachineFunction &Fn) override;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
private:
/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions
initializePeepholeOptimizerPass(*PassRegistry::getPassRegistry());
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
if (Aggressive) {
static char ID;
PostRAScheduler() : MachineFunctionPass(ID) {}
- void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
AU.addRequired<AliasAnalysis>();
AU.addRequired<TargetPassConfig>();
MachineFunctionPass::getAnalysisUsage(AU);
}
- bool runOnMachineFunction(MachineFunction &Fn);
+ bool runOnMachineFunction(MachineFunction &Fn) override;
};
char PostRAScheduler::ID = 0;
/// startBlock - Initialize register live-range state for scheduling in
/// this block.
///
- void startBlock(MachineBasicBlock *BB);
+ void startBlock(MachineBasicBlock *BB) override;
// Set the index of RegionEnd within the current BB.
void setEndIndex(unsigned EndIdx) { EndIndex = EndIdx; }
/// Initialize the scheduler state for the next scheduling region.
- virtual void enterRegion(MachineBasicBlock *bb,
- MachineBasicBlock::iterator begin,
- MachineBasicBlock::iterator end,
- unsigned regioninstrs);
+ void enterRegion(MachineBasicBlock *bb,
+ MachineBasicBlock::iterator begin,
+ MachineBasicBlock::iterator end,
+ unsigned regioninstrs) override;
/// Notify that the scheduler has finished scheduling the current region.
- virtual void exitRegion();
+ void exitRegion() override;
/// Schedule - Schedule the instruction range using list scheduling.
///
- void schedule();
+ void schedule() override;
void EmitSchedule();
/// finishBlock - Clean up register live-range state.
///
- void finishBlock();
+ void finishBlock() override;
private:
void ReleaseSucc(SUnit *SU, SDep *SuccEdge);
initializeProcessImplicitDefsPass(*PassRegistry::getPassRegistry());
}
- virtual void getAnalysisUsage(AnalysisUsage &au) const;
+ void getAnalysisUsage(AnalysisUsage &au) const override;
- virtual bool runOnMachineFunction(MachineFunction &fn);
+ bool runOnMachineFunction(MachineFunction &fn) override;
};
} // end anonymous namespace
initializePEIPass(*PassRegistry::getPassRegistry());
}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
/// frame indexes with appropriate references.
///
- bool runOnMachineFunction(MachineFunction &Fn);
+ bool runOnMachineFunction(MachineFunction &Fn) override;
private:
RegScavenger *RS;
RABasic();
/// Return the pass name.
- virtual const char* getPassName() const {
+ const char* getPassName() const override {
return "Basic Register Allocator";
}
/// RABasic analysis usage.
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
- virtual void releaseMemory();
+ void releaseMemory() override;
- virtual Spiller &spiller() { return *SpillerInstance; }
+ Spiller &spiller() override { return *SpillerInstance; }
virtual float getPriority(LiveInterval *LI) { return LI->weight; }
- virtual void enqueue(LiveInterval *LI) {
+ void enqueue(LiveInterval *LI) override {
Queue.push(LI);
}
- virtual LiveInterval *dequeue() {
+ LiveInterval *dequeue() override {
if (Queue.empty())
return 0;
LiveInterval *LI = Queue.top();
return LI;
}
- virtual unsigned selectOrSplit(LiveInterval &VirtReg,
- SmallVectorImpl<unsigned> &SplitVRegs);
+ unsigned selectOrSplit(LiveInterval &VirtReg,
+ SmallVectorImpl<unsigned> &SplitVRegs) override;
/// Perform register allocation.
- virtual bool runOnMachineFunction(MachineFunction &mf);
+ bool runOnMachineFunction(MachineFunction &mf) override;
// Helper for spilling all live virtual registers currently unified under preg
// that interfere with the most recently queried lvr. Return true if spilling
spillImpossible = ~0u
};
public:
- virtual const char *getPassName() const {
+ const char *getPassName() const override {
return "Fast Register Allocator";
}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}
private:
- bool runOnMachineFunction(MachineFunction &Fn);
+ bool runOnMachineFunction(MachineFunction &Fn) override;
void AllocateBasicBlock();
void handleThroughOperands(MachineInstr *MI,
SmallVectorImpl<unsigned> &VirtDead);
RAGreedy();
/// Return the pass name.
- virtual const char* getPassName() const {
+ const char* getPassName() const override {
return "Greedy Register Allocator";
}
/// RAGreedy analysis usage.
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
- virtual void releaseMemory();
- virtual Spiller &spiller() { return *SpillerInstance; }
- virtual void enqueue(LiveInterval *LI);
- virtual LiveInterval *dequeue();
- virtual unsigned selectOrSplit(LiveInterval&,
- SmallVectorImpl<unsigned>&);
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ void releaseMemory() override;
+ Spiller &spiller() override { return *SpillerInstance; }
+ void enqueue(LiveInterval *LI) override;
+ LiveInterval *dequeue() override;
+ unsigned selectOrSplit(LiveInterval&, SmallVectorImpl<unsigned>&) override;
/// Perform register allocation.
- virtual bool runOnMachineFunction(MachineFunction &mf);
+ bool runOnMachineFunction(MachineFunction &mf) override;
static char ID;
unsigned selectOrSplitImpl(LiveInterval &, SmallVectorImpl<unsigned> &,
SmallVirtRegSet &, unsigned = 0);
- bool LRE_CanEraseVirtReg(unsigned);
- void LRE_WillShrinkVirtReg(unsigned);
- void LRE_DidCloneVirtReg(unsigned, unsigned);
+ bool LRE_CanEraseVirtReg(unsigned) override;
+ void LRE_WillShrinkVirtReg(unsigned) override;
+ void LRE_DidCloneVirtReg(unsigned, unsigned) override;
void enqueue(PQueue &CurQueue, LiveInterval *LI);
LiveInterval *dequeue(PQueue &CurQueue);
}
/// Return the pass name.
- virtual const char* getPassName() const {
+ const char* getPassName() const override {
return "PBQP Register Allocator";
}
/// PBQP analysis usage.
- virtual void getAnalysisUsage(AnalysisUsage &au) const;
+ void getAnalysisUsage(AnalysisUsage &au) const override;
/// Perform register allocation
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
private:
void eliminateDeadDefs();
/// LiveRangeEdit callback.
- void LRE_WillEraseInstruction(MachineInstr *MI);
+ void LRE_WillEraseInstruction(MachineInstr *MI) override;
/// coalesceLocals - coalesce the LocalWorkList.
void coalesceLocals();
initializeRegisterCoalescerPass(*PassRegistry::getPassRegistry());
}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
- virtual void releaseMemory();
+ void releaseMemory() override;
/// runOnMachineFunction - pass entry point
- virtual bool runOnMachineFunction(MachineFunction&);
+ bool runOnMachineFunction(MachineFunction&) override;
/// print - Implement the dump method.
- virtual void print(raw_ostream &O, const Module* = 0) const;
+ void print(raw_ostream &O, const Module* = 0) const override;
};
} /// end anonymous namespace
public:
ShadowStackGC();
- bool initializeCustomLowering(Module &M);
- bool performCustomLowering(Function &F);
+ bool initializeCustomLowering(Module &M) override;
+ bool performCustomLowering(Function &F) override;
private:
bool IsNullValue(Value *V);
public:
static char ID; // Pass identification, replacement for typeid
explicit SjLjEHPrepare(const TargetMachine *TM) : FunctionPass(ID), TM(TM) {}
- bool doInitialization(Module &M);
- bool runOnFunction(Function &F);
+ bool doInitialization(Module &M) override;
+ bool runOnFunction(Function &F) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {}
- const char *getPassName() const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {}
+ const char *getPassName() const override {
return "SJLJ Exception Handling preparation";
}
}
private:
- virtual bool runOnMachineFunction(MachineFunction&);
- virtual void getAnalysisUsage(AnalysisUsage&) const;
- virtual void releaseMemory();
+ bool runOnMachineFunction(MachineFunction&) override;
+ void getAnalysisUsage(AnalysisUsage&) const override;
+ void releaseMemory() override;
void activate(unsigned);
};
VirtRegMap &vrm)
: SpillerBase(pass, mf, vrm) {}
- void spill(LiveRangeEdit &LRE) {
+ void spill(LiveRangeEdit &LRE) override {
// Ignore spillIs - we don't use it.
trivialSpillEverywhere(LRE);
}
StackColoring() : MachineFunctionPass(ID) {
initializeStackColoringPass(*PassRegistry::getPassRegistry());
}
- void getAnalysisUsage(AnalysisUsage &AU) const;
- bool runOnMachineFunction(MachineFunction &MF);
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ bool runOnMachineFunction(MachineFunction &MF) override;
private:
/// Debug.
initializeStackSlotColoringPass(*PassRegistry::getPassRegistry());
}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
AU.addRequired<SlotIndexes>();
AU.addPreserved<SlotIndexes>();
MachineFunctionPass::getAnalysisUsage(AU);
}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
private:
void InitializeSlots();
explicit TailDuplicatePass() :
MachineFunctionPass(ID), PreRegAlloc(false) {}
- virtual bool runOnMachineFunction(MachineFunction &MF);
+ bool runOnMachineFunction(MachineFunction &MF) override;
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
private:
void AddSSAUpdateEntry(unsigned OrigReg, unsigned NewReg,
initializeTwoAddressInstructionPassPass(*PassRegistry::getPassRegistry());
}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
AU.addRequired<AliasAnalysis>();
AU.addPreserved<LiveVariables>();
}
/// runOnMachineFunction - Pass entry point.
- bool runOnMachineFunction(MachineFunction&);
+ bool runOnMachineFunction(MachineFunction&) override;
};
} // end anonymous namespace
namespace {
class UnreachableBlockElim : public FunctionPass {
- virtual bool runOnFunction(Function &F);
+ bool runOnFunction(Function &F) override;
public:
static char ID; // Pass identification, replacement for typeid
UnreachableBlockElim() : FunctionPass(ID) {
initializeUnreachableBlockElimPass(*PassRegistry::getPassRegistry());
}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addPreserved<DominatorTreeWrapperPass>();
}
};
namespace {
class UnreachableMachineBlockElim : public MachineFunctionPass {
- virtual bool runOnMachineFunction(MachineFunction &F);
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ bool runOnMachineFunction(MachineFunction &F) override;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
MachineModuleInfo *MMI;
public:
static char ID; // Pass identification, replacement for typeid
static char ID;
VirtRegRewriter() : MachineFunctionPass(ID) {}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const;
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
- virtual bool runOnMachineFunction(MachineFunction&);
+ bool runOnMachineFunction(MachineFunction&) override;
};
} // end anonymous namespace
projects / oota-llvm.git / commitdiff