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Enable FeatureFastUAMem for Silvermont processor
author
Alexey Volkov
<avolkov.intel@gmail.com>
Fri, 7 Mar 2014 09:03:49 +0000
(09:03 +0000)
committer
Alexey Volkov
<avolkov.intel@gmail.com>
Fri, 7 Mar 2014 09:03:49 +0000
(09:03 +0000)
Differential Revision: http://llvm-reviews.chandlerc.com/D2982
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203218
91177308
-0d34-0410-b5e6-
96231b3b80d8
lib/Target/X86/X86.td
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diff --git
a/lib/Target/X86/X86.td
b/lib/Target/X86/X86.td
index ed6a78f02bca1160a4f4f36cc050354a4eed0e2a..78edcf04788a54895110a37b8d0447fb5b3caf51 100644
(file)
--- a/
lib/Target/X86/X86.td
+++ b/
lib/Target/X86/X86.td
@@
-227,7
+227,7
@@
def : ProcessorModel<"slm", SLMModel, [ProcIntelSLM,
FeaturePCLMUL, FeatureAES,
FeatureCallRegIndirect,
FeaturePRFCHW,
- FeatureSlowBTMem]>;
+ FeatureSlowBTMem
, FeatureFastUAMem
]>;
// "Arrandale" along with corei3 and corei5
def : ProcessorModel<"corei7", SandyBridgeModel,
[FeatureSSE42, FeatureCMPXCHG16B, FeatureSlowBTMem,