Merging r259649:

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r259649 | jamesm | 2016-02-03 07:05:06 -0800 (Wed, 03 Feb 2016) | 11 lines

[DemandedBits] Revert r249687 due to PR26071

This regresses a test in LoopVectorize, so I'll need to go away and think about how to solve this in a way that isn't broken.

From the writeup in PR26071:

What's happening is that ComputeKnownZeroes is telling us that all bits except the LSB are zero. We're then deciding that only the LSB needs to be demanded from the icmp's inputs.

This is where we're wrong - we're assuming that after simplification the bits that were known zero will continue to be known zero. But they're not - during trivialization the upper bits get changed (because an XOR isn't shrunk), so the icmp fails.

The fault is in demandedbits - its contract does clearly state that a non-demanded bit may either be zero or one.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@259699 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Analysis/DemandedBits.cpp b/lib/Analysis/DemandedBits.cpp
index 143d0b79f188e5f59372ddd1a2231acf1cfa0747..6f92ba6289a4ac5a6676e936e65f095261b7e621 100644 (file)
--- a/lib/Analysis/DemandedBits.cpp
+++ b/lib/Analysis/DemandedBits.cpp
@@ -242,13 +242,6 @@ void DemandedBits::determineLiveOperandBits(
     if (OperandNo != 0)
       AB = AOut;
     break;
     if (OperandNo != 0)
       AB = AOut;
     break;

-  case Instruction::ICmp:
-    // Count the number of leading zeroes in each operand.
-    ComputeKnownBits(BitWidth, UserI->getOperand(0), UserI->getOperand(1));
-    auto NumLeadingZeroes = std::min(KnownZero.countLeadingOnes(),
-                                     KnownZero2.countLeadingOnes());
-    AB = ~APInt::getHighBitsSet(BitWidth, NumLeadingZeroes);
-    break;

   }
 }
 
   }
 }
 

diff --git a/test/Analysis/DemandedBits/basic.ll b/test/Analysis/DemandedBits/basic.ll
index 9973edf79c176491d8e72308763c563e280e41b7..3fd1b3212883d27ef2b0d54a314913f0530a4064 100644 (file)
--- a/test/Analysis/DemandedBits/basic.ll
+++ b/test/Analysis/DemandedBits/basic.ll
@@ -10,34 +10,3 @@ define i8 @test_mul(i32 %a, i32 %b) {
   %3 = trunc i32 %2 to i8
   ret i8 %3
 }
   %3 = trunc i32 %2 to i8
   ret i8 %3
 }

-
-; CHECK-LABEL: 'test_icmp1'
-; CHECK-DAG: DemandedBits: 0x1 for   %3 = icmp eq i32 %1, %2
-; CHECK-DAG: DemandedBits: 0xFFF for   %1 = and i32 %a, 255
-; CHECK-DAG: DemandedBits: 0xFFF for   %2 = shl i32 %1, 4
-define i1 @test_icmp1(i32 %a, i32 %b) {
-  %1 = and i32 %a, 255
-  %2 = shl i32 %1, 4
-  %3 = icmp eq i32 %1, %2
-  ret i1 %3
-}
-
-; CHECK-LABEL: 'test_icmp2'
-; CHECK-DAG: DemandedBits: 0x1 for   %3 = icmp eq i32 %1, %2
-; CHECK-DAG: DemandedBits: 0xFFF for   %1 = and i32 %a, 255
-; CHECK-DAG: DemandedBits: 0xFF for   %2 = ashr i32 %1, 4
-define i1 @test_icmp2(i32 %a, i32 %b) {
-  %1 = and i32 %a, 255
-  %2 = ashr i32 %1, 4
-  %3 = icmp eq i32 %1, %2
-  ret i1 %3
-}
-
-; CHECK-LABEL: 'test_icmp3'
-; CHECK-DAG: DemandedBits: 0xFFFFFFFF for   %1 = and i32 %a, 255
-; CHECK-DAG: DemandedBits: 0x1 for   %2 = icmp eq i32 -1, %1
-define i1 @test_icmp3(i32 %a) {
-  %1 = and i32 %a, 255
-  %2 = icmp eq i32 -1, %1
-  ret i1 %2
-}

diff --git a/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll b/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
index eee310491805db4de5cff9d647ef323d838f5129..51f899c2f645a632f85d3671b3ed619956959998 100644 (file)
--- a/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
+++ b/test/Transforms/LoopVectorize/AArch64/loop-vectorization-factors.ll
@@ -205,39 +205,5 @@ for.body:                                         ; preds = %for.body, %for.body
   br i1 %exitcond, label %for.cond.cleanup, label %for.body
 }
 
   br i1 %exitcond, label %for.cond.cleanup, label %for.body
 }
 

-; CHECK-LABEL: @add_g
-; CHECK: load <16 x i8>
-; CHECK: xor <16 x i8>
-; CHECK: icmp ult <16 x i8>
-; CHECK: select <16 x i1> {{.*}}, <16 x i8>
-; CHECK: store <16 x i8>
-define void @add_g(i8* noalias nocapture readonly %p, i8* noalias nocapture readonly %q, i8* noalias nocapture %r, i8 %arg1, i32 %len) #0 {
-  %1 = icmp sgt i32 %len, 0
-  br i1 %1, label %.lr.ph, label %._crit_edge
-
-.lr.ph:                                           ; preds = %0
-  %2 = sext i8 %arg1 to i64
-  br label %3
-
-._crit_edge:                                      ; preds = %3, %0
-  ret void
-
-; <label>:3                                       ; preds = %3, %.lr.ph
-  %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %3 ]
-  %x4 = getelementptr inbounds i8, i8* %p, i64 %indvars.iv
-  %x5 = load i8, i8* %x4
-  %x7 = getelementptr inbounds i8, i8* %q, i64 %indvars.iv
-  %x8 = load i8, i8* %x7
-  %x9 = zext i8 %x5 to i32
-  %x10 = xor i32 %x9, 255
-  %x11 = icmp ult i32 %x10, 24
-  %x12 = select i1 %x11, i32 %x10, i32 24
-  %x13 = trunc i32 %x12 to i8
-  store i8 %x13, i8* %x4
-  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
-  %lftr.wideiv = trunc i64 %indvars.iv.next to i32
-  %exitcond = icmp eq i32 %lftr.wideiv, %len
-  br i1 %exitcond, label %._crit_edge, label %3
-}

 
 attributes #0 = { nounwind }
 
 attributes #0 = { nounwind }