[X86][XOP] Added support for the lowering of 128-bit vector integer comparisons to...

The XOP vector integer comparisons can deal with all signed/unsigned comparison cases directly and can be easily commuted as well (D7646).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249976 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 069cfe49f2e43f69191a4b7a7eaf71c969dc7639..9ffce63501b93c59c04e68e9996379393a627407 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -14179,6 +14179,33 @@ static SDValue LowerVSETCC(SDValue Op, const X86Subtarget *Subtarget,
                          DAG.getNode(ISD::SETCC, dl, OpVT, Op0, Op1, CC));
   }
 
                          DAG.getNode(ISD::SETCC, dl, OpVT, Op0, Op1, CC));
   }
 

+  // Lower using XOP integer comparisons.
+  if ((VT == MVT::v16i8 || VT == MVT::v8i16 ||
+       VT == MVT::v4i32 || VT == MVT::v2i64) && Subtarget->hasXOP()) {
+    // Translate compare code to XOP PCOM compare mode.
+    unsigned CmpMode = 0;
+    switch (SetCCOpcode) {
+    default: llvm_unreachable("Unexpected SETCC condition");
+    case ISD::SETULT:
+    case ISD::SETLT: CmpMode = 0x00; break;
+    case ISD::SETULE:
+    case ISD::SETLE: CmpMode = 0x01; break;
+    case ISD::SETUGT:
+    case ISD::SETGT: CmpMode = 0x02; break;
+    case ISD::SETUGE:
+    case ISD::SETGE: CmpMode = 0x03; break;
+    case ISD::SETEQ: CmpMode = 0x04; break;
+    case ISD::SETNE: CmpMode = 0x05; break;
+    }
+
+    // Are we comparing unsigned or signed integers?
+    unsigned Opc = ISD::isUnsignedIntSetCC(SetCCOpcode)
+      ? X86ISD::VPCOMU : X86ISD::VPCOM;
+
+    return DAG.getNode(Opc, dl, VT, Op0, Op1,
+                       DAG.getConstant(CmpMode, dl, MVT::i8));
+  }
+

   // We are handling one of the integer comparisons here.  Since SSE only has
   // GT and EQ comparisons for integer, swapping operands and multiple
   // operations may be required for some comparisons.
   // We are handling one of the integer comparisons here.  Since SSE only has
   // GT and EQ comparisons for integer, swapping operands and multiple
   // operations may be required for some comparisons.


@@ -19851,6 +19878,8 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
   case X86ISD::VPMADDWD:           return "X86ISD::VPMADDWD";
   case X86ISD::VPSHA:              return "X86ISD::VPSHA";
   case X86ISD::VPSHL:              return "X86ISD::VPSHL";
   case X86ISD::VPMADDWD:           return "X86ISD::VPMADDWD";
   case X86ISD::VPSHA:              return "X86ISD::VPSHA";
   case X86ISD::VPSHL:              return "X86ISD::VPSHL";

+  case X86ISD::VPCOM:              return "X86ISD::VPCOM";
+  case X86ISD::VPCOMU:             return "X86ISD::VPCOMU";

   case X86ISD::FMADD:              return "X86ISD::FMADD";
   case X86ISD::FMSUB:              return "X86ISD::FMSUB";
   case X86ISD::FNMADD:             return "X86ISD::FNMADD";
   case X86ISD::FMADD:              return "X86ISD::FMADD";
   case X86ISD::FMSUB:              return "X86ISD::FMSUB";
   case X86ISD::FNMADD:             return "X86ISD::FNMADD";

diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h
index f2a64c9e9393d3e61d157b6b15be1d5e4190357e..6e4f5907ea3e8e9cc900e26c5c992bd97369f3f5 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.h
+++ b/lib/Target/X86/X86ISelLowering.h
@@ -412,6 +412,8 @@ namespace llvm {
 
       // XOP arithmetic/logical shifts
       VPSHA, VPSHL,
 
       // XOP arithmetic/logical shifts
       VPSHA, VPSHL,

+      // XOP signed/unsigned integer comparisons
+      VPCOM, VPCOMU,

 
       // Vector multiply packed unsigned doubleword integers
       PMULUDQ,
 
       // Vector multiply packed unsigned doubleword integers
       PMULUDQ,

diff --git a/lib/Target/X86/X86InstrFragmentsSIMD.td b/lib/Target/X86/X86InstrFragmentsSIMD.td
index f0af8898d734e58c183d5f4b45276b17fffecc60..160875813659e8bd936a9fb49ea523a482313575 100644 (file)
--- a/lib/Target/X86/X86InstrFragmentsSIMD.td
+++ b/lib/Target/X86/X86InstrFragmentsSIMD.td
@@ -222,6 +222,13 @@ def X86vpsha   : SDNode<"X86ISD::VPSHA",
                         SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
                                       SDTCisVec<2>]>>;
 
                         SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>,
                                       SDTCisVec<2>]>>;
 

+def X86vpcom   : SDNode<"X86ISD::VPCOM",
+                        SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
+                                      SDTCisVec<2>, SDTCisVT<3, i8>]>>;
+def X86vpcomu  : SDNode<"X86ISD::VPCOMU",
+                        SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>,
+                                      SDTCisVec<2>, SDTCisVT<3, i8>]>>;
+

 def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
                                           SDTCisVec<1>,
                                           SDTCisSameAs<2, 1>]>;
 def SDTX86CmpPTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
                                           SDTCisVec<1>,
                                           SDTCisSameAs<2, 1>]>;

diff --git a/lib/Target/X86/X86InstrXOP.td b/lib/Target/X86/X86InstrXOP.td
index 878da169852fa66cf7b4e689a27c730007c1d8d0..3b2309baa3aa7224d364afd0fd1576260724b275 100644 (file)
--- a/lib/Target/X86/X86InstrXOP.td
+++ b/lib/Target/X86/X86InstrXOP.td
@@ -197,21 +197,25 @@ let ExeDomain = SSEPackedInt in {
 }
 
 // Instruction where second source can be memory, third must be imm8
 }
 
 // Instruction where second source can be memory, third must be imm8

-multiclass xopvpcom<bits<8> opc, string Suffix, Intrinsic Int> {
+multiclass xopvpcom<bits<8> opc, string Suffix, SDNode OpNode, ValueType vt128> {

   let isCommutable = 1 in
   def ri : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
            (ins VR128:$src1, VR128:$src2, XOPCC:$cc),
            !strconcat("vpcom${cc}", Suffix,
            "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
   let isCommutable = 1 in
   def ri : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
            (ins VR128:$src1, VR128:$src2, XOPCC:$cc),
            !strconcat("vpcom${cc}", Suffix,
            "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),

-           [(set VR128:$dst, (Int VR128:$src1, VR128:$src2, i8immZExt3:$cc))]>,
+           [(set VR128:$dst,
+              (vt128 (OpNode (vt128 VR128:$src1), (vt128 VR128:$src2),
+                             i8immZExt3:$cc)))]>,

            XOP_4V;
   def mi : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
            (ins VR128:$src1, i128mem:$src2, XOPCC:$cc),
            !strconcat("vpcom${cc}", Suffix,
            "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
            [(set VR128:$dst,
            XOP_4V;
   def mi : IXOPi8<opc, MRMSrcMem, (outs VR128:$dst),
            (ins VR128:$src1, i128mem:$src2, XOPCC:$cc),
            !strconcat("vpcom${cc}", Suffix,
            "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
            [(set VR128:$dst,

-             (Int VR128:$src1, (bitconvert (loadv2i64 addr:$src2)),
-              i8immZExt3:$cc))]>, XOP_4V;
+              (vt128 (OpNode (vt128 VR128:$src1),
+                             (vt128 (bitconvert (loadv2i64 addr:$src2))),
+                              i8immZExt3:$cc)))]>,
+           XOP_4V;

   let isAsmParserOnly = 1, hasSideEffects = 0 in {
     def ri_alt : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
                  (ins VR128:$src1, VR128:$src2, i8imm:$src3),
   let isAsmParserOnly = 1, hasSideEffects = 0 in {
     def ri_alt : IXOPi8<opc, MRMSrcReg, (outs VR128:$dst),
                  (ins VR128:$src1, VR128:$src2, i8imm:$src3),


@@ -228,14 +232,14 @@ multiclass xopvpcom<bits<8> opc, string Suffix, Intrinsic Int> {
 }
 
 let ExeDomain = SSEPackedInt in { // SSE integer instructions
 }
 
 let ExeDomain = SSEPackedInt in { // SSE integer instructions

-  defm VPCOMB  : xopvpcom<0xCC, "b", int_x86_xop_vpcomb>;
-  defm VPCOMW  : xopvpcom<0xCD, "w", int_x86_xop_vpcomw>;
-  defm VPCOMD  : xopvpcom<0xCE, "d", int_x86_xop_vpcomd>;
-  defm VPCOMQ  : xopvpcom<0xCF, "q", int_x86_xop_vpcomq>;
-  defm VPCOMUB : xopvpcom<0xEC, "ub", int_x86_xop_vpcomub>;
-  defm VPCOMUW : xopvpcom<0xED, "uw", int_x86_xop_vpcomuw>;
-  defm VPCOMUD : xopvpcom<0xEE, "ud", int_x86_xop_vpcomud>;
-  defm VPCOMUQ : xopvpcom<0xEF, "uq", int_x86_xop_vpcomuq>;
+  defm VPCOMB  : xopvpcom<0xCC, "b", X86vpcom, v16i8>;
+  defm VPCOMW  : xopvpcom<0xCD, "w", X86vpcom, v8i16>;
+  defm VPCOMD  : xopvpcom<0xCE, "d", X86vpcom, v4i32>;
+  defm VPCOMQ  : xopvpcom<0xCF, "q", X86vpcom, v2i64>;
+  defm VPCOMUB : xopvpcom<0xEC, "ub", X86vpcomu, v16i8>;
+  defm VPCOMUW : xopvpcom<0xED, "uw", X86vpcomu, v8i16>;
+  defm VPCOMUD : xopvpcom<0xEE, "ud", X86vpcomu, v4i32>;
+  defm VPCOMUQ : xopvpcom<0xEF, "uq", X86vpcomu, v2i64>;

 }
 
 // Instruction where either second or third source can be memory
 }
 
 // Instruction where either second or third source can be memory

diff --git a/lib/Target/X86/X86IntrinsicsInfo.h b/lib/Target/X86/X86IntrinsicsInfo.h
index e9970d1db75c5c934a3a93620e7366e9a40af0ce..d8f3d865335a7adde9abfc7cd39dcd55508c1bef 100644 (file)
--- a/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/lib/Target/X86/X86IntrinsicsInfo.h
@@ -1686,6 +1686,14 @@ static const IntrinsicData  IntrinsicsWithoutChain[] = {
   X86_INTRINSIC_DATA(ssse3_psign_b_128, INTR_TYPE_2OP, X86ISD::PSIGN, 0),
   X86_INTRINSIC_DATA(ssse3_psign_d_128, INTR_TYPE_2OP, X86ISD::PSIGN, 0),
   X86_INTRINSIC_DATA(ssse3_psign_w_128, INTR_TYPE_2OP, X86ISD::PSIGN, 0),
   X86_INTRINSIC_DATA(ssse3_psign_b_128, INTR_TYPE_2OP, X86ISD::PSIGN, 0),
   X86_INTRINSIC_DATA(ssse3_psign_d_128, INTR_TYPE_2OP, X86ISD::PSIGN, 0),
   X86_INTRINSIC_DATA(ssse3_psign_w_128, INTR_TYPE_2OP, X86ISD::PSIGN, 0),

+  X86_INTRINSIC_DATA(xop_vpcomb,        INTR_TYPE_3OP, X86ISD::VPCOM, 0),
+  X86_INTRINSIC_DATA(xop_vpcomd,        INTR_TYPE_3OP, X86ISD::VPCOM, 0),
+  X86_INTRINSIC_DATA(xop_vpcomq,        INTR_TYPE_3OP, X86ISD::VPCOM, 0),
+  X86_INTRINSIC_DATA(xop_vpcomub,       INTR_TYPE_3OP, X86ISD::VPCOMU, 0),
+  X86_INTRINSIC_DATA(xop_vpcomud,       INTR_TYPE_3OP, X86ISD::VPCOMU, 0),
+  X86_INTRINSIC_DATA(xop_vpcomuq,       INTR_TYPE_3OP, X86ISD::VPCOMU, 0),
+  X86_INTRINSIC_DATA(xop_vpcomuw,       INTR_TYPE_3OP, X86ISD::VPCOMU, 0),
+  X86_INTRINSIC_DATA(xop_vpcomw,        INTR_TYPE_3OP, X86ISD::VPCOM, 0),

   X86_INTRINSIC_DATA(xop_vpshab,        INTR_TYPE_2OP, X86ISD::VPSHA, 0),
   X86_INTRINSIC_DATA(xop_vpshad,        INTR_TYPE_2OP, X86ISD::VPSHA, 0),
   X86_INTRINSIC_DATA(xop_vpshaq,        INTR_TYPE_2OP, X86ISD::VPSHA, 0),
   X86_INTRINSIC_DATA(xop_vpshab,        INTR_TYPE_2OP, X86ISD::VPSHA, 0),
   X86_INTRINSIC_DATA(xop_vpshad,        INTR_TYPE_2OP, X86ISD::VPSHA, 0),
   X86_INTRINSIC_DATA(xop_vpshaq,        INTR_TYPE_2OP, X86ISD::VPSHA, 0),

diff --git a/test/CodeGen/X86/vec_cmp_sint-128.ll b/test/CodeGen/X86/vec_cmp_sint-128.ll
index 26fff4a459340cb461e19c1b845a829e563ee2d8..ee2578722901d5219300469023a3b887ab4d2ebb 100644 (file)
--- a/test/CodeGen/X86/vec_cmp_sint-128.ll
+++ b/test/CodeGen/X86/vec_cmp_sint-128.ll
@@ -37,7 +37,7 @@ define <2 x i64> @eq_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: eq_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: eq_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqq %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomeqq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp eq <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp eq <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -57,7 +57,7 @@ define <4 x i32> @eq_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ;
 ; XOP-LABEL: eq_v4i32:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: eq_v4i32:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomeqd %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp eq <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>
 ; XOP-NEXT:    retq
   %1 = icmp eq <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>


@@ -77,7 +77,7 @@ define <8 x i16> @eq_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: eq_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: eq_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomeqw %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp eq <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp eq <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -97,7 +97,7 @@ define <16 x i8> @eq_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: eq_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: eq_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqb %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomeqb %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp eq <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp eq <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>


@@ -141,9 +141,7 @@ define <2 x i64> @ne_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: ne_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ne_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqq %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomneqq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ne <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp ne <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -167,9 +165,7 @@ define <4 x i32> @ne_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ;
 ; XOP-LABEL: ne_v4i32:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ne_v4i32:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomneqd %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ne <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>
 ; XOP-NEXT:    retq
   %1 = icmp ne <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>


@@ -193,9 +189,7 @@ define <8 x i16> @ne_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: ne_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ne_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomneqw %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ne <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp ne <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -219,9 +213,7 @@ define <16 x i8> @ne_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: ne_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ne_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqb %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomneqb %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ne <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp ne <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>


@@ -283,9 +275,7 @@ define <2 x i64> @ge_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: ge_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ge_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtq %xmm0, %xmm1, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgeq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sge <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp sge <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -309,9 +299,7 @@ define <4 x i32> @ge_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ;
 ; XOP-LABEL: ge_v4i32:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ge_v4i32:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomged %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sge <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>
 ; XOP-NEXT:    retq
   %1 = icmp sge <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>


@@ -335,9 +323,7 @@ define <8 x i16> @ge_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: ge_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ge_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtw %xmm0, %xmm1, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgew %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sge <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp sge <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -361,9 +347,7 @@ define <16 x i8> @ge_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: ge_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ge_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtb %xmm0, %xmm1, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgeb %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sge <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp sge <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>


@@ -417,7 +401,7 @@ define <2 x i64> @gt_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: gt_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: gt_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtq %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgtq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sgt <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp sgt <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -437,7 +421,7 @@ define <4 x i32> @gt_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ;
 ; XOP-LABEL: gt_v4i32:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: gt_v4i32:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgtd %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sgt <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>
 ; XOP-NEXT:    retq
   %1 = icmp sgt <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>


@@ -457,7 +441,7 @@ define <8 x i16> @gt_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: gt_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: gt_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtw %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgtw %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sgt <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp sgt <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -477,7 +461,7 @@ define <16 x i8> @gt_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: gt_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: gt_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtb %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgtb %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sgt <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp sgt <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>


@@ -539,9 +523,7 @@ define <2 x i64> @le_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: le_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: le_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtq %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomleq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sle <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp sle <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -565,9 +547,7 @@ define <4 x i32> @le_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ;
 ; XOP-LABEL: le_v4i32:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: le_v4i32:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomled %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sle <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>
 ; XOP-NEXT:    retq
   %1 = icmp sle <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>


@@ -591,9 +571,7 @@ define <8 x i16> @le_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: le_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: le_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtw %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomlew %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sle <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp sle <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -617,9 +595,7 @@ define <16 x i8> @le_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: le_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: le_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtb %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomleb %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp sle <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp sle <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>


@@ -674,7 +650,7 @@ define <2 x i64> @lt_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: lt_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: lt_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtq %xmm0, %xmm1, %xmm0
+; XOP-NEXT:    vpcomltq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp slt <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp slt <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -695,7 +671,7 @@ define <4 x i32> @lt_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ;
 ; XOP-LABEL: lt_v4i32:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: lt_v4i32:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0
+; XOP-NEXT:    vpcomltd %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp slt <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>
 ; XOP-NEXT:    retq
   %1 = icmp slt <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>


@@ -716,7 +692,7 @@ define <8 x i16> @lt_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: lt_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: lt_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtw %xmm0, %xmm1, %xmm0
+; XOP-NEXT:    vpcomltw %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp slt <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp slt <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -737,7 +713,7 @@ define <16 x i8> @lt_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: lt_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: lt_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpgtb %xmm0, %xmm1, %xmm0
+; XOP-NEXT:    vpcomltb %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp slt <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp slt <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>

diff --git a/test/CodeGen/X86/vec_cmp_uint-128.ll b/test/CodeGen/X86/vec_cmp_uint-128.ll
index 305fd80b7c40ff14d715d2c804df97525dfb0039..9ffdc1c5f4f5b6fe44a2ea85359bb583d5cb7490 100644 (file)
--- a/test/CodeGen/X86/vec_cmp_uint-128.ll
+++ b/test/CodeGen/X86/vec_cmp_uint-128.ll
@@ -37,7 +37,7 @@ define <2 x i64> @eq_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: eq_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: eq_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqq %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomeqq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp eq <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp eq <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -57,7 +57,7 @@ define <4 x i32> @eq_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ;
 ; XOP-LABEL: eq_v4i32:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: eq_v4i32:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomeqd %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp eq <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>
 ; XOP-NEXT:    retq
   %1 = icmp eq <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>


@@ -77,7 +77,7 @@ define <8 x i16> @eq_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: eq_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: eq_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomeqw %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp eq <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp eq <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -97,7 +97,7 @@ define <16 x i8> @eq_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: eq_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: eq_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqb %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomeqb %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp eq <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp eq <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>


@@ -141,9 +141,7 @@ define <2 x i64> @ne_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: ne_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ne_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqq %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomneqq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ne <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp ne <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -167,9 +165,7 @@ define <4 x i32> @ne_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ;
 ; XOP-LABEL: ne_v4i32:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ne_v4i32:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomneqd %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ne <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>
 ; XOP-NEXT:    retq
   %1 = icmp ne <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>


@@ -193,9 +189,7 @@ define <8 x i16> @ne_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: ne_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ne_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomneqw %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ne <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp ne <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -219,9 +213,7 @@ define <16 x i8> @ne_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: ne_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ne_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpcmpeqb %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomneqb %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ne <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp ne <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>


@@ -289,12 +281,7 @@ define <2 x i64> @ge_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: ge_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ge_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
-; XOP-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOP-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOP-NEXT:    vpcmpgtq %xmm0, %xmm1, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgeuq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp uge <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp uge <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -332,8 +319,7 @@ define <4 x i32> @ge_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ;
 ; XOP-LABEL: ge_v4i32:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ge_v4i32:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpmaxud %xmm1, %xmm0, %xmm1
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgeud %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp uge <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>
 ; XOP-NEXT:    retq
   %1 = icmp uge <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>


@@ -368,8 +354,7 @@ define <8 x i16> @ge_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: ge_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ge_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpmaxuw %xmm1, %xmm0, %xmm1
-; XOP-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgeuw %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp uge <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp uge <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -391,8 +376,7 @@ define <16 x i8> @ge_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: ge_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: ge_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpmaxub %xmm1, %xmm0, %xmm1
-; XOP-NEXT:    vpcmpeqb %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgeub %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp uge <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp uge <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>


@@ -452,10 +436,7 @@ define <2 x i64> @gt_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: gt_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: gt_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
-; XOP-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpgtq %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgtuq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ugt <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp ugt <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -487,21 +468,10 @@ define <4 x i32> @gt_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ; AVX2-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX2-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
 ; AVX2-NEXT:    retq
 ;

-; XOPAVX1-LABEL: gt_v4i32:
-; XOPAVX1:       # BB#0:
-; XOPAVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
-; XOPAVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOPAVX1-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOPAVX1-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
-; XOPAVX1-NEXT:    retq
-;
-; XOPAVX2-LABEL: gt_v4i32:
-; XOPAVX2:       # BB#0:
-; XOPAVX2-NEXT:    vpbroadcastd {{.*}}(%rip), %xmm2
-; XOPAVX2-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOPAVX2-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOPAVX2-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
-; XOPAVX2-NEXT:    retq
+; XOP-LABEL: gt_v4i32:
+; XOP:       # BB#0:
+; XOP-NEXT:    vpcomgtud %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    retq

 ;
 ; AVX512-LABEL: gt_v4i32:
 ; AVX512:       # BB#0:
 ;
 ; AVX512-LABEL: gt_v4i32:
 ; AVX512:       # BB#0:


@@ -534,10 +504,7 @@ define <8 x i16> @gt_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: gt_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: gt_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vmovdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
-; XOP-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpgtw %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgtuw %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ugt <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp ugt <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -563,10 +530,7 @@ define <16 x i8> @gt_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: gt_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: gt_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vmovdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
-; XOP-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpgtb %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomgtub %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ugt <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp ugt <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>


@@ -634,12 +598,7 @@ define <2 x i64> @le_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: le_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: le_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
-; XOP-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpgtq %xmm1, %xmm0, %xmm0
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
-; XOP-NEXT:    vpxor %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomleuq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ule <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp ule <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -677,8 +636,7 @@ define <4 x i32> @le_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ;
 ; XOP-LABEL: le_v4i32:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: le_v4i32:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpminud %xmm1, %xmm0, %xmm1
-; XOP-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomleud %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ule <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>
 ; XOP-NEXT:    retq
   %1 = icmp ule <4 x i32> %a, %b
   %2 = sext <4 x i1> %1 to <4 x i32>


@@ -713,8 +671,7 @@ define <8 x i16> @le_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: le_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: le_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpminuw %xmm1, %xmm0, %xmm1
-; XOP-NEXT:    vpcmpeqw %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomleuw %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ule <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp ule <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -736,8 +693,7 @@ define <16 x i8> @le_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: le_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: le_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vpminub %xmm1, %xmm0, %xmm1
-; XOP-NEXT:    vpcmpeqb %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    vpcomleub %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ule <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp ule <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>


@@ -798,10 +754,7 @@ define <2 x i64> @lt_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
 ;
 ; XOP-LABEL: lt_v2i64:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: lt_v2i64:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
-; XOP-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOP-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOP-NEXT:    vpcmpgtq %xmm0, %xmm1, %xmm0
+; XOP-NEXT:    vpcomltuq %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ult <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>
 ; XOP-NEXT:    retq
   %1 = icmp ult <2 x i64> %a, %b
   %2 = sext <2 x i1> %1 to <2 x i64>


@@ -834,21 +787,10 @@ define <4 x i32> @lt_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
 ; AVX2-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0
 ; AVX2-NEXT:    retq
 ;
 ; AVX2-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0
 ; AVX2-NEXT:    retq
 ;

-; XOPAVX1-LABEL: lt_v4i32:
-; XOPAVX1:       # BB#0:
-; XOPAVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
-; XOPAVX1-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOPAVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOPAVX1-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0
-; XOPAVX1-NEXT:    retq
-;
-; XOPAVX2-LABEL: lt_v4i32:
-; XOPAVX2:       # BB#0:
-; XOPAVX2-NEXT:    vpbroadcastd {{.*}}(%rip), %xmm2
-; XOPAVX2-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOPAVX2-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOPAVX2-NEXT:    vpcmpgtd %xmm0, %xmm1, %xmm0
-; XOPAVX2-NEXT:    retq
+; XOP-LABEL: lt_v4i32:
+; XOP:       # BB#0:
+; XOP-NEXT:    vpcomltud %xmm1, %xmm0, %xmm0
+; XOP-NEXT:    retq

 ;
 ; AVX512-LABEL: lt_v4i32:
 ; AVX512:       # BB#0:
 ;
 ; AVX512-LABEL: lt_v4i32:
 ; AVX512:       # BB#0:


@@ -882,10 +824,7 @@ define <8 x i16> @lt_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
 ;
 ; XOP-LABEL: lt_v8i16:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: lt_v8i16:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vmovdqa {{.*#+}} xmm2 = [32768,32768,32768,32768,32768,32768,32768,32768]
-; XOP-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOP-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOP-NEXT:    vpcmpgtw %xmm0, %xmm1, %xmm0
+; XOP-NEXT:    vpcomltuw %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ult <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>
 ; XOP-NEXT:    retq
   %1 = icmp ult <8 x i16> %a, %b
   %2 = sext <8 x i1> %1 to <8 x i16>


@@ -912,10 +851,7 @@ define <16 x i8> @lt_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
 ;
 ; XOP-LABEL: lt_v16i8:
 ; XOP:       # BB#0:
 ;
 ; XOP-LABEL: lt_v16i8:
 ; XOP:       # BB#0:

-; XOP-NEXT:    vmovdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128,128,128,128,128,128,128,128,128]
-; XOP-NEXT:    vpxor %xmm2, %xmm0, %xmm0
-; XOP-NEXT:    vpxor %xmm2, %xmm1, %xmm1
-; XOP-NEXT:    vpcmpgtb %xmm0, %xmm1, %xmm0
+; XOP-NEXT:    vpcomltub %xmm1, %xmm0, %xmm0

 ; XOP-NEXT:    retq
   %1 = icmp ult <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>
 ; XOP-NEXT:    retq
   %1 = icmp ult <16 x i8> %a, %b
   %2 = sext <16 x i1> %1 to <16 x i8>