Fix incorrect intrinsic declarations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78329 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/ARM/vld1.ll b/test/CodeGen/ARM/vld1.ll
index 2a5ee04ebaf60cb02378c39b8b5ed3970717603e..d5191338c9a0e79d2b1e06f88e36fd8344d05931 100644 (file)
--- a/test/CodeGen/ARM/vld1.ll
+++ b/test/CodeGen/ARM/vld1.ll
@@ -70,14 +70,14 @@ define <2 x i64> @vld1Qi64(i64* %A) nounwind {
        ret <2 x i64> %tmp1
 }
 
-declare <8 x i8>  @llvm.arm.neon.vld1i.v8i8(i8*) nounwind readnone
-declare <4 x i16> @llvm.arm.neon.vld1i.v4i16(i16*) nounwind readnone
-declare <2 x i32> @llvm.arm.neon.vld1i.v2i32(i32*) nounwind readnone
-declare <2 x float> @llvm.arm.neon.vld1f.v2f32(float*) nounwind readnone
-declare <1 x i64> @llvm.arm.neon.vld1i.v1i64(i64*) nounwind readnone
+declare <8 x i8>  @llvm.arm.neon.vld1i.v8i8(i8*) nounwind readonly
+declare <4 x i16> @llvm.arm.neon.vld1i.v4i16(i8*) nounwind readonly
+declare <2 x i32> @llvm.arm.neon.vld1i.v2i32(i8*) nounwind readonly
+declare <2 x float> @llvm.arm.neon.vld1f.v2f32(i8*) nounwind readonly
+declare <1 x i64> @llvm.arm.neon.vld1i.v1i64(i8*) nounwind readonly
 
-declare <16 x i8> @llvm.arm.neon.vld1i.v16i8(i8*) nounwind readnone
-declare <8 x i16> @llvm.arm.neon.vld1i.v8i16(i16*) nounwind readnone
-declare <4 x i32> @llvm.arm.neon.vld1i.v4i32(i32*) nounwind readnone
-declare <4 x float> @llvm.arm.neon.vld1f.v4f32(float*) nounwind readnone
-declare <2 x i64> @llvm.arm.neon.vld1i.v2i64(i64*) nounwind readnone
+declare <16 x i8> @llvm.arm.neon.vld1i.v16i8(i8*) nounwind readonly
+declare <8 x i16> @llvm.arm.neon.vld1i.v8i16(i8*) nounwind readonly
+declare <4 x i32> @llvm.arm.neon.vld1i.v4i32(i8*) nounwind readonly
+declare <4 x float> @llvm.arm.neon.vld1f.v4f32(i8*) nounwind readonly
+declare <2 x i64> @llvm.arm.neon.vld1i.v2i64(i8*) nounwind readonly

diff --git a/test/CodeGen/ARM/vst1.ll b/test/CodeGen/ARM/vst1.ll
index 6a82b444153a79013704baa6f0de686ccfea7419..d84f75882f3ecf962f4fd799296832fb2189af98 100644 (file)
--- a/test/CodeGen/ARM/vst1.ll
+++ b/test/CodeGen/ARM/vst1.ll
@@ -80,14 +80,14 @@ define void @vst1Qi64(i64* %A, <2 x i64>* %B) nounwind {
        ret void
 }
 
-declare void @llvm.arm.neon.vst1i.v8i8(i8*, <8 x i8>) nounwind readnone
-declare void @llvm.arm.neon.vst1i.v4i16(i16*, <4 x i16>) nounwind readnone
-declare void @llvm.arm.neon.vst1i.v2i32(i32*, <2 x i32>) nounwind readnone
-declare void @llvm.arm.neon.vst1f.v2f32(float*, <2 x float>) nounwind readnone
-declare void @llvm.arm.neon.vst1i.v1i64(i64*, <1 x i64>) nounwind readnone
+declare void @llvm.arm.neon.vst1i.v8i8(i8*, <8 x i8>) nounwind
+declare void @llvm.arm.neon.vst1i.v4i16(i8*, <4 x i16>) nounwind
+declare void @llvm.arm.neon.vst1i.v2i32(i8*, <2 x i32>) nounwind
+declare void @llvm.arm.neon.vst1f.v2f32(i8*, <2 x float>) nounwind
+declare void @llvm.arm.neon.vst1i.v1i64(i8*, <1 x i64>) nounwind
 
-declare void @llvm.arm.neon.vst1i.v16i8(i8*, <16 x i8>) nounwind readnone
-declare void @llvm.arm.neon.vst1i.v8i16(i16*, <8 x i16>) nounwind readnone
-declare void @llvm.arm.neon.vst1i.v4i32(i32*, <4 x i32>) nounwind readnone
-declare void @llvm.arm.neon.vst1f.v4f32(float*, <4 x float>) nounwind readnone
-declare void @llvm.arm.neon.vst1i.v2i64(i64*, <2 x i64>) nounwind readnone
+declare void @llvm.arm.neon.vst1i.v16i8(i8*, <16 x i8>) nounwind
+declare void @llvm.arm.neon.vst1i.v8i16(i8*, <8 x i16>) nounwind
+declare void @llvm.arm.neon.vst1i.v4i32(i8*, <4 x i32>) nounwind
+declare void @llvm.arm.neon.vst1f.v4f32(i8*, <4 x float>) nounwind
+declare void @llvm.arm.neon.vst1i.v2i64(i8*, <2 x i64>) nounwind