//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
//
// This register allocator allocates registers to a basic block at a time,
// attempting to keep values in registers and reusing registers as appropriate.
//
//===----------------------------------------------------------------------===//
-#include "llvm/CodeGen/MachineFunction.h"
+#define DEBUG_TYPE "regalloc"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Target/MachineInstrInfo.h"
+#include "llvm/CodeGen/SSARegMap.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
-#include "Support/Statistic.h"
#include "Support/CommandLine.h"
+#include "Support/Debug.h"
+#include "Support/Statistic.h"
#include <iostream>
+using namespace llvm;
namespace {
Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
- cl::opt<bool> DisableKill("no-kill", cl::Hidden,
+ cl::opt<bool> DisableKill("disable-kill", cl::Hidden,
cl::desc("Disable register kill in local-ra"));
- class RA : public FunctionPass {
- TargetMachine &TM;
+ class RA : public MachineFunctionPass {
+ const TargetMachine *TM;
MachineFunction *MF;
- const MRegisterInfo &RegInfo;
- const MachineInstrInfo &MIInfo;
- unsigned NumBytesAllocated;
-
- // Maps SSA Regs => offsets on the stack where these values are stored
- std::map<unsigned, unsigned> VirtReg2OffsetMap;
+ const MRegisterInfo *RegInfo;
+ LiveVariables *LV;
+
+ // StackSlotForVirtReg - Maps virtual regs to the frame index where these
+ // values are spilled.
+ std::map<unsigned, int> StackSlotForVirtReg;
// Virt2PhysRegMap - This map contains entries for each virtual register
- // that is currently available in a physical register.
+ // that is currently available in a physical register. This is "logically"
+ // a map from virtual register numbers to physical register numbers.
+ // Instead of using a map, however, which is slow, we use a vector. The
+ // index is the VREG number - FirstVirtualRegister. If the entry is zero,
+ // then it is logically "not in the map".
//
- std::map<unsigned, unsigned> Virt2PhysRegMap;
+ std::vector<unsigned> Virt2PhysRegMap;
+
+ unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
+ assert(VirtReg >= MRegisterInfo::FirstVirtualRegister &&"Illegal VREG #");
+ assert(VirtReg-MRegisterInfo::FirstVirtualRegister <Virt2PhysRegMap.size()
+ && "VirtReg not in map!");
+ return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
+ }
+ unsigned &getOrInsertVirt2PhysRegMapSlot(unsigned VirtReg) {
+ assert(VirtReg >= MRegisterInfo::FirstVirtualRegister &&"Illegal VREG #");
+ if (VirtReg-MRegisterInfo::FirstVirtualRegister >= Virt2PhysRegMap.size())
+ Virt2PhysRegMap.resize(VirtReg-MRegisterInfo::FirstVirtualRegister+1);
+ return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
+ }
- // PhysRegsUsed - This map contains entries for each physical register that
- // currently has a value (ie, it is in Virt2PhysRegMap). The value mapped
- // to is the virtual register corresponding to the physical register (the
- // inverse of the Virt2PhysRegMap), or 0. The value is set to 0 if this
- // register is pinned because it is used by a future instruction.
+ // PhysRegsUsed - This array is effectively a map, containing entries for
+ // each physical register that currently has a value (ie, it is in
+ // Virt2PhysRegMap). The value mapped to is the virtual register
+ // corresponding to the physical register (the inverse of the
+ // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
+ // because it is used by a future instruction. If the entry for a physical
+ // register is -1, then the physical register is "not in the map".
//
- std::map<unsigned, unsigned> PhysRegsUsed;
+ int PhysRegsUsed[MRegisterInfo::FirstVirtualRegister];
// PhysRegsUseOrder - This contains a list of the physical registers that
// currently have a virtual register value in them. This list provides an
//
std::vector<unsigned> PhysRegsUseOrder;
- // LastUserOf map - This multimap contains the set of registers that each
- // key instruction is the last user of. If an instruction has an entry in
- // this map, that means that the specified operands are killed after the
- // instruction is executed, thus they don't need to be spilled into memory
+ // VirtRegModified - This bitset contains information about which virtual
+ // registers need to be spilled back to memory when their registers are
+ // scavenged. If a virtual register has simply been rematerialized, there
+ // is no reason to spill it to memory when we need the register back.
//
- std::multimap<MachineInstr*, unsigned> LastUserOf;
+ std::vector<bool> VirtRegModified;
- void MarkPhysRegRecentlyUsed(unsigned Reg) {
- assert(!PhysRegsUseOrder.empty() && "No registers used!");
- if (PhysRegsUseOrder.back() != Reg) {
- for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
- if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) { // remove from middle
- unsigned RegMatch = PhysRegsUseOrder[i-1];
- PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
- PhysRegsUseOrder.push_back(RegMatch); // Add it to the end of the list
- if (RegMatch == Reg)
- return; // Found an exact match, exit early
- }
- }
+ void markVirtRegModified(unsigned Reg, bool Val = true) {
+ assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
+ Reg -= MRegisterInfo::FirstVirtualRegister;
+ if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
+ VirtRegModified[Reg] = Val;
}
- public:
-
- RA(TargetMachine &tm)
- : TM(tm), RegInfo(*tm.getRegisterInfo()), MIInfo(tm.getInstrInfo()) {
- cleanupAfterFunction();
+ bool isVirtRegModified(unsigned Reg) const {
+ assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
+ assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
+ && "Illegal virtual register!");
+ return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
}
- bool runOnFunction(Function &Fn) {
- return runOnMachineFunction(MachineFunction::get(&Fn));
+ void MarkPhysRegRecentlyUsed(unsigned Reg) {
+ assert(!PhysRegsUseOrder.empty() && "No registers used!");
+ if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
+
+ for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
+ if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
+ unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
+ PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
+ // Add it to the end of the list
+ PhysRegsUseOrder.push_back(RegMatch);
+ if (RegMatch == Reg)
+ return; // Found an exact match, exit early
+ }
}
+ public:
virtual const char *getPassName() const {
return "Local Register Allocator";
}
+ virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ if (!DisableKill)
+ AU.addRequired<LiveVariables>();
+ AU.addRequiredID(PHIEliminationID);
+ AU.addRequiredID(TwoAddressInstructionPassID);
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
+
private:
/// runOnMachineFunction - Register allocate the whole function
bool runOnMachineFunction(MachineFunction &Fn);
/// AllocateBasicBlock - Register allocate the specified basic block.
void AllocateBasicBlock(MachineBasicBlock &MBB);
- /// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions
- /// in predecessor basic blocks.
- void EliminatePHINodes(MachineBasicBlock &MBB);
-
- /// CalculateLastUseOfVReg - Calculate an approximation of the killing
- /// uses for the virtual registers in the function. Here we try to capture
- /// registers that are defined and only used within the same basic block.
- /// Because we don't have use-def chains yet, we have to do this the hard
- /// way.
- ///
- void CalculateLastUseOfVReg(MachineBasicBlock &MBB,
- std::map<unsigned, MachineInstr*> &LastUseOfVReg) const;
-
-
- /// EmitPrologue/EmitEpilogue - Use the register info object to add a
- /// prologue/epilogue to the function and save/restore any callee saved
- /// registers we are responsible for.
- ///
- void EmitPrologue();
- void EmitEpilogue(MachineBasicBlock &MBB);
/// areRegsEqual - This method returns true if the specified registers are
/// related to each other. To do this, it checks to see if they are equal
///
bool areRegsEqual(unsigned R1, unsigned R2) const {
if (R1 == R2) return true;
- if (const unsigned *AliasSet = RegInfo.getAliasSet(R2))
- for (unsigned i = 0; AliasSet[i]; ++i)
- if (AliasSet[i] == R1) return true;
+ for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
+ *AliasSet; ++AliasSet) {
+ if (*AliasSet == R1) return true;
+ }
return false;
}
- /// isAllocatableRegister - A register may be used by the program if it's
- /// not the stack or frame pointer.
- bool isAllocatableRegister(unsigned R) const {
- unsigned FP = RegInfo.getFramePointer(), SP = RegInfo.getStackPointer();
- return !areRegsEqual(FP, R) && !areRegsEqual(SP, R);
- }
-
- /// getStackSpaceFor - This returns the offset of the specified virtual
- /// register on the stack, allocating space if neccesary.
- unsigned getStackSpaceFor(unsigned VirtReg,
- const TargetRegisterClass *regClass);
-
- void cleanupAfterFunction() {
- VirtReg2OffsetMap.clear();
- NumBytesAllocated = 4; // FIXME: This is X86 specific
- }
+ /// getStackSpaceFor - This returns the frame index of the specified virtual
+ /// register on the stack, allocating space if necessary.
+ int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
+ /// removePhysReg - This method marks the specified physical register as no
+ /// longer being in use.
+ ///
void removePhysReg(unsigned PhysReg);
/// spillVirtReg - This method spills the value specified by PhysReg into
unsigned VirtReg, unsigned PhysReg);
/// spillPhysReg - This method spills the specified physical register into
- /// the virtual register slot associated with it.
- //
+ /// the virtual register slot associated with it. If OnlyVirtRegs is set to
+ /// true, then the request is ignored if the physical register does not
+ /// contain a virtual register.
+ ///
void spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
- unsigned PhysReg) {
- std::map<unsigned, unsigned>::iterator PI = PhysRegsUsed.find(PhysReg);
- if (PI != PhysRegsUsed.end()) { // Only spill it if it's used!
- spillVirtReg(MBB, I, PI->second, PhysReg);
- } else if (const unsigned *AliasSet = RegInfo.getAliasSet(PhysReg)) {
- // If the selected register aliases any other registers, we must make sure
- // that one of the aliases isn't alive...
- for (unsigned i = 0; AliasSet[i]; ++i) {
- PI = PhysRegsUsed.find(AliasSet[i]);
- if (PI != PhysRegsUsed.end()) // Spill aliased register...
- spillVirtReg(MBB, I, PI->second, AliasSet[i]);
- }
- }
- }
+ unsigned PhysReg, bool OnlyVirtRegs = false);
+
+ /// assignVirtToPhysReg - This method updates local state so that we know
+ /// that PhysReg is the proper container for VirtReg now. The physical
+ /// register must not be used for anything else when this is called.
+ ///
+ void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
- void AssignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
+ /// liberatePhysReg - Make sure the specified physical register is available
+ /// for use. If there is currently a value in it, it is either moved out of
+ /// the way or spilled to memory.
+ ///
+ void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
+ unsigned PhysReg);
/// isPhysRegAvailable - Return true if the specified physical register is
/// free and available for use. This also includes checking to see if
/// aliased registers are all free...
///
bool isPhysRegAvailable(unsigned PhysReg) const;
+
+ /// getFreeReg - Look to see if there is a free register available in the
+ /// specified register class. If not, return 0.
+ ///
+ unsigned getFreeReg(const TargetRegisterClass *RC);
- /// getFreeReg - Find a physical register to hold the specified virtual
+ /// getReg - Find a physical register to hold the specified virtual
/// register. If all compatible physical registers are used, this method
/// spills the last used virtual register to the stack, and uses that
/// register.
///
- unsigned getFreeReg(MachineBasicBlock &MBB,
- MachineBasicBlock::iterator &I,
- unsigned virtualReg);
+ unsigned getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
+ unsigned VirtReg);
/// reloadVirtReg - This method loads the specified virtual register into a
/// physical register, returning the physical register chosen. This updates
///
unsigned reloadVirtReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I, unsigned VirtReg);
+
+ void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
+ unsigned PhysReg);
};
}
+/// getStackSpaceFor - This allocates space for the specified virtual register
+/// to be held on the stack.
+int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
+ // Find the location Reg would belong...
+ std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
-/// getStackSpaceFor - This allocates space for the specified virtual
-/// register to be held on the stack.
-unsigned RA::getStackSpaceFor(unsigned VirtReg,
- const TargetRegisterClass *RegClass) {
- // Find the location VirtReg would belong...
- std::map<unsigned, unsigned>::iterator I =
- VirtReg2OffsetMap.lower_bound(VirtReg);
-
- if (I != VirtReg2OffsetMap.end() && I->first == VirtReg)
+ if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
return I->second; // Already has space allocated?
- unsigned RegSize = RegClass->getDataSize();
+ // Allocate a new stack object for this spill location...
+ int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
- // Align NumBytesAllocated. We should be using TargetData alignment stuff
- // to determine this, but we don't know the LLVM type associated with the
- // virtual register. Instead, just align to a multiple of the size for now.
- NumBytesAllocated += RegSize-1;
- NumBytesAllocated = NumBytesAllocated/RegSize*RegSize;
-
// Assign the slot...
- VirtReg2OffsetMap.insert(I, std::make_pair(VirtReg, NumBytesAllocated));
-
- // Reserve the space!
- NumBytesAllocated += RegSize;
- return NumBytesAllocated-RegSize;
+ StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
+ return FrameIdx;
}
/// longer being in use.
///
void RA::removePhysReg(unsigned PhysReg) {
- PhysRegsUsed.erase(PhysReg); // PhyReg no longer used
+ PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
std::vector<unsigned>::iterator It =
std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
- assert(It != PhysRegsUseOrder.end() &&
- "Spilled a physical register, but it was not in use list!");
- PhysRegsUseOrder.erase(It);
+ if (It != PhysRegsUseOrder.end())
+ PhysRegsUseOrder.erase(It);
}
+
/// spillVirtReg - This method spills the value specified by PhysReg into the
/// virtual register slot specified by VirtReg. It then updates the RA data
/// structures to indicate the fact that PhysReg is now available.
///
void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
unsigned VirtReg, unsigned PhysReg) {
- // If this is just a marker register, we don't need to spill it.
- if (VirtReg != 0) {
- const TargetRegisterClass *RegClass = MF->getRegClass(VirtReg);
- unsigned stackOffset = getStackSpaceFor(VirtReg, RegClass);
-
- // Add move instruction(s)
- I = RegInfo.storeReg2RegOffset(MBB, I, PhysReg, RegInfo.getFramePointer(),
- -stackOffset, RegClass->getDataSize());
+ if (!VirtReg && DisableKill) return;
+ assert(VirtReg && "Spilling a physical register is illegal!"
+ " Must not have appropriate kill for the register or use exists beyond"
+ " the intended one.");
+ DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
+ std::cerr << " containing %reg" << VirtReg;
+ if (!isVirtRegModified(VirtReg))
+ std::cerr << " which has not been modified, so no store necessary!");
+
+ // Otherwise, there is a virtual register corresponding to this physical
+ // register. We only need to spill it into its stack slot if it has been
+ // modified.
+ if (isVirtRegModified(VirtReg)) {
+ const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
+ int FrameIndex = getStackSpaceFor(VirtReg, RC);
+ DEBUG(std::cerr << " to stack slot #" << FrameIndex);
+ RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
++NumSpilled; // Update statistics
- Virt2PhysRegMap.erase(VirtReg); // VirtReg no longer available
}
+ getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
+
+ DEBUG(std::cerr << "\n");
removePhysReg(PhysReg);
}
+/// spillPhysReg - This method spills the specified physical register into the
+/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
+/// then the request is ignored if the physical register does not contain a
+/// virtual register.
+///
+void RA::spillPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
+ unsigned PhysReg, bool OnlyVirtRegs) {
+ if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
+ if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
+ spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
+ } else {
+ // If the selected register aliases any other registers, we must make
+ // sure that one of the aliases isn't alive...
+ for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
+ *AliasSet; ++AliasSet)
+ if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
+ if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
+ spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
+ }
+}
+
+
+/// assignVirtToPhysReg - This method updates local state so that we know
+/// that PhysReg is the proper container for VirtReg now. The physical
+/// register must not be used for anything else when this is called.
+///
+void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
+ assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
+ // Update information to note the fact that this register was just used, and
+ // it holds VirtReg.
+ PhysRegsUsed[PhysReg] = VirtReg;
+ getOrInsertVirt2PhysRegMapSlot(VirtReg) = PhysReg;
+ PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
+}
+
+
/// isPhysRegAvailable - Return true if the specified physical register is free
/// and available for use. This also includes checking to see if aliased
/// registers are all free...
///
bool RA::isPhysRegAvailable(unsigned PhysReg) const {
- if (PhysRegsUsed.count(PhysReg)) return false;
+ if (PhysRegsUsed[PhysReg] != -1) return false;
// If the selected register aliases any other allocated registers, it is
// not free!
- if (const unsigned *AliasSet = RegInfo.getAliasSet(PhysReg))
- for (unsigned i = 0; AliasSet[i]; ++i)
- if (PhysRegsUsed.count(AliasSet[i])) // Aliased register in use?
- return false; // Can't use this reg then.
+ for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
+ *AliasSet; ++AliasSet)
+ if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
+ return false; // Can't use this reg then.
return true;
}
+/// getFreeReg - Look to see if there is a free register available in the
+/// specified register class. If not, return 0.
+///
+unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
+ // Get iterators defining the range of registers that are valid to allocate in
+ // this class, which also specifies the preferred allocation order.
+ TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
+ TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
+
+ for (; RI != RE; ++RI)
+ if (isPhysRegAvailable(*RI)) { // Is reg unused?
+ assert(*RI != 0 && "Cannot use register!");
+ return *RI; // Found an unused register!
+ }
+ return 0;
+}
-/// getFreeReg - Find a physical register to hold the specified virtual
+
+/// liberatePhysReg - Make sure the specified physical register is available for
+/// use. If there is currently a value in it, it is either moved out of the way
+/// or spilled to memory.
+///
+void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
+ unsigned PhysReg) {
+ // FIXME: This code checks to see if a register is available, but it really
+ // wants to know if a reg is available BEFORE the instruction executes. If
+ // called after killed operands are freed, it runs the risk of reallocating a
+ // used operand...
+#if 0
+ if (isPhysRegAvailable(PhysReg)) return; // Already available...
+
+ // Check to see if the register is directly used, not indirectly used through
+ // aliases. If aliased registers are the ones actually used, we cannot be
+ // sure that we will be able to save the whole thing if we do a reg-reg copy.
+ if (PhysRegsUsed[PhysReg] != -1) {
+ // The virtual register held...
+ unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
+
+ // Check to see if there is a compatible register available. If so, we can
+ // move the value into the new register...
+ //
+ const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
+ if (unsigned NewReg = getFreeReg(RC)) {
+ // Emit the code to copy the value...
+ RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
+
+ // Update our internal state to indicate that PhysReg is available and Reg
+ // isn't.
+ getVirt2PhysRegMapSlot[VirtReg] = 0;
+ removePhysReg(PhysReg); // Free the physreg
+
+ // Move reference over to new register...
+ assignVirtToPhysReg(VirtReg, NewReg);
+ return;
+ }
+ }
+#endif
+ spillPhysReg(MBB, I, PhysReg);
+}
+
+
+/// getReg - Find a physical register to hold the specified virtual
/// register. If all compatible physical registers are used, this method spills
/// the last used virtual register to the stack, and uses that register.
///
-unsigned RA::getFreeReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
- unsigned VirtReg) {
- const TargetRegisterClass *RegClass = MF->getRegClass(VirtReg);
- unsigned PhysReg = 0;
+unsigned RA::getReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
+ unsigned VirtReg) {
+ const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
// First check to see if we have a free register of the requested type...
- for (TargetRegisterClass::iterator It = RegClass->begin(),E = RegClass->end();
- It != E; ++It) {
- unsigned R = *It;
- if (isPhysRegAvailable(R)) { // Is reg unused?
- if (isAllocatableRegister(R)) { // And is not a frame register?
- // Found an unused register!
- PhysReg = R;
- break;
- }
- }
- }
+ unsigned PhysReg = getFreeReg(RC);
// If we didn't find an unused register, scavenge one now!
if (PhysReg == 0) {
"Couldn't find a register of the appropriate class!");
unsigned R = PhysRegsUseOrder[i];
- // If the current register is compatible, use it.
- if (isAllocatableRegister(R)) {
- if (RegInfo.getRegClass(R) == RegClass) {
+
+ // We can only use this register if it holds a virtual register (ie, it
+ // can be spilled). Do not use it if it is an explicitly allocated
+ // physical register!
+ assert(PhysRegsUsed[R] != -1 &&
+ "PhysReg in PhysRegsUseOrder, but is not allocated?");
+ if (PhysRegsUsed[R]) {
+ // If the current register is compatible, use it.
+ if (RegInfo->getRegClass(R) == RC) {
PhysReg = R;
break;
} else {
// If one of the registers aliased to the current register is
// compatible, use it.
- if (const unsigned *AliasSet = RegInfo.getAliasSet(R))
- for (unsigned a = 0; AliasSet[a]; ++a)
- if (RegInfo.getRegClass(AliasSet[a]) == RegClass) {
- PhysReg = AliasSet[a]; // Take an aliased register
- break;
- }
+ for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
+ *AliasSet; ++AliasSet) {
+ if (RegInfo->getRegClass(*AliasSet) == RC) {
+ PhysReg = *AliasSet; // Take an aliased register
+ break;
+ }
+ }
}
}
}
- assert(isAllocatableRegister(PhysReg) && "Register is not allocatable!");
-
assert(PhysReg && "Physical register not assigned!?!?");
// At this point PhysRegsUseOrder[i] is the least recently used register of
}
// Now that we know which register we need to assign this to, do it now!
- AssignVirtToPhysReg(VirtReg, PhysReg);
+ assignVirtToPhysReg(VirtReg, PhysReg);
return PhysReg;
}
-void RA::AssignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
- assert(PhysRegsUsed.find(PhysReg) == PhysRegsUsed.end() &&
- "Phys reg already assigned!");
- // Update information to note the fact that this register was just used, and
- // it holds VirtReg.
- PhysRegsUsed[PhysReg] = VirtReg;
- Virt2PhysRegMap[VirtReg] = PhysReg;
- PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
-}
-
-
/// reloadVirtReg - This method loads the specified virtual register into a
/// physical register, returning the physical register chosen. This updates the
/// regalloc data structures to reflect the fact that the virtual reg is now
unsigned RA::reloadVirtReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator &I,
unsigned VirtReg) {
- std::map<unsigned, unsigned>::iterator It = Virt2PhysRegMap.find(VirtReg);
- if (It != Virt2PhysRegMap.end()) {
- MarkPhysRegRecentlyUsed(It->second);
- return It->second; // Already have this value available!
+ if (unsigned PR = getOrInsertVirt2PhysRegMapSlot(VirtReg)) {
+ MarkPhysRegRecentlyUsed(PR);
+ return PR; // Already have this value available!
}
- unsigned PhysReg = getFreeReg(MBB, I, VirtReg);
+ unsigned PhysReg = getReg(MBB, I, VirtReg);
+
+ const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
+ int FrameIndex = getStackSpaceFor(VirtReg, RC);
+
+ markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
- const TargetRegisterClass *RegClass = MF->getRegClass(VirtReg);
- unsigned StackOffset = getStackSpaceFor(VirtReg, RegClass);
+ DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
+ << RegInfo->getName(PhysReg) << "\n");
// Add move instruction(s)
- I = RegInfo.loadRegOffset2Reg(MBB, I, PhysReg, RegInfo.getFramePointer(),
- -StackOffset, RegClass->getDataSize());
+ RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIndex, RC);
++NumReloaded; // Update statistics
return PhysReg;
}
-/// CalculateLastUseOfVReg - Calculate an approximation of the killing uses for
-/// the virtual registers in the function. Here we try to capture registers
-/// that are defined and only used within the same basic block. Because we
-/// don't have use-def chains yet, we have to do this the hard way.
-///
-void RA::CalculateLastUseOfVReg(MachineBasicBlock &MBB,
- std::map<unsigned, MachineInstr*> &LastUseOfVReg) const {
- // Calculate the last machine instruction in this basic block that uses the
- // specified virtual register defined in this basic block.
- std::map<unsigned, MachineInstr*> LastLocalUses;
- for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;++I){
- MachineInstr *MI = *I;
- for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
- MachineOperand &Op = MI->getOperand(i);
- if (Op.isVirtualRegister()) {
- if (Op.opIsDef()) { // Definition of a new virtual reg?
- LastLocalUses[Op.getAllocatedRegNum()] = 0; // Record it
- } else { // Use of a virtual reg.
- std::map<unsigned, MachineInstr*>::iterator It =
- LastLocalUses.find(Op.getAllocatedRegNum());
- if (It != LastLocalUses.end()) // Local use?
- It->second = MI; // Update last use
- else
- LastUseOfVReg[Op.getAllocatedRegNum()] = 0;
- }
- }
- }
- }
-
- // Move local uses over... if there are any uses of a local already in the
- // lastuse map, the newly inserted entry is ignored.
- LastUseOfVReg.insert(LastLocalUses.begin(), LastLocalUses.end());
-}
-
-/// EliminatePHINodes - Eliminate phi nodes by inserting copy instructions in
-/// predecessor basic blocks.
-///
-void RA::EliminatePHINodes(MachineBasicBlock &MBB) {
- const MachineInstrInfo &MII = TM.getInstrInfo();
-
- while (MBB.front()->getOpcode() == MachineInstrInfo::PHI) {
- MachineInstr *MI = MBB.front();
- // Unlink the PHI node from the basic block... but don't delete the PHI yet
- MBB.erase(MBB.begin());
-
- assert(MI->getOperand(0).isVirtualRegister() &&
- "PHI node doesn't write virt reg?");
+void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
+ // loop over each instruction
+ MachineBasicBlock::iterator I = MBB.begin();
+ for (; I != MBB.end(); ++I) {
+ MachineInstr *MI = *I;
+ const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
+ DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
+ std::cerr << " Regs have values: ";
+ for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
+ if (PhysRegsUsed[i] != -1)
+ std::cerr << "[" << RegInfo->getName(i)
+ << ",%reg" << PhysRegsUsed[i] << "] ";
+ std::cerr << "\n");
- unsigned virtualReg = MI->getOperand(0).getAllocatedRegNum();
+ // Loop over the implicit uses, making sure that they are at the head of the
+ // use order list, so they don't get reallocated.
+ for (const unsigned *ImplicitUses = TID.ImplicitUses;
+ *ImplicitUses; ++ImplicitUses)
+ MarkPhysRegRecentlyUsed(*ImplicitUses);
+
+ // Get the used operands into registers. This has the potential to spill
+ // incoming values if we are out of registers. Note that we completely
+ // ignore physical register uses here. We assume that if an explicit
+ // physical register is referenced by the instruction, that it is guaranteed
+ // to be live-in, or the input is badly hosed.
+ //
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
+ if (MI->getOperand(i).isUse() &&
+ !MI->getOperand(i).isDef() &&
+ MI->getOperand(i).isVirtualRegister()){
+ unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum();
+ unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg);
+ MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register
+ }
- for (int i = MI->getNumOperands() - 1; i >= 2; i-=2) {
- MachineOperand &opVal = MI->getOperand(i-1);
-
- // Get the MachineBasicBlock equivalent of the BasicBlock that is the
- // source path the phi
- MachineBasicBlock &opBlock = *MI->getOperand(i).getMachineBasicBlock();
-
- // Check to make sure we haven't already emitted the copy for this block.
- // This can happen because PHI nodes may have multiple entries for the
- // same basic block. It doesn't matter which entry we use though, because
- // all incoming values are guaranteed to be the same for a particular bb.
- //
- // Note that this is N^2 in the number of phi node entries, but since the
- // # of entries is tiny, this is not a problem.
+ if (!DisableKill) {
+ // If this instruction is the last user of anything in registers, kill the
+ // value, freeing the register being used, so it doesn't need to be
+ // spilled to memory.
//
- bool HaveNotEmitted = true;
- for (int op = MI->getNumOperands() - 1; op != i; op -= 2)
- if (&opBlock == MI->getOperand(op).getMachineBasicBlock()) {
- HaveNotEmitted = false;
- break;
+ for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
+ KE = LV->killed_end(MI); KI != KE; ++KI) {
+ unsigned VirtReg = KI->second;
+ unsigned PhysReg = VirtReg;
+ if (MRegisterInfo::isVirtualRegister(VirtReg)) {
+ unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
+ PhysReg = PhysRegSlot;
+ assert(PhysReg != 0);
+ PhysRegSlot = 0;
}
- if (HaveNotEmitted) {
- MachineBasicBlock::iterator opI = opBlock.end();
- MachineInstr *opMI = *--opI;
-
- // must backtrack over ALL the branches in the previous block
- while (MII.isBranch(opMI->getOpcode()) && opI != opBlock.begin())
- opMI = *--opI;
-
- // move back to the first branch instruction so new instructions
- // are inserted right in front of it and not in front of a non-branch
- if (!MII.isBranch(opMI->getOpcode()))
- ++opI;
-
- unsigned dataSize = MF->getRegClass(virtualReg)->getDataSize();
-
- // Retrieve the constant value from this op, move it to target
- // register of the phi
- if (opVal.isImmediate()) {
- opI = RegInfo.moveImm2Reg(opBlock, opI, virtualReg,
- (unsigned) opVal.getImmedValue(),
- dataSize);
- } else {
- opI = RegInfo.moveReg2Reg(opBlock, opI, virtualReg,
- opVal.getAllocatedRegNum(), dataSize);
+ if (PhysReg) {
+ DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
+ << "[%reg" << VirtReg <<"], removing it from live set\n");
+ removePhysReg(PhysReg);
}
}
}
-
- // really delete the PHI instruction now!
- delete MI;
- }
-}
-
-
-void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
- // loop over each instruction
- MachineBasicBlock::iterator I = MBB.begin();
- for (; I != MBB.end(); ++I) {
- MachineInstr *MI = *I;
- const MachineInstrDescriptor &MID = MIInfo.get(MI->getOpcode());
// Loop over all of the operands of the instruction, spilling registers that
// are defined, and marking explicit destinations in the PhysRegsUsed map.
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
- if (MI->getOperand(i).opIsDef() &&
- MI->getOperand(i).isPhysicalRegister()) {
+ if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
+ MRegisterInfo::isPhysicalRegister(MI->getOperand(i).getReg())) {
unsigned Reg = MI->getOperand(i).getAllocatedRegNum();
- spillPhysReg(MBB, I, Reg);
- PhysRegsUsed[Reg] = 0; // It's free now, and it's reserved
+ spillPhysReg(MBB, I, Reg, true); // Spill any existing value in the reg
+ PhysRegsUsed[Reg] = 0; // It is free and reserved now
PhysRegsUseOrder.push_back(Reg);
- }
-
- // Loop over the implicit defs, spilling them, as above.
- if (const unsigned *ImplicitDefs = MID.ImplicitDefs)
- for (unsigned i = 0; ImplicitDefs[i]; ++i) {
- unsigned Reg = ImplicitDefs[i];
-
- // We don't want to spill implicit definitions if they were explicitly
- // chosen. For this reason, check to see now if the register we are
- // to spill has a vreg of 0.
- if (PhysRegsUsed.count(Reg) && PhysRegsUsed[Reg] != 0) {
- spillPhysReg(MBB, I, Reg);
- PhysRegsUsed[Reg] = 0; // It's free now, and it's reserved
- PhysRegsUseOrder.push_back(Reg);
+ for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
+ *AliasSet; ++AliasSet) {
+ PhysRegsUseOrder.push_back(*AliasSet);
+ PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
}
}
- // Loop over the implicit uses, making sure that they are at the head of the
- // use order list, so they don't get reallocated.
- if (const unsigned *ImplicitUses = MID.ImplicitUses)
- for (unsigned i = 0; ImplicitUses[i]; ++i)
- MarkPhysRegRecentlyUsed(ImplicitUses[i]);
-
- // Loop over all of the operands again, getting the used operands into
- // registers. This has the potiential to spill incoming values because we
- // are out of registers.
- //
- for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
- if (MI->getOperand(i).opIsUse() &&
- MI->getOperand(i).isVirtualRegister()) {
- unsigned VirtSrcReg = MI->getOperand(i).getAllocatedRegNum();
- unsigned PhysSrcReg = reloadVirtReg(MBB, I, VirtSrcReg);
- MI->SetMachineOperandReg(i, PhysSrcReg); // Assign the input register
+ // Loop over the implicit defs, spilling them as well.
+ for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
+ *ImplicitDefs; ++ImplicitDefs) {
+ unsigned Reg = *ImplicitDefs;
+ spillPhysReg(MBB, I, Reg);
+ PhysRegsUseOrder.push_back(Reg);
+ PhysRegsUsed[Reg] = 0; // It is free and reserved now
+ for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
+ *AliasSet; ++AliasSet) {
+ PhysRegsUseOrder.push_back(*AliasSet);
+ PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
}
-
+ }
+
// Okay, we have allocated all of the source operands and spilled any values
// that would be destroyed by defs of this instruction. Loop over the
- // implicit defs and assign them to a register, spilling the incoming value
- // if we need to scavange a register.
+ // implicit defs and assign them to a register, spilling incoming values if
+ // we need to scavenge a register.
//
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
- if (MI->getOperand(i).opIsDef() &&
- !MI->getOperand(i).isPhysicalRegister()) {
+ if (MI->getOperand(i).isDef() &&
+ MI->getOperand(i).isVirtualRegister()) {
unsigned DestVirtReg = MI->getOperand(i).getAllocatedRegNum();
unsigned DestPhysReg;
- if (TM.getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
- // must be same register number as the first operand
- // This maps a = b + c into b += c, and saves b into a's spot
- assert(MI->getOperand(1).isRegister() &&
- MI->getOperand(1).getAllocatedRegNum() &&
- MI->getOperand(1).opIsUse() &&
- "Two address instruction invalid!");
- DestPhysReg = MI->getOperand(1).getAllocatedRegNum();
-
- // Spill the incoming value, because we are about to change the
- // register contents.
- spillPhysReg(MBB, I, DestPhysReg);
- AssignVirtToPhysReg(DestVirtReg, DestPhysReg);
- } else {
- DestPhysReg = getFreeReg(MBB, I, DestVirtReg);
- }
+ // If DestVirtReg already has a value, use it.
+ if (!(DestPhysReg = getOrInsertVirt2PhysRegMapSlot(DestVirtReg)))
+ DestPhysReg = getReg(MBB, I, DestVirtReg);
+ markVirtRegModified(DestVirtReg);
MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
}
if (!DisableKill) {
- // If this instruction is the last user of anything in registers, kill the
- // value, freeing the register being used, so it doesn't need to be spilled
- // to memory at the end of the block.
- std::multimap<MachineInstr*, unsigned>::iterator LUOI =
- LastUserOf.lower_bound(MI);
- for (; LUOI != LastUserOf.end() && LUOI->first == MI; ++MI) {// entry found?
- unsigned VirtReg = LUOI->second;
- unsigned PhysReg = Virt2PhysRegMap[VirtReg];
+ // If this instruction defines any registers that are immediately dead,
+ // kill them now.
+ //
+ for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
+ KE = LV->dead_end(MI); KI != KE; ++KI) {
+ unsigned VirtReg = KI->second;
+ unsigned PhysReg = VirtReg;
+ if (MRegisterInfo::isVirtualRegister(VirtReg)) {
+ unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
+ PhysReg = PhysRegSlot;
+ assert(PhysReg != 0);
+ PhysRegSlot = 0;
+ }
+
if (PhysReg) {
- DEBUG(std::cout << "V: " << VirtReg << " P: " << PhysReg << " Last use of: " << *MI);
+ DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
+ << " [%reg" << VirtReg
+ << "] is never used, removing it frame live list\n");
removePhysReg(PhysReg);
}
- Virt2PhysRegMap.erase(VirtReg);
}
}
}
// Rewind the iterator to point to the first flow control instruction...
- const MachineInstrInfo &MII = TM.getInstrInfo();
+ const TargetInstrInfo &TII = TM->getInstrInfo();
I = MBB.end();
- do {
+ while (I != MBB.begin() && TII.isTerminatorInstr((*(I-1))->getOpcode()))
--I;
- } while ((MII.isReturn((*I)->getOpcode()) ||
- MII.isBranch((*I)->getOpcode())) && I != MBB.begin());
-
- if (!MII.isReturn((*I)->getOpcode()) && !MII.isBranch((*I)->getOpcode()))
- ++I;
// Spill all physical registers holding virtual registers now.
- while (!PhysRegsUsed.empty())
- spillVirtReg(MBB, I, PhysRegsUsed.begin()->second,
- PhysRegsUsed.begin()->first);
-
- assert(Virt2PhysRegMap.empty() && "Virtual registers still in phys regs?");
- assert(PhysRegsUseOrder.empty() && "Physical regs still allocated?");
-}
-
-
-/// EmitPrologue - Use the register info object to add a prologue to the
-/// function and save any callee saved registers we are responsible for.
-///
-void RA::EmitPrologue() {
- // Get a list of the callee saved registers, so that we can save them on entry
- // to the function.
- //
-
- MachineBasicBlock &MBB = MF->front(); // Prolog goes in entry BB
- MachineBasicBlock::iterator I = MBB.begin();
-
- const unsigned *CSRegs = RegInfo.getCalleeSaveRegs();
- for (unsigned i = 0; CSRegs[i]; ++i) {
- const TargetRegisterClass *RegClass = RegInfo.getRegClass(CSRegs[i]);
- unsigned Offset = getStackSpaceFor(CSRegs[i], RegClass);
-
- // Insert the spill to the stack frame...
- ++NumSpilled;
- I = RegInfo.storeReg2RegOffset(MBB, I, CSRegs[i], RegInfo.getFramePointer(),
- -Offset, RegClass->getDataSize());
- }
-
- // Add prologue to the function...
- RegInfo.emitPrologue(*MF, NumBytesAllocated);
-}
-
-
-/// EmitEpilogue - Use the register info object to add a epilogue to the
-/// function and restore any callee saved registers we are responsible for.
-///
-void RA::EmitEpilogue(MachineBasicBlock &MBB) {
- // Insert instructions before the return.
- MachineBasicBlock::iterator I = --MBB.end();
-
- const unsigned *CSRegs = RegInfo.getCalleeSaveRegs();
- for (unsigned i = 0; CSRegs[i]; ++i) {
- const TargetRegisterClass *RegClass = RegInfo.getRegClass(CSRegs[i]);
- unsigned Offset = getStackSpaceFor(CSRegs[i], RegClass);
- ++NumReloaded;
- I = RegInfo.loadRegOffset2Reg(MBB, I, CSRegs[i], RegInfo.getFramePointer(),
- -Offset, RegClass->getDataSize());
- --I; // Insert in reverse order
- }
-
- RegInfo.emitEpilogue(MBB, NumBytesAllocated);
+ for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
+ if (PhysRegsUsed[i] != -1)
+ if (unsigned VirtReg = PhysRegsUsed[i])
+ spillVirtReg(MBB, I, VirtReg, i);
+ else
+ removePhysReg(i);
+
+#ifndef NDEBUG
+ bool AllOk = true;
+ for (unsigned i = 0, e = Virt2PhysRegMap.size(); i != e; ++i)
+ if (unsigned PR = Virt2PhysRegMap[i]) {
+ std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
+ AllOk = false;
+ }
+ assert(AllOk && "Virtual registers still in phys regs?");
+#endif
+
+ // Clear any physical register which appear live at the end of the basic
+ // block, but which do not hold any virtual registers. e.g., the stack
+ // pointer.
+ PhysRegsUseOrder.clear();
}
bool RA::runOnMachineFunction(MachineFunction &Fn) {
DEBUG(std::cerr << "Machine Function " << "\n");
MF = &Fn;
+ TM = &Fn.getTarget();
+ RegInfo = TM->getRegisterInfo();
- // First pass: eliminate PHI instructions by inserting copies into predecessor
- // blocks, and calculate a simple approximation of killing uses for virtual
- // registers.
- //
- std::map<unsigned, MachineInstr*> LastUseOfVReg;
- for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
- MBB != MBBe; ++MBB) {
- if (!DisableKill)
- CalculateLastUseOfVReg(*MBB, LastUseOfVReg);
- EliminatePHINodes(*MBB);
- }
+ memset(PhysRegsUsed, -1, RegInfo->getNumRegs()*sizeof(unsigned));
- // At this point LastUseOfVReg has been filled in to contain the last
- // MachineInstr user of the specified virtual register, if that user is
- // within the same basic block as the definition (otherwise it contains
- // null). Invert this mapping now:
- if (!DisableKill)
- for (std::map<unsigned, MachineInstr*>::iterator I = LastUseOfVReg.begin(),
- E = LastUseOfVReg.end(); I != E; ++I)
- if (I->second)
- LastUserOf.insert(std::make_pair(I->second, I->first));
+ // Reserve some space for a moderate number of registers. If we know what the
+ // max virtual register number was we could use that instead and save some
+ // runtime overhead...
+ Virt2PhysRegMap.resize(1024);
- // We're done with the temporary list now.
- LastUseOfVReg.clear();
+ if (!DisableKill)
+ LV = &getAnalysis<LiveVariables>();
// Loop over all of the basic blocks, eliminating virtual register references
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
MBB != MBBe; ++MBB)
AllocateBasicBlock(*MBB);
-
- // Emit a prologue for the function...
- EmitPrologue();
-
- const MachineInstrInfo &MII = TM.getInstrInfo();
-
- // Add epilogue to restore the callee-save registers in each exiting block
- for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
- MBB != MBBe; ++MBB) {
- // If last instruction is a return instruction, add an epilogue
- if (MII.isReturn(MBB->back()->getOpcode()))
- EmitEpilogue(*MBB);
- }
-
- LastUserOf.clear();
- cleanupAfterFunction();
+ StackSlotForVirtReg.clear();
+ VirtRegModified.clear();
+ Virt2PhysRegMap.clear();
return true;
}
-Pass *createLocalRegisterAllocator(TargetMachine &TM) {
- return new RA(TM);
+FunctionPass *llvm::createLocalRegisterAllocator() {
+ return new RA();
}
+
projects / oota-llvm.git / blobdiff