1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file is part of the X86 Disassembler Emitter.
11 // It contains the implementation of the disassembler tables.
12 // Documentation for the disassembler emitter in general can be found in
13 // X86DisasemblerEmitter.h.
15 //===----------------------------------------------------------------------===//
17 #include "X86DisassemblerShared.h"
18 #include "X86DisassemblerTables.h"
20 #include "llvm/TableGen/TableGenBackend.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/Format.h"
26 using namespace X86Disassembler;
28 /// inheritsFrom - Indicates whether all instructions in one class also belong
31 /// @param child - The class that may be the subset
32 /// @param parent - The class that may be the superset
33 /// @return - True if child is a subset of parent, false otherwise.
34 static inline bool inheritsFrom(InstructionContext child,
35 InstructionContext parent) {
41 return(inheritsFrom(child, IC_64BIT) ||
42 inheritsFrom(child, IC_OPSIZE) ||
43 inheritsFrom(child, IC_XD) ||
44 inheritsFrom(child, IC_XS));
46 return(inheritsFrom(child, IC_64BIT_REXW) ||
47 inheritsFrom(child, IC_64BIT_OPSIZE) ||
48 inheritsFrom(child, IC_64BIT_XD) ||
49 inheritsFrom(child, IC_64BIT_XS));
51 return inheritsFrom(child, IC_64BIT_OPSIZE);
53 return inheritsFrom(child, IC_64BIT_XD);
54 inheritsFrom(child, IC_XD_OPSIZE);
56 return inheritsFrom(child, IC_64BIT_XS);
58 return inheritsFrom(child, IC_64BIT_XD_OPSIZE);
60 return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
61 inheritsFrom(child, IC_64BIT_REXW_XD) ||
62 inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
64 return(inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
66 return(inheritsFrom(child, IC_64BIT_REXW_XD));
68 return(inheritsFrom(child, IC_64BIT_REXW_XS));
69 case IC_64BIT_XD_OPSIZE:
71 case IC_64BIT_REXW_XD:
73 case IC_64BIT_REXW_XS:
75 case IC_64BIT_REXW_OPSIZE:
78 return inheritsFrom(child, IC_VEX_W);
80 return inheritsFrom(child, IC_VEX_W_XS);
82 return inheritsFrom(child, IC_VEX_W_XD);
84 return inheritsFrom(child, IC_VEX_W_OPSIZE);
102 llvm_unreachable("Unknown instruction class");
107 /// outranks - Indicates whether, if an instruction has two different applicable
108 /// classes, which class should be preferred when performing decode. This
109 /// imposes a total ordering (ties are resolved toward "lower")
111 /// @param upper - The class that may be preferable
112 /// @param lower - The class that may be less preferable
113 /// @return - True if upper is to be preferred, false otherwise.
114 static inline bool outranks(InstructionContext upper,
115 InstructionContext lower) {
116 assert(upper < IC_max);
117 assert(lower < IC_max);
119 #define ENUM_ENTRY(n, r, d) r,
120 static int ranks[IC_max] = {
125 return (ranks[upper] > ranks[lower]);
128 /// stringForContext - Returns a string containing the name of a particular
129 /// InstructionContext, usually for diagnostic purposes.
131 /// @param insnContext - The instruction class to transform to a string.
132 /// @return - A statically-allocated string constant that contains the
133 /// name of the instruction class.
134 static inline const char* stringForContext(InstructionContext insnContext) {
135 switch (insnContext) {
137 llvm_unreachable("Unhandled instruction class");
138 #define ENUM_ENTRY(n, r, d) case n: return #n; break;
146 /// stringForOperandType - Like stringForContext, but for OperandTypes.
147 static inline const char* stringForOperandType(OperandType type) {
150 llvm_unreachable("Unhandled type");
151 #define ENUM_ENTRY(i, d) case i: return #i;
157 /// stringForOperandEncoding - like stringForContext, but for
158 /// OperandEncodings.
159 static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
162 llvm_unreachable("Unhandled encoding");
163 #define ENUM_ENTRY(i, d) case i: return #i;
169 void DisassemblerTables::emitOneID(raw_ostream &o,
172 bool addComma) const {
174 o.indent(i * 2) << format("0x%hx", id);
176 o.indent(i * 2) << 0;
184 o << InstructionSpecifiers[id].name;
190 /// emitEmptyTable - Emits the modRMEmptyTable, which is used as a ID table by
191 /// all ModR/M decisions for instructions that are invalid for all possible
192 /// ModR/M byte values.
194 /// @param o - The output stream on which to emit the table.
195 /// @param i - The indentation level for that output stream.
196 static void emitEmptyTable(raw_ostream &o, uint32_t &i)
198 o.indent(i * 2) << "static const InstrUID modRMEmptyTable[1] = { 0 };\n";
202 /// getDecisionType - Determines whether a ModRM decision with 255 entries can
203 /// be compacted by eliminating redundant information.
205 /// @param decision - The decision to be compacted.
206 /// @return - The compactest available representation for the decision.
207 static ModRMDecisionType getDecisionType(ModRMDecision &decision)
209 bool satisfiesOneEntry = true;
210 bool satisfiesSplitRM = true;
214 for (index = 0; index < 256; ++index) {
215 if (decision.instructionIDs[index] != decision.instructionIDs[0])
216 satisfiesOneEntry = false;
218 if (((index & 0xc0) == 0xc0) &&
219 (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
220 satisfiesSplitRM = false;
222 if (((index & 0xc0) != 0xc0) &&
223 (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
224 satisfiesSplitRM = false;
227 if (satisfiesOneEntry)
228 return MODRM_ONEENTRY;
230 if (satisfiesSplitRM)
231 return MODRM_SPLITRM;
236 /// stringForDecisionType - Returns a statically-allocated string corresponding
237 /// to a particular decision type.
239 /// @param dt - The decision type.
240 /// @return - A pointer to the statically-allocated string (e.g.,
241 /// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
242 static const char* stringForDecisionType(ModRMDecisionType dt)
244 #define ENUM_ENTRY(n) case n: return #n;
247 llvm_unreachable("Unknown decision type");
253 /// stringForModifierType - Returns a statically-allocated string corresponding
254 /// to an opcode modifier type.
256 /// @param mt - The modifier type.
257 /// @return - A pointer to the statically-allocated string (e.g.,
258 /// "MODIFIER_NONE" for MODIFIER_NONE).
259 static const char* stringForModifierType(ModifierType mt)
261 #define ENUM_ENTRY(n) case n: return #n;
264 llvm_unreachable("Unknown modifier type");
270 DisassemblerTables::DisassemblerTables() {
273 for (i = 0; i < array_lengthof(Tables); i++) {
274 Tables[i] = new ContextDecision;
275 memset(Tables[i], 0, sizeof(ContextDecision));
278 HasConflicts = false;
281 DisassemblerTables::~DisassemblerTables() {
284 for (i = 0; i < array_lengthof(Tables); i++)
288 void DisassemblerTables::emitModRMDecision(raw_ostream &o1,
292 ModRMDecision &decision)
294 static uint64_t sTableNumber = 0;
295 uint64_t thisTableNumber = sTableNumber;
296 ModRMDecisionType dt = getDecisionType(decision);
299 if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)
301 o2.indent(i2) << "{ /* ModRMDecision */" << "\n";
304 o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
305 o2.indent(i2) << "modRMEmptyTable";
308 o2.indent(i2) << "}";
312 o1.indent(i1) << "static const InstrUID modRMTable" << thisTableNumber;
316 llvm_unreachable("Unknown decision type");
328 o1 << " = {" << "\n";
333 llvm_unreachable("Unknown decision type");
335 emitOneID(o1, i1, decision.instructionIDs[0], false);
338 emitOneID(o1, i1, decision.instructionIDs[0x00], true); // mod = 0b00
339 emitOneID(o1, i1, decision.instructionIDs[0xc0], false); // mod = 0b11
342 for (index = 0; index < 256; ++index)
343 emitOneID(o1, i1, decision.instructionIDs[index], index < 255);
348 o1.indent(i1) << "};" << "\n";
351 o2.indent(i2) << "{ /* struct ModRMDecision */" << "\n";
354 o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
355 o2.indent(i2) << "modRMTable" << sTableNumber << "\n";
358 o2.indent(i2) << "}";
363 void DisassemblerTables::emitOpcodeDecision(
368 OpcodeDecision &decision) const {
371 o2.indent(i2) << "{ /* struct OpcodeDecision */" << "\n";
373 o2.indent(i2) << "{" << "\n";
376 for (index = 0; index < 256; ++index) {
379 o2 << "/* 0x" << format("%02hhx", index) << " */" << "\n";
381 emitModRMDecision(o1, o2, i1, i2, decision.modRMDecisions[index]);
390 o2.indent(i2) << "}" << "\n";
392 o2.indent(i2) << "}" << "\n";
395 void DisassemblerTables::emitContextDecision(
400 ContextDecision &decision,
401 const char* name) const {
402 o2.indent(i2) << "static const struct ContextDecision " << name << " = {\n";
404 o2.indent(i2) << "{ /* opcodeDecisions */" << "\n";
409 for (index = 0; index < IC_max; ++index) {
410 o2.indent(i2) << "/* ";
411 o2 << stringForContext((InstructionContext)index);
415 emitOpcodeDecision(o1, o2, i1, i2, decision.opcodeDecisions[index]);
417 if (index + 1 < IC_max)
422 o2.indent(i2) << "}" << "\n";
424 o2.indent(i2) << "};" << "\n";
427 void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
429 o.indent(i * 2) << "static const struct InstructionSpecifier ";
430 o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
434 uint16_t numInstructions = InstructionSpecifiers.size();
435 uint16_t index, operandIndex;
437 for (index = 0; index < numInstructions; ++index) {
438 o.indent(i * 2) << "{ /* " << index << " */" << "\n";
442 stringForModifierType(InstructionSpecifiers[index].modifierType);
445 o.indent(i * 2) << "0x";
446 o << format("%02hhx", (uint16_t)InstructionSpecifiers[index].modifierBase);
449 o.indent(i * 2) << "{" << "\n";
452 for (operandIndex = 0; operandIndex < X86_MAX_OPERANDS; ++operandIndex) {
453 o.indent(i * 2) << "{ ";
454 o << stringForOperandEncoding(InstructionSpecifiers[index]
455 .operands[operandIndex]
458 o << stringForOperandType(InstructionSpecifiers[index]
459 .operands[operandIndex]
463 if (operandIndex < X86_MAX_OPERANDS - 1)
470 o.indent(i * 2) << "}," << "\n";
472 o.indent(i * 2) << "\"" << InstructionSpecifiers[index].name << "\"";
476 o.indent(i * 2) << "}";
478 if (index + 1 < numInstructions)
485 o.indent(i * 2) << "};" << "\n";
488 void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
491 o.indent(i * 2) << "static const InstructionContext " CONTEXTS_STR
495 for (index = 0; index < 256; ++index) {
498 if ((index & ATTR_VEXL) && (index & ATTR_OPSIZE))
499 o << "IC_VEX_L_OPSIZE";
500 else if ((index & ATTR_VEXL) && (index & ATTR_XD))
502 else if ((index & ATTR_VEXL) && (index & ATTR_XS))
504 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
505 o << "IC_VEX_W_OPSIZE";
506 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XD))
508 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XS))
510 else if (index & ATTR_VEXL)
512 else if ((index & ATTR_VEX) && (index & ATTR_REXW))
514 else if ((index & ATTR_VEX) && (index & ATTR_OPSIZE))
515 o << "IC_VEX_OPSIZE";
516 else if ((index & ATTR_VEX) && (index & ATTR_XD))
518 else if ((index & ATTR_VEX) && (index & ATTR_XS))
520 else if (index & ATTR_VEX)
522 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
523 o << "IC_64BIT_REXW_XS";
524 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
525 o << "IC_64BIT_REXW_XD";
526 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
527 (index & ATTR_OPSIZE))
528 o << "IC_64BIT_REXW_OPSIZE";
529 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
530 o << "IC_64BIT_XD_OPSIZE";
531 else if ((index & ATTR_64BIT) && (index & ATTR_XS))
533 else if ((index & ATTR_64BIT) && (index & ATTR_XD))
535 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
536 o << "IC_64BIT_OPSIZE";
537 else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
538 o << "IC_64BIT_REXW";
539 else if ((index & ATTR_64BIT))
541 else if ((index & ATTR_XD) && (index & ATTR_OPSIZE))
543 else if (index & ATTR_XS)
545 else if (index & ATTR_XD)
547 else if (index & ATTR_OPSIZE)
557 o << " /* " << index << " */";
563 o.indent(i * 2) << "};" << "\n";
566 void DisassemblerTables::emitContextDecisions(raw_ostream &o1,
571 emitContextDecision(o1, o2, i1, i2, *Tables[0], ONEBYTE_STR);
572 emitContextDecision(o1, o2, i1, i2, *Tables[1], TWOBYTE_STR);
573 emitContextDecision(o1, o2, i1, i2, *Tables[2], THREEBYTE38_STR);
574 emitContextDecision(o1, o2, i1, i2, *Tables[3], THREEBYTE3A_STR);
575 emitContextDecision(o1, o2, i1, i2, *Tables[4], THREEBYTEA6_STR);
576 emitContextDecision(o1, o2, i1, i2, *Tables[5], THREEBYTEA7_STR);
579 void DisassemblerTables::emit(raw_ostream &o) const {
586 raw_string_ostream o1(s1);
587 raw_string_ostream o2(s2);
589 emitInstructionInfo(o, i2);
592 emitContextTable(o, i2);
595 emitEmptyTable(o1, i1);
596 emitContextDecisions(o1, o2, i1, i2);
605 void DisassemblerTables::setTableFields(ModRMDecision &decision,
606 const ModRMFilter &filter,
611 for (index = 0; index < 256; ++index) {
612 if (filter.accepts(index)) {
613 if (decision.instructionIDs[index] == uid)
616 if (decision.instructionIDs[index] != 0) {
617 InstructionSpecifier &newInfo =
618 InstructionSpecifiers[uid];
619 InstructionSpecifier &previousInfo =
620 InstructionSpecifiers[decision.instructionIDs[index]];
623 continue; // filtered instructions get lowest priority
625 if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
626 newInfo.name == "XCHG32ar" ||
627 newInfo.name == "XCHG64ar"))
628 continue; // special case for XCHG*ar and NOOP
630 if (outranks(previousInfo.insnContext, newInfo.insnContext))
633 if (previousInfo.insnContext == newInfo.insnContext &&
634 !previousInfo.filtered) {
635 errs() << "Error: Primary decode conflict: ";
636 errs() << newInfo.name << " would overwrite " << previousInfo.name;
638 errs() << "ModRM " << index << "\n";
639 errs() << "Opcode " << (uint16_t)opcode << "\n";
640 errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
645 decision.instructionIDs[index] = uid;
650 void DisassemblerTables::setTableFields(OpcodeType type,
651 InstructionContext insnContext,
653 const ModRMFilter &filter,
658 ContextDecision &decision = *Tables[type];
660 for (index = 0; index < IC_max; ++index) {
661 if (is32bit && inheritsFrom((InstructionContext)index, IC_64BIT))
664 if (inheritsFrom((InstructionContext)index,
665 InstructionSpecifiers[uid].insnContext))
666 setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],