1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file is part of the X86 Disassembler Emitter.
11 // It contains the implementation of the disassembler tables.
12 // Documentation for the disassembler emitter in general can be found in
13 // X86DisasemblerEmitter.h.
15 //===----------------------------------------------------------------------===//
17 #include "X86DisassemblerShared.h"
18 #include "X86DisassemblerTables.h"
20 #include "llvm/TableGen/TableGenBackend.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/Format.h"
26 using namespace X86Disassembler;
28 /// inheritsFrom - Indicates whether all instructions in one class also belong
31 /// @param child - The class that may be the subset
32 /// @param parent - The class that may be the superset
33 /// @return - True if child is a subset of parent, false otherwise.
34 static inline bool inheritsFrom(InstructionContext child,
35 InstructionContext parent,
36 bool VEX_LIG = false) {
42 return(inheritsFrom(child, IC_64BIT) ||
43 inheritsFrom(child, IC_OPSIZE) ||
44 inheritsFrom(child, IC_XD) ||
45 inheritsFrom(child, IC_XS));
47 return(inheritsFrom(child, IC_64BIT_REXW) ||
48 inheritsFrom(child, IC_64BIT_OPSIZE) ||
49 inheritsFrom(child, IC_64BIT_XD) ||
50 inheritsFrom(child, IC_64BIT_XS));
52 return inheritsFrom(child, IC_64BIT_OPSIZE);
54 return inheritsFrom(child, IC_64BIT_XD);
56 return inheritsFrom(child, IC_64BIT_XS);
58 return inheritsFrom(child, IC_64BIT_XD_OPSIZE);
60 return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
61 inheritsFrom(child, IC_64BIT_REXW_XD) ||
62 inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
64 return(inheritsFrom(child, IC_64BIT_REXW_OPSIZE));
66 return(inheritsFrom(child, IC_64BIT_REXW_XD));
68 return(inheritsFrom(child, IC_64BIT_REXW_XS));
69 case IC_64BIT_XD_OPSIZE:
71 case IC_64BIT_REXW_XD:
72 case IC_64BIT_REXW_XS:
73 case IC_64BIT_REXW_OPSIZE:
76 return inheritsFrom(child, IC_VEX_W) ||
77 (VEX_LIG && inheritsFrom(child, IC_VEX_L));
79 return inheritsFrom(child, IC_VEX_W_XS) ||
80 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS));
82 return inheritsFrom(child, IC_VEX_W_XD) ||
83 (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD));
85 return inheritsFrom(child, IC_VEX_W_OPSIZE) ||
86 (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE));
98 llvm_unreachable("Unknown instruction class");
103 /// outranks - Indicates whether, if an instruction has two different applicable
104 /// classes, which class should be preferred when performing decode. This
105 /// imposes a total ordering (ties are resolved toward "lower")
107 /// @param upper - The class that may be preferable
108 /// @param lower - The class that may be less preferable
109 /// @return - True if upper is to be preferred, false otherwise.
110 static inline bool outranks(InstructionContext upper,
111 InstructionContext lower) {
112 assert(upper < IC_max);
113 assert(lower < IC_max);
115 #define ENUM_ENTRY(n, r, d) r,
116 static int ranks[IC_max] = {
121 return (ranks[upper] > ranks[lower]);
124 /// stringForContext - Returns a string containing the name of a particular
125 /// InstructionContext, usually for diagnostic purposes.
127 /// @param insnContext - The instruction class to transform to a string.
128 /// @return - A statically-allocated string constant that contains the
129 /// name of the instruction class.
130 static inline const char* stringForContext(InstructionContext insnContext) {
131 switch (insnContext) {
133 llvm_unreachable("Unhandled instruction class");
134 #define ENUM_ENTRY(n, r, d) case n: return #n; break;
142 /// stringForOperandType - Like stringForContext, but for OperandTypes.
143 static inline const char* stringForOperandType(OperandType type) {
146 llvm_unreachable("Unhandled type");
147 #define ENUM_ENTRY(i, d) case i: return #i;
153 /// stringForOperandEncoding - like stringForContext, but for
154 /// OperandEncodings.
155 static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
158 llvm_unreachable("Unhandled encoding");
159 #define ENUM_ENTRY(i, d) case i: return #i;
165 void DisassemblerTables::emitOneID(raw_ostream &o,
168 bool addComma) const {
170 o.indent(i * 2) << format("0x%hx", id);
172 o.indent(i * 2) << 0;
180 o << InstructionSpecifiers[id].name;
186 /// emitEmptyTable - Emits the modRMEmptyTable, which is used as a ID table by
187 /// all ModR/M decisions for instructions that are invalid for all possible
188 /// ModR/M byte values.
190 /// @param o - The output stream on which to emit the table.
191 /// @param i - The indentation level for that output stream.
192 static void emitEmptyTable(raw_ostream &o, uint32_t &i)
194 o.indent(i * 2) << "static const InstrUID modRMEmptyTable[1] = { 0 };\n";
198 /// getDecisionType - Determines whether a ModRM decision with 255 entries can
199 /// be compacted by eliminating redundant information.
201 /// @param decision - The decision to be compacted.
202 /// @return - The compactest available representation for the decision.
203 static ModRMDecisionType getDecisionType(ModRMDecision &decision)
205 bool satisfiesOneEntry = true;
206 bool satisfiesSplitRM = true;
210 for (index = 0; index < 256; ++index) {
211 if (decision.instructionIDs[index] != decision.instructionIDs[0])
212 satisfiesOneEntry = false;
214 if (((index & 0xc0) == 0xc0) &&
215 (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
216 satisfiesSplitRM = false;
218 if (((index & 0xc0) != 0xc0) &&
219 (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
220 satisfiesSplitRM = false;
223 if (satisfiesOneEntry)
224 return MODRM_ONEENTRY;
226 if (satisfiesSplitRM)
227 return MODRM_SPLITRM;
232 /// stringForDecisionType - Returns a statically-allocated string corresponding
233 /// to a particular decision type.
235 /// @param dt - The decision type.
236 /// @return - A pointer to the statically-allocated string (e.g.,
237 /// "MODRM_ONEENTRY" for MODRM_ONEENTRY).
238 static const char* stringForDecisionType(ModRMDecisionType dt)
240 #define ENUM_ENTRY(n) case n: return #n;
243 llvm_unreachable("Unknown decision type");
249 /// stringForModifierType - Returns a statically-allocated string corresponding
250 /// to an opcode modifier type.
252 /// @param mt - The modifier type.
253 /// @return - A pointer to the statically-allocated string (e.g.,
254 /// "MODIFIER_NONE" for MODIFIER_NONE).
255 static const char* stringForModifierType(ModifierType mt)
257 #define ENUM_ENTRY(n) case n: return #n;
260 llvm_unreachable("Unknown modifier type");
266 DisassemblerTables::DisassemblerTables() {
269 for (i = 0; i < array_lengthof(Tables); i++) {
270 Tables[i] = new ContextDecision;
271 memset(Tables[i], 0, sizeof(ContextDecision));
274 HasConflicts = false;
277 DisassemblerTables::~DisassemblerTables() {
280 for (i = 0; i < array_lengthof(Tables); i++)
284 void DisassemblerTables::emitModRMDecision(raw_ostream &o1,
288 ModRMDecision &decision)
290 static uint64_t sTableNumber = 0;
291 uint64_t thisTableNumber = sTableNumber;
292 ModRMDecisionType dt = getDecisionType(decision);
295 if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)
297 o2.indent(i2) << "{ /* ModRMDecision */" << "\n";
300 o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
301 o2.indent(i2) << "modRMEmptyTable";
304 o2.indent(i2) << "}";
308 o1.indent(i1) << "static const InstrUID modRMTable" << thisTableNumber;
312 llvm_unreachable("Unknown decision type");
324 o1 << " = {" << "\n";
329 llvm_unreachable("Unknown decision type");
331 emitOneID(o1, i1, decision.instructionIDs[0], false);
334 emitOneID(o1, i1, decision.instructionIDs[0x00], true); // mod = 0b00
335 emitOneID(o1, i1, decision.instructionIDs[0xc0], false); // mod = 0b11
338 for (index = 0; index < 256; ++index)
339 emitOneID(o1, i1, decision.instructionIDs[index], index < 255);
344 o1.indent(i1) << "};" << "\n";
347 o2.indent(i2) << "{ /* struct ModRMDecision */" << "\n";
350 o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
351 o2.indent(i2) << "modRMTable" << sTableNumber << "\n";
354 o2.indent(i2) << "}";
359 void DisassemblerTables::emitOpcodeDecision(
364 OpcodeDecision &decision) const {
367 o2.indent(i2) << "{ /* struct OpcodeDecision */" << "\n";
369 o2.indent(i2) << "{" << "\n";
372 for (index = 0; index < 256; ++index) {
375 o2 << "/* 0x" << format("%02hhx", index) << " */" << "\n";
377 emitModRMDecision(o1, o2, i1, i2, decision.modRMDecisions[index]);
386 o2.indent(i2) << "}" << "\n";
388 o2.indent(i2) << "}" << "\n";
391 void DisassemblerTables::emitContextDecision(
396 ContextDecision &decision,
397 const char* name) const {
398 o2.indent(i2) << "static const struct ContextDecision " << name << " = {\n";
400 o2.indent(i2) << "{ /* opcodeDecisions */" << "\n";
405 for (index = 0; index < IC_max; ++index) {
406 o2.indent(i2) << "/* ";
407 o2 << stringForContext((InstructionContext)index);
411 emitOpcodeDecision(o1, o2, i1, i2, decision.opcodeDecisions[index]);
413 if (index + 1 < IC_max)
418 o2.indent(i2) << "}" << "\n";
420 o2.indent(i2) << "};" << "\n";
423 void DisassemblerTables::emitInstructionInfo(raw_ostream &o, uint32_t &i)
425 o.indent(i * 2) << "static const struct InstructionSpecifier ";
426 o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
430 uint16_t numInstructions = InstructionSpecifiers.size();
431 uint16_t index, operandIndex;
433 for (index = 0; index < numInstructions; ++index) {
434 o.indent(i * 2) << "{ /* " << index << " */" << "\n";
438 stringForModifierType(InstructionSpecifiers[index].modifierType);
441 o.indent(i * 2) << "0x";
442 o << format("%02hhx", (uint16_t)InstructionSpecifiers[index].modifierBase);
445 o.indent(i * 2) << "{" << "\n";
448 for (operandIndex = 0; operandIndex < X86_MAX_OPERANDS; ++operandIndex) {
449 o.indent(i * 2) << "{ ";
450 o << stringForOperandEncoding(InstructionSpecifiers[index]
451 .operands[operandIndex]
454 o << stringForOperandType(InstructionSpecifiers[index]
455 .operands[operandIndex]
459 if (operandIndex < X86_MAX_OPERANDS - 1)
466 o.indent(i * 2) << "}," << "\n";
468 o.indent(i * 2) << "\"" << InstructionSpecifiers[index].name << "\"";
472 o.indent(i * 2) << "}";
474 if (index + 1 < numInstructions)
481 o.indent(i * 2) << "};" << "\n";
484 void DisassemblerTables::emitContextTable(raw_ostream &o, uint32_t &i) const {
487 o.indent(i * 2) << "static const InstructionContext " CONTEXTS_STR
491 for (index = 0; index < 256; ++index) {
494 if ((index & ATTR_VEXL) && (index & ATTR_OPSIZE))
495 o << "IC_VEX_L_OPSIZE";
496 else if ((index & ATTR_VEXL) && (index & ATTR_XD))
498 else if ((index & ATTR_VEXL) && (index & ATTR_XS))
500 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
501 o << "IC_VEX_W_OPSIZE";
502 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XD))
504 else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XS))
506 else if (index & ATTR_VEXL)
508 else if ((index & ATTR_VEX) && (index & ATTR_REXW))
510 else if ((index & ATTR_VEX) && (index & ATTR_OPSIZE))
511 o << "IC_VEX_OPSIZE";
512 else if ((index & ATTR_VEX) && (index & ATTR_XD))
514 else if ((index & ATTR_VEX) && (index & ATTR_XS))
516 else if (index & ATTR_VEX)
518 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
519 o << "IC_64BIT_REXW_XS";
520 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
521 o << "IC_64BIT_REXW_XD";
522 else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
523 (index & ATTR_OPSIZE))
524 o << "IC_64BIT_REXW_OPSIZE";
525 else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
526 o << "IC_64BIT_XD_OPSIZE";
527 else if ((index & ATTR_64BIT) && (index & ATTR_XS))
529 else if ((index & ATTR_64BIT) && (index & ATTR_XD))
531 else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
532 o << "IC_64BIT_OPSIZE";
533 else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
534 o << "IC_64BIT_REXW";
535 else if ((index & ATTR_64BIT))
537 else if ((index & ATTR_XD) && (index & ATTR_OPSIZE))
539 else if (index & ATTR_XS)
541 else if (index & ATTR_XD)
543 else if (index & ATTR_OPSIZE)
553 o << " /* " << index << " */";
559 o.indent(i * 2) << "};" << "\n";
562 void DisassemblerTables::emitContextDecisions(raw_ostream &o1,
567 emitContextDecision(o1, o2, i1, i2, *Tables[0], ONEBYTE_STR);
568 emitContextDecision(o1, o2, i1, i2, *Tables[1], TWOBYTE_STR);
569 emitContextDecision(o1, o2, i1, i2, *Tables[2], THREEBYTE38_STR);
570 emitContextDecision(o1, o2, i1, i2, *Tables[3], THREEBYTE3A_STR);
571 emitContextDecision(o1, o2, i1, i2, *Tables[4], THREEBYTEA6_STR);
572 emitContextDecision(o1, o2, i1, i2, *Tables[5], THREEBYTEA7_STR);
575 void DisassemblerTables::emit(raw_ostream &o) const {
582 raw_string_ostream o1(s1);
583 raw_string_ostream o2(s2);
585 emitInstructionInfo(o, i2);
588 emitContextTable(o, i2);
591 emitEmptyTable(o1, i1);
592 emitContextDecisions(o1, o2, i1, i2);
601 void DisassemblerTables::setTableFields(ModRMDecision &decision,
602 const ModRMFilter &filter,
607 for (index = 0; index < 256; ++index) {
608 if (filter.accepts(index)) {
609 if (decision.instructionIDs[index] == uid)
612 if (decision.instructionIDs[index] != 0) {
613 InstructionSpecifier &newInfo =
614 InstructionSpecifiers[uid];
615 InstructionSpecifier &previousInfo =
616 InstructionSpecifiers[decision.instructionIDs[index]];
619 continue; // filtered instructions get lowest priority
621 if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
622 newInfo.name == "XCHG32ar" ||
623 newInfo.name == "XCHG32ar64" ||
624 newInfo.name == "XCHG64ar"))
625 continue; // special case for XCHG*ar and NOOP
627 if (outranks(previousInfo.insnContext, newInfo.insnContext))
630 if (previousInfo.insnContext == newInfo.insnContext &&
631 !previousInfo.filtered) {
632 errs() << "Error: Primary decode conflict: ";
633 errs() << newInfo.name << " would overwrite " << previousInfo.name;
635 errs() << "ModRM " << index << "\n";
636 errs() << "Opcode " << (uint16_t)opcode << "\n";
637 errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
642 decision.instructionIDs[index] = uid;
647 void DisassemblerTables::setTableFields(OpcodeType type,
648 InstructionContext insnContext,
650 const ModRMFilter &filter,
656 ContextDecision &decision = *Tables[type];
658 for (index = 0; index < IC_max; ++index) {
659 if (is32bit && inheritsFrom((InstructionContext)index, IC_64BIT))
662 if (inheritsFrom((InstructionContext)index,
663 InstructionSpecifiers[uid].insnContext, ignoresVEX_L))
664 setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],