1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class wrap target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes throw exceptions on error conditions.
15 //===----------------------------------------------------------------------===//
17 #include "CodeGenTarget.h"
21 /// getValueType - Return the MCV::ValueType that the specified TableGen record
23 MVT::ValueType llvm::getValueType(Record *Rec) {
24 return (MVT::ValueType)Rec->getValueAsInt("Value");
27 std::string llvm::getName(MVT::ValueType T) {
29 case MVT::Other: return "UNKNOWN";
30 case MVT::i1: return "i1";
31 case MVT::i8: return "i8";
32 case MVT::i16: return "i16";
33 case MVT::i32: return "i32";
34 case MVT::i64: return "i64";
35 case MVT::i128: return "i128";
36 case MVT::f32: return "f32";
37 case MVT::f64: return "f64";
38 case MVT::f80: return "f80";
39 case MVT::f128: return "f128";
40 case MVT::isVoid:return "void";
41 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
45 std::string llvm::getEnumName(MVT::ValueType T) {
47 case MVT::Other: return "Other";
48 case MVT::i1: return "i1";
49 case MVT::i8: return "i8";
50 case MVT::i16: return "i16";
51 case MVT::i32: return "i32";
52 case MVT::i64: return "i64";
53 case MVT::i128: return "i128";
54 case MVT::f32: return "f32";
55 case MVT::f64: return "f64";
56 case MVT::f80: return "f80";
57 case MVT::f128: return "f128";
58 case MVT::isVoid:return "isVoid";
59 default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
64 std::ostream &llvm::operator<<(std::ostream &OS, MVT::ValueType T) {
65 return OS << getName(T);
69 /// getTarget - Return the current instance of the Target class.
71 CodeGenTarget::CodeGenTarget() : PointerType(MVT::Other) {
72 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
73 if (Targets.size() == 0)
74 throw std::string("ERROR: No 'Target' subclasses defined!");
75 if (Targets.size() != 1)
76 throw std::string("ERROR: Multiple subclasses of Target defined!");
77 TargetRec = Targets[0];
79 // Read in all of the CalleeSavedRegisters...
80 ListInit *LI = TargetRec->getValueAsListInit("CalleeSavedRegisters");
81 for (unsigned i = 0, e = LI->getSize(); i != e; ++i)
82 if (DefInit *DI = dynamic_cast<DefInit*>(LI->getElement(i)))
83 CalleeSavedRegisters.push_back(DI->getDef());
85 throw "Target: " + TargetRec->getName() +
86 " expected register definition in CalleeSavedRegisters list!";
88 PointerType = getValueType(TargetRec->getValueAsDef("PointerType"));
92 const std::string &CodeGenTarget::getName() const {
93 return TargetRec->getName();
96 Record *CodeGenTarget::getInstructionSet() const {
97 return TargetRec->getValueAsDef("InstructionSet");
100 /// getAsmWriter - Return the AssemblyWriter definition for this target.
102 Record *CodeGenTarget::getAsmWriter() const {
103 return TargetRec->getValueAsDef("AssemblyWriter");
106 void CodeGenTarget::ReadRegisters() const {
107 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
109 throw std::string("No 'Register' subclasses defined!");
111 Registers.reserve(Regs.size());
112 Registers.assign(Regs.begin(), Regs.end());
115 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
116 DeclaredSpillSize = R->getValueAsInt("SpillSize");
117 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
120 const std::string &CodeGenRegister::getName() const {
121 return TheDef->getName();
124 void CodeGenTarget::ReadRegisterClasses() const {
125 std::vector<Record*> RegClasses =
126 Records.getAllDerivedDefinitions("RegisterClass");
127 if (RegClasses.empty())
128 throw std::string("No 'RegisterClass' subclasses defined!");
130 RegisterClasses.reserve(RegClasses.size());
131 RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
134 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
135 SpillSize = R->getValueAsInt("Size");
136 SpillAlignment = R->getValueAsInt("Alignment");
138 if (CodeInit *CI = dynamic_cast<CodeInit*>(R->getValueInit("Methods")))
139 MethodDefinitions = CI->getValue();
141 throw "Expected 'code' fragment for 'Methods' value in register class '"+
144 ListInit *RegList = R->getValueAsListInit("MemberList");
145 for (unsigned i = 0, e = RegList->getSize(); i != e; ++i) {
146 DefInit *RegDef = dynamic_cast<DefInit*>(RegList->getElement(i));
147 if (!RegDef) throw "Register class member is not a record!";
148 Record *Reg = RegDef->getDef();
150 if (!Reg->isSubClassOf("Register"))
151 throw "Register Class member '" + Reg->getName() +
152 "' does not derive from the Register class!";
153 Elements.push_back(Reg);
157 const std::string &CodeGenRegisterClass::getName() const {
158 return TheDef->getName();
163 void CodeGenTarget::ReadInstructions() const {
164 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
167 throw std::string("No 'Instruction' subclasses defined!");
169 std::string InstFormatName =
170 getAsmWriter()->getValueAsString("InstFormatName");
172 for (unsigned i = 0, e = Insts.size(); i != e; ++i) {
173 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName);
174 Instructions.insert(std::make_pair(Insts[i]->getName(),
175 CodeGenInstruction(Insts[i], AsmStr)));
179 /// getPHIInstruction - Return the designated PHI instruction.
180 const CodeGenInstruction &CodeGenTarget::getPHIInstruction() const {
181 Record *PHI = getInstructionSet()->getValueAsDef("PHIInst");
182 std::map<std::string, CodeGenInstruction>::const_iterator I =
183 getInstructions().find(PHI->getName());
184 if (I == Instructions.end())
185 throw "Could not find PHI instruction named '" + PHI->getName() + "'!";
189 CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
190 : TheDef(R), AsmString(AsmStr) {
191 Name = R->getValueAsString("Name");
192 Namespace = R->getValueAsString("Namespace");
194 isReturn = R->getValueAsBit("isReturn");
195 isBranch = R->getValueAsBit("isBranch");
196 isBarrier = R->getValueAsBit("isBarrier");
197 isCall = R->getValueAsBit("isCall");
198 isTwoAddress = R->getValueAsBit("isTwoAddress");
199 isTerminator = R->getValueAsBit("isTerminator");
202 DagInit *DI = R->getValueAsDag("OperandList");
204 unsigned MIOperandNo = 0;
205 for (unsigned i = 0, e = DI->getNumArgs(); i != e; ++i)
206 if (DefInit *Arg = dynamic_cast<DefInit*>(DI->getArg(i))) {
207 Record *Rec = Arg->getDef();
209 std::string PrintMethod = "printOperand";
211 if (Rec->isSubClassOf("RegisterClass"))
212 Ty = getValueType(Rec->getValueAsDef("RegType"));
213 else if (Rec->isSubClassOf("Operand")) {
214 Ty = getValueType(Rec->getValueAsDef("Type"));
215 PrintMethod = Rec->getValueAsString("PrintMethod");
216 NumOps = Rec->getValueAsInt("NumMIOperands");
218 throw "Unknown operand class '" + Rec->getName() +
219 "' in instruction '" + R->getName() + "' instruction!";
221 OperandList.push_back(OperandInfo(Rec, Ty, DI->getArgName(i),
222 PrintMethod, MIOperandNo));
223 MIOperandNo += NumOps;
225 throw "Illegal operand for the '" + R->getName() + "' instruction!";
228 // Error parsing operands list, just ignore it.
236 /// getOperandNamed - Return the index of the operand with the specified
237 /// non-empty name. If the instruction does not have an operand with the
238 /// specified name, throw an exception.
239 unsigned CodeGenInstruction::getOperandNamed(const std::string &Name) const {
240 assert(!Name.empty() && "Cannot search for operand with no name!");
241 for (unsigned i = 0, e = OperandList.size(); i != e; ++i)
242 if (OperandList[i].Name == Name) return i;
243 throw "Instruction '" + TheDef->getName() +
244 "' does not have an operand named '$" + Name + "'!";