1 //===- CodeEmitterGen.cpp - Code Emitter Generator ------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // CodeEmitterGen uses the descriptions of instructions and their fields to
11 // construct an automated code emitter: a function that, given a MachineInstr,
12 // returns the (currently, 32-bit unsigned) value of the instruction.
14 //===----------------------------------------------------------------------===//
16 #include "CodeEmitterGen.h"
18 #include "Support/Debug.h"
21 void CodeEmitterGen::run(std::ostream &o) {
22 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
24 EmitSourceFileHeader("Machine Code Emitter", o);
26 std::string Namespace = "V9::";
27 std::string ClassName = "SparcV9CodeEmitter::";
29 //const std::string &Namespace = Inst->getValue("Namespace")->getName();
30 o << "unsigned " << ClassName
31 << "getBinaryCodeForInstr(MachineInstr &MI) {\n"
32 << " unsigned Value = 0;\n"
33 << " DEBUG(std::cerr << MI);\n"
34 << " switch (MI.getOpcode()) {\n";
35 for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
38 o << " case " << Namespace << R->getName() << ": {\n"
39 << " DEBUG(std::cerr << \"Emitting " << R->getName() << "\\n\");\n";
41 BitsInit *BI = R->getValueAsBitsInit("Inst");
44 const std::vector<RecordVal> &Vals = R->getValues();
46 DEBUG(o << " // prefilling: ");
47 // Start by filling in fixed values...
48 for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
49 if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1))) {
50 Value |= B->getValue() << (e-i-1);
51 DEBUG(o << B->getValue());
58 DEBUG(o << " // " << *R->getValue("Inst") << "\n");
59 o << " Value = " << Value << "U;\n\n";
61 // Loop over all of the fields in the instruction determining which are the
62 // operands to the instruction.
65 std::map<std::string, unsigned> OpOrder;
66 std::map<std::string, bool> OpContinuous;
67 for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
68 if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) {
69 // Is the operand continuous? If so, we can just mask and OR it in
70 // instead of doing it bit-by-bit, saving a lot in runtime cost.
71 const BitsInit *InstInit = BI;
72 int beginBitInVar = -1, endBitInVar = -1;
73 int beginBitInInst = -1, endBitInInst = -1;
74 bool continuous = true;
76 for (int bit = InstInit->getNumBits()-1; bit >= 0; --bit) {
78 dynamic_cast<VarBitInit*>(InstInit->getBit(bit))) {
79 TypedInit *TI = VBI->getVariable();
80 if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
81 // only process the current variable
82 if (VI->getName() != Vals[i].getName())
85 if (beginBitInVar == -1)
86 beginBitInVar = VBI->getBitNum();
88 if (endBitInVar == -1)
89 endBitInVar = VBI->getBitNum();
91 if (endBitInVar == (int)VBI->getBitNum() + 1)
92 endBitInVar = VBI->getBitNum();
99 if (beginBitInInst == -1)
100 beginBitInInst = bit;
101 if (endBitInInst == -1)
104 if (endBitInInst == bit + 1)
112 // maintain same distance between bits in field and bits in
113 // instruction. if the relative distances stay the same
115 if (beginBitInVar - (int)VBI->getBitNum() !=
116 beginBitInInst - bit) {
124 // If we have found no bit in "Inst" which comes from this field, then
125 // this is not an operand!!
126 if (beginBitInInst != -1) {
127 o << " // op" << op << ": " << Vals[i].getName() << "\n"
128 << " int64_t op" << op
129 <<" = getMachineOpValue(MI, MI.getOperand("<<op<<"));\n";
130 //<< " MachineOperand &op" << op <<" = MI.getOperand("<<op<<");\n";
131 OpOrder[Vals[i].getName()] = op++;
133 DEBUG(o << " // Var: begin = " << beginBitInVar
134 << ", end = " << endBitInVar
135 << "; Inst: begin = " << beginBitInInst
136 << ", end = " << endBitInInst << "\n");
139 DEBUG(o << " // continuous: op" << OpOrder[Vals[i].getName()]
142 // Mask off the right bits
143 // Low mask (ie. shift, if necessary)
144 assert(endBitInVar >= 0 && "Negative shift amount in masking!");
145 if (endBitInVar != 0) {
146 o << " op" << OpOrder[Vals[i].getName()]
147 << " >>= " << endBitInVar << ";\n";
148 beginBitInVar -= endBitInVar;
153 o << " op" << OpOrder[Vals[i].getName()]
154 << " &= (1<<" << beginBitInVar+1 << ") - 1;\n";
156 // Shift the value to the correct place (according to place in inst)
157 assert(endBitInInst >= 0 && "Negative shift amount!");
158 if (endBitInInst != 0)
159 o << " op" << OpOrder[Vals[i].getName()]
160 << " <<= " << endBitInInst << ";\n";
162 // Just OR in the result
163 o << " Value |= op" << OpOrder[Vals[i].getName()] << ";\n";
166 // otherwise, will be taken care of in the loop below using this
168 OpContinuous[Vals[i].getName()] = continuous;
173 for (unsigned f = 0, e = Vals.size(); f != e; ++f) {
174 if (Vals[f].getPrefix()) {
175 BitsInit *FieldInitializer = (BitsInit*)Vals[f].getValue();
177 // Scan through the field looking for bit initializers of the current
179 for (int i = FieldInitializer->getNumBits()-1; i >= 0; --i) {
180 if (BitInit *BI = dynamic_cast<BitInit*>(FieldInitializer->getBit(i)))
182 DEBUG(o << " // bit init: f: " << f << ", i: " << i << "\n");
183 } else if (UnsetInit *UI =
184 dynamic_cast<UnsetInit*>(FieldInitializer->getBit(i))) {
185 DEBUG(o << " // unset init: f: " << f << ", i: " << i << "\n");
186 } else if (VarBitInit *VBI =
187 dynamic_cast<VarBitInit*>(FieldInitializer->getBit(i))) {
188 TypedInit *TI = VBI->getVariable();
189 if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
190 // If the bits of the field are laid out consecutively in the
191 // instruction, then instead of separately ORing in bits, just
192 // mask and shift the entire field for efficiency.
193 if (OpContinuous[VI->getName()]) {
194 // already taken care of in the loop above, thus there is no
195 // need to individually OR in the bits
197 // for debugging, output the regular version anyway, commented
198 DEBUG(o << " // Value |= getValueBit(op"
199 << OpOrder[VI->getName()] << ", " << VBI->getBitNum()
200 << ")" << " << " << i << ";\n");
202 o << " Value |= getValueBit(op" << OpOrder[VI->getName()]
203 << ", " << VBI->getBitNum()
204 << ")" << " << " << i << ";\n";
206 } else if (FieldInit *FI = dynamic_cast<FieldInit*>(TI)) {
207 // FIXME: implement this!
208 o << "FIELD INIT not implemented yet!\n";
210 o << "Error: UNIMPLEMENTED\n";
222 << " std::cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
225 << " return Value;\n"
228 EmitSourceFileTail(o);