1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a target specifier matcher for converting parsed
11 // assembly operands in the MCInst structures. It also emits a matcher for
12 // custom operand parsing.
14 // Converting assembly operands into MCInst structures
15 // ---------------------------------------------------
17 // The input to the target specific matcher is a list of literal tokens and
18 // operands. The target specific parser should generally eliminate any syntax
19 // which is not relevant for matching; for example, comma tokens should have
20 // already been consumed and eliminated by the parser. Most instructions will
21 // end up with a single literal token (the instruction name) and some number of
24 // Some example inputs, for X86:
25 // 'addl' (immediate ...) (register ...)
26 // 'add' (immediate ...) (memory ...)
29 // The assembly matcher is responsible for converting this input into a precise
30 // machine instruction (i.e., an instruction with a well defined encoding). This
31 // mapping has several properties which complicate matching:
33 // - It may be ambiguous; many architectures can legally encode particular
34 // variants of an instruction in different ways (for example, using a smaller
35 // encoding for small immediates). Such ambiguities should never be
36 // arbitrarily resolved by the assembler, the assembler is always responsible
37 // for choosing the "best" available instruction.
39 // - It may depend on the subtarget or the assembler context. Instructions
40 // which are invalid for the current mode, but otherwise unambiguous (e.g.,
41 // an SSE instruction in a file being assembled for i486) should be accepted
42 // and rejected by the assembler front end. However, if the proper encoding
43 // for an instruction is dependent on the assembler context then the matcher
44 // is responsible for selecting the correct machine instruction for the
47 // The core matching algorithm attempts to exploit the regularity in most
48 // instruction sets to quickly determine the set of possibly matching
49 // instructions, and the simplify the generated code. Additionally, this helps
50 // to ensure that the ambiguities are intentionally resolved by the user.
52 // The matching is divided into two distinct phases:
54 // 1. Classification: Each operand is mapped to the unique set which (a)
55 // contains it, and (b) is the largest such subset for which a single
56 // instruction could match all members.
58 // For register classes, we can generate these subgroups automatically. For
59 // arbitrary operands, we expect the user to define the classes and their
60 // relations to one another (for example, 8-bit signed immediates as a
61 // subset of 32-bit immediates).
63 // By partitioning the operands in this way, we guarantee that for any
64 // tuple of classes, any single instruction must match either all or none
65 // of the sets of operands which could classify to that tuple.
67 // In addition, the subset relation amongst classes induces a partial order
68 // on such tuples, which we use to resolve ambiguities.
70 // 2. The input can now be treated as a tuple of classes (static tokens are
71 // simple singleton sets). Each such tuple should generally map to a single
72 // instruction (we currently ignore cases where this isn't true, whee!!!),
73 // which we can emit a simple matcher for.
75 // Custom Operand Parsing
76 // ----------------------
78 // Some targets need a custom way to parse operands, some specific instructions
79 // can contain arguments that can represent processor flags and other kinds of
80 // identifiers that need to be mapped to specific valeus in the final encoded
81 // instructions. The target specific custom operand parsing works in the
84 // 1. A operand match table is built, each entry contains a mnemonic, an
85 // operand class, a mask for all operand positions for that same
86 // class/mnemonic and target features to be checked while trying to match.
88 // 2. The operand matcher will try every possible entry with the same
89 // mnemonic and will check if the target feature for this mnemonic also
90 // matches. After that, if the operand to be matched has its index
91 // present in the mask, a successful match occurs. Otherwise, fallback
92 // to the regular operand parsing.
94 // 3. For a match success, each operand class that has a 'ParserMethod'
95 // becomes part of a switch from where the custom method is called.
97 //===----------------------------------------------------------------------===//
99 #include "AsmMatcherEmitter.h"
100 #include "CodeGenTarget.h"
101 #include "StringMatcher.h"
102 #include "llvm/ADT/OwningPtr.h"
103 #include "llvm/ADT/PointerUnion.h"
104 #include "llvm/ADT/SmallPtrSet.h"
105 #include "llvm/ADT/SmallVector.h"
106 #include "llvm/ADT/STLExtras.h"
107 #include "llvm/ADT/StringExtras.h"
108 #include "llvm/Support/CommandLine.h"
109 #include "llvm/Support/Debug.h"
110 #include "llvm/TableGen/Error.h"
111 #include "llvm/TableGen/Record.h"
114 using namespace llvm;
116 static cl::opt<std::string>
117 MatchPrefix("match-prefix", cl::init(""),
118 cl::desc("Only match instructions with the given prefix"));
121 class AsmMatcherInfo;
122 struct SubtargetFeatureInfo;
124 /// ClassInfo - Helper class for storing the information about a particular
125 /// class of operands which can be matched.
128 /// Invalid kind, for use as a sentinel value.
131 /// The class for a particular token.
134 /// The (first) register class, subsequent register classes are
135 /// RegisterClass0+1, and so on.
138 /// The (first) user defined class, subsequent user defined classes are
139 /// UserClass0+1, and so on.
143 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 +
144 /// N) for the Nth user defined class.
147 /// SuperClasses - The super classes of this class. Note that for simplicities
148 /// sake user operands only record their immediate super class, while register
149 /// operands include all superclasses.
150 std::vector<ClassInfo*> SuperClasses;
152 /// Name - The full class name, suitable for use in an enum.
155 /// ClassName - The unadorned generic name for this class (e.g., Token).
156 std::string ClassName;
158 /// ValueName - The name of the value this class represents; for a token this
159 /// is the literal token string, for an operand it is the TableGen class (or
160 /// empty if this is a derived class).
161 std::string ValueName;
163 /// PredicateMethod - The name of the operand method to test whether the
164 /// operand matches this class; this is not valid for Token or register kinds.
165 std::string PredicateMethod;
167 /// RenderMethod - The name of the operand method to add this operand to an
168 /// MCInst; this is not valid for Token or register kinds.
169 std::string RenderMethod;
171 /// ParserMethod - The name of the operand method to do a target specific
172 /// parsing on the operand.
173 std::string ParserMethod;
175 /// For register classes, the records for all the registers in this class.
176 std::set<Record*> Registers;
179 /// isRegisterClass() - Check if this is a register class.
180 bool isRegisterClass() const {
181 return Kind >= RegisterClass0 && Kind < UserClass0;
184 /// isUserClass() - Check if this is a user defined class.
185 bool isUserClass() const {
186 return Kind >= UserClass0;
189 /// isRelatedTo - Check whether this class is "related" to \arg RHS. Classes
190 /// are related if they are in the same class hierarchy.
191 bool isRelatedTo(const ClassInfo &RHS) const {
192 // Tokens are only related to tokens.
193 if (Kind == Token || RHS.Kind == Token)
194 return Kind == Token && RHS.Kind == Token;
196 // Registers classes are only related to registers classes, and only if
197 // their intersection is non-empty.
198 if (isRegisterClass() || RHS.isRegisterClass()) {
199 if (!isRegisterClass() || !RHS.isRegisterClass())
202 std::set<Record*> Tmp;
203 std::insert_iterator< std::set<Record*> > II(Tmp, Tmp.begin());
204 std::set_intersection(Registers.begin(), Registers.end(),
205 RHS.Registers.begin(), RHS.Registers.end(),
211 // Otherwise we have two users operands; they are related if they are in the
212 // same class hierarchy.
214 // FIXME: This is an oversimplification, they should only be related if they
215 // intersect, however we don't have that information.
216 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!");
217 const ClassInfo *Root = this;
218 while (!Root->SuperClasses.empty())
219 Root = Root->SuperClasses.front();
221 const ClassInfo *RHSRoot = &RHS;
222 while (!RHSRoot->SuperClasses.empty())
223 RHSRoot = RHSRoot->SuperClasses.front();
225 return Root == RHSRoot;
228 /// isSubsetOf - Test whether this class is a subset of \arg RHS;
229 bool isSubsetOf(const ClassInfo &RHS) const {
230 // This is a subset of RHS if it is the same class...
234 // ... or if any of its super classes are a subset of RHS.
235 for (std::vector<ClassInfo*>::const_iterator it = SuperClasses.begin(),
236 ie = SuperClasses.end(); it != ie; ++it)
237 if ((*it)->isSubsetOf(RHS))
243 /// operator< - Compare two classes.
244 bool operator<(const ClassInfo &RHS) const {
248 // Unrelated classes can be ordered by kind.
249 if (!isRelatedTo(RHS))
250 return Kind < RHS.Kind;
254 assert(0 && "Invalid kind!");
256 // Tokens are comparable by value.
258 // FIXME: Compare by enum value.
259 return ValueName < RHS.ValueName;
262 // This class precedes the RHS if it is a proper subset of the RHS.
265 if (RHS.isSubsetOf(*this))
268 // Otherwise, order by name to ensure we have a total ordering.
269 return ValueName < RHS.ValueName;
274 /// MatchableInfo - Helper class for storing the necessary information for an
275 /// instruction or alias which is capable of being matched.
276 struct MatchableInfo {
278 /// Token - This is the token that the operand came from.
281 /// The unique class instance this operand should match.
284 /// The operand name this is, if anything.
287 /// The suboperand index within SrcOpName, or -1 for the entire operand.
290 explicit AsmOperand(StringRef T) : Token(T), Class(0), SubOpIdx(-1) {}
293 /// ResOperand - This represents a single operand in the result instruction
294 /// generated by the match. In cases (like addressing modes) where a single
295 /// assembler operand expands to multiple MCOperands, this represents the
296 /// single assembler operand, not the MCOperand.
299 /// RenderAsmOperand - This represents an operand result that is
300 /// generated by calling the render method on the assembly operand. The
301 /// corresponding AsmOperand is specified by AsmOperandNum.
304 /// TiedOperand - This represents a result operand that is a duplicate of
305 /// a previous result operand.
308 /// ImmOperand - This represents an immediate value that is dumped into
312 /// RegOperand - This represents a fixed register that is dumped in.
317 /// This is the operand # in the AsmOperands list that this should be
319 unsigned AsmOperandNum;
321 /// TiedOperandNum - This is the (earlier) result operand that should be
323 unsigned TiedOperandNum;
325 /// ImmVal - This is the immediate value added to the instruction.
328 /// Register - This is the register record.
332 /// MINumOperands - The number of MCInst operands populated by this
334 unsigned MINumOperands;
336 static ResOperand getRenderedOp(unsigned AsmOpNum, unsigned NumOperands) {
338 X.Kind = RenderAsmOperand;
339 X.AsmOperandNum = AsmOpNum;
340 X.MINumOperands = NumOperands;
344 static ResOperand getTiedOp(unsigned TiedOperandNum) {
346 X.Kind = TiedOperand;
347 X.TiedOperandNum = TiedOperandNum;
352 static ResOperand getImmOp(int64_t Val) {
360 static ResOperand getRegOp(Record *Reg) {
369 /// TheDef - This is the definition of the instruction or InstAlias that this
370 /// matchable came from.
371 Record *const TheDef;
373 /// DefRec - This is the definition that it came from.
374 PointerUnion<const CodeGenInstruction*, const CodeGenInstAlias*> DefRec;
376 const CodeGenInstruction *getResultInst() const {
377 if (DefRec.is<const CodeGenInstruction*>())
378 return DefRec.get<const CodeGenInstruction*>();
379 return DefRec.get<const CodeGenInstAlias*>()->ResultInst;
382 /// ResOperands - This is the operand list that should be built for the result
384 std::vector<ResOperand> ResOperands;
386 /// AsmString - The assembly string for this instruction (with variants
387 /// removed), e.g. "movsx $src, $dst".
388 std::string AsmString;
390 /// Mnemonic - This is the first token of the matched instruction, its
394 /// AsmOperands - The textual operands that this instruction matches,
395 /// annotated with a class and where in the OperandList they were defined.
396 /// This directly corresponds to the tokenized AsmString after the mnemonic is
398 SmallVector<AsmOperand, 4> AsmOperands;
400 /// Predicates - The required subtarget features to match this instruction.
401 SmallVector<SubtargetFeatureInfo*, 4> RequiredFeatures;
403 /// ConversionFnKind - The enum value which is passed to the generated
404 /// ConvertToMCInst to convert parsed operands into an MCInst for this
406 std::string ConversionFnKind;
408 MatchableInfo(const CodeGenInstruction &CGI)
409 : TheDef(CGI.TheDef), DefRec(&CGI), AsmString(CGI.AsmString) {
412 MatchableInfo(const CodeGenInstAlias *Alias)
413 : TheDef(Alias->TheDef), DefRec(Alias), AsmString(Alias->AsmString) {
416 void Initialize(const AsmMatcherInfo &Info,
417 SmallPtrSet<Record*, 16> &SingletonRegisters);
419 /// Validate - Return true if this matchable is a valid thing to match against
420 /// and perform a bunch of validity checking.
421 bool Validate(StringRef CommentDelimiter, bool Hack) const;
423 /// getSingletonRegisterForAsmOperand - If the specified token is a singleton
424 /// register, return the Record for it, otherwise return null.
425 Record *getSingletonRegisterForAsmOperand(unsigned i,
426 const AsmMatcherInfo &Info) const;
428 /// FindAsmOperand - Find the AsmOperand with the specified name and
429 /// suboperand index.
430 int FindAsmOperand(StringRef N, int SubOpIdx) const {
431 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
432 if (N == AsmOperands[i].SrcOpName &&
433 SubOpIdx == AsmOperands[i].SubOpIdx)
438 /// FindAsmOperandNamed - Find the first AsmOperand with the specified name.
439 /// This does not check the suboperand index.
440 int FindAsmOperandNamed(StringRef N) const {
441 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
442 if (N == AsmOperands[i].SrcOpName)
447 void BuildInstructionResultOperands();
448 void BuildAliasResultOperands();
450 /// operator< - Compare two matchables.
451 bool operator<(const MatchableInfo &RHS) const {
452 // The primary comparator is the instruction mnemonic.
453 if (Mnemonic != RHS.Mnemonic)
454 return Mnemonic < RHS.Mnemonic;
456 if (AsmOperands.size() != RHS.AsmOperands.size())
457 return AsmOperands.size() < RHS.AsmOperands.size();
459 // Compare lexicographically by operand. The matcher validates that other
460 // orderings wouldn't be ambiguous using \see CouldMatchAmbiguouslyWith().
461 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
462 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
464 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
471 /// CouldMatchAmbiguouslyWith - Check whether this matchable could
472 /// ambiguously match the same set of operands as \arg RHS (without being a
473 /// strictly superior match).
474 bool CouldMatchAmbiguouslyWith(const MatchableInfo &RHS) {
475 // The primary comparator is the instruction mnemonic.
476 if (Mnemonic != RHS.Mnemonic)
479 // The number of operands is unambiguous.
480 if (AsmOperands.size() != RHS.AsmOperands.size())
483 // Otherwise, make sure the ordering of the two instructions is unambiguous
484 // by checking that either (a) a token or operand kind discriminates them,
485 // or (b) the ordering among equivalent kinds is consistent.
487 // Tokens and operand kinds are unambiguous (assuming a correct target
489 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
490 if (AsmOperands[i].Class->Kind != RHS.AsmOperands[i].Class->Kind ||
491 AsmOperands[i].Class->Kind == ClassInfo::Token)
492 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class ||
493 *RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
496 // Otherwise, this operand could commute if all operands are equivalent, or
497 // there is a pair of operands that compare less than and a pair that
498 // compare greater than.
499 bool HasLT = false, HasGT = false;
500 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
501 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
503 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
507 return !(HasLT ^ HasGT);
513 void TokenizeAsmString(const AsmMatcherInfo &Info);
516 /// SubtargetFeatureInfo - Helper class for storing information on a subtarget
517 /// feature which participates in instruction matching.
518 struct SubtargetFeatureInfo {
519 /// \brief The predicate record for this feature.
522 /// \brief An unique index assigned to represent this feature.
525 SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {}
527 /// \brief The name of the enumerated constant identifying this feature.
528 std::string getEnumName() const {
529 return "Feature_" + TheDef->getName();
533 struct OperandMatchEntry {
534 unsigned OperandMask;
538 static OperandMatchEntry Create(MatchableInfo* mi, ClassInfo *ci,
541 X.OperandMask = opMask;
549 class AsmMatcherInfo {
552 RecordKeeper &Records;
554 /// The tablegen AsmParser record.
557 /// Target - The target information.
558 CodeGenTarget &Target;
560 /// The AsmParser "RegisterPrefix" value.
561 std::string RegisterPrefix;
563 /// The classes which are needed for matching.
564 std::vector<ClassInfo*> Classes;
566 /// The information on the matchables to match.
567 std::vector<MatchableInfo*> Matchables;
569 /// Info for custom matching operands by user defined methods.
570 std::vector<OperandMatchEntry> OperandMatchInfo;
572 /// Map of Register records to their class information.
573 std::map<Record*, ClassInfo*> RegisterClasses;
575 /// Map of Predicate records to their subtarget information.
576 std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures;
579 /// Map of token to class information which has already been constructed.
580 std::map<std::string, ClassInfo*> TokenClasses;
582 /// Map of RegisterClass records to their class information.
583 std::map<Record*, ClassInfo*> RegisterClassClasses;
585 /// Map of AsmOperandClass records to their class information.
586 std::map<Record*, ClassInfo*> AsmOperandClasses;
589 /// getTokenClass - Lookup or create the class for the given token.
590 ClassInfo *getTokenClass(StringRef Token);
592 /// getOperandClass - Lookup or create the class for the given operand.
593 ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI,
595 ClassInfo *getOperandClass(Record *Rec, int SubOpIdx);
597 /// BuildRegisterClasses - Build the ClassInfo* instances for register
599 void BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters);
601 /// BuildOperandClasses - Build the ClassInfo* instances for user defined
603 void BuildOperandClasses();
605 void BuildInstructionOperandReference(MatchableInfo *II, StringRef OpName,
607 void BuildAliasOperandReference(MatchableInfo *II, StringRef OpName,
608 MatchableInfo::AsmOperand &Op);
611 AsmMatcherInfo(Record *AsmParser,
612 CodeGenTarget &Target,
613 RecordKeeper &Records);
615 /// BuildInfo - Construct the various tables used during matching.
618 /// BuildOperandMatchInfo - Build the necessary information to handle user
619 /// defined operand parsing methods.
620 void BuildOperandMatchInfo();
622 /// getSubtargetFeature - Lookup or create the subtarget feature info for the
624 SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
625 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
626 std::map<Record*, SubtargetFeatureInfo*>::const_iterator I =
627 SubtargetFeatures.find(Def);
628 return I == SubtargetFeatures.end() ? 0 : I->second;
631 RecordKeeper &getRecords() const {
638 void MatchableInfo::dump() {
639 errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n";
641 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
642 AsmOperand &Op = AsmOperands[i];
643 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - ";
644 errs() << '\"' << Op.Token << "\"\n";
648 void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
649 SmallPtrSet<Record*, 16> &SingletonRegisters) {
650 // TODO: Eventually support asmparser for Variant != 0.
651 AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0);
653 TokenizeAsmString(Info);
655 // Compute the require features.
656 std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates");
657 for (unsigned i = 0, e = Predicates.size(); i != e; ++i)
658 if (SubtargetFeatureInfo *Feature =
659 Info.getSubtargetFeature(Predicates[i]))
660 RequiredFeatures.push_back(Feature);
662 // Collect singleton registers, if used.
663 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
664 if (Record *Reg = getSingletonRegisterForAsmOperand(i, Info))
665 SingletonRegisters.insert(Reg);
669 /// TokenizeAsmString - Tokenize a simplified assembly string.
670 void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
671 StringRef String = AsmString;
674 for (unsigned i = 0, e = String.size(); i != e; ++i) {
684 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
687 if (!isspace(String[i]) && String[i] != ',')
688 AsmOperands.push_back(AsmOperand(String.substr(i, 1)));
694 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
698 assert(i != String.size() && "Invalid quoted character");
699 AsmOperands.push_back(AsmOperand(String.substr(i, 1)));
705 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
709 // If this isn't "${", treat like a normal token.
710 if (i + 1 == String.size() || String[i + 1] != '{') {
715 StringRef::iterator End = std::find(String.begin() + i, String.end(),'}');
716 assert(End != String.end() && "Missing brace in operand reference!");
717 size_t EndPos = End - String.begin();
718 AsmOperands.push_back(AsmOperand(String.slice(i, EndPos+1)));
726 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
735 if (InTok && Prev != String.size())
736 AsmOperands.push_back(AsmOperand(String.substr(Prev)));
738 // The first token of the instruction is the mnemonic, which must be a
739 // simple string, not a $foo variable or a singleton register.
740 if (AsmOperands.empty())
741 throw TGError(TheDef->getLoc(),
742 "Instruction '" + TheDef->getName() + "' has no tokens");
743 Mnemonic = AsmOperands[0].Token;
744 if (Mnemonic[0] == '$' || getSingletonRegisterForAsmOperand(0, Info))
745 throw TGError(TheDef->getLoc(),
746 "Invalid instruction mnemonic '" + Mnemonic.str() + "'!");
748 // Remove the first operand, it is tracked in the mnemonic field.
749 AsmOperands.erase(AsmOperands.begin());
752 bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
753 // Reject matchables with no .s string.
754 if (AsmString.empty())
755 throw TGError(TheDef->getLoc(), "instruction with empty asm string");
757 // Reject any matchables with a newline in them, they should be marked
758 // isCodeGenOnly if they are pseudo instructions.
759 if (AsmString.find('\n') != std::string::npos)
760 throw TGError(TheDef->getLoc(),
761 "multiline instruction is not valid for the asmparser, "
762 "mark it isCodeGenOnly");
764 // Remove comments from the asm string. We know that the asmstring only
766 if (!CommentDelimiter.empty() &&
767 StringRef(AsmString).find(CommentDelimiter) != StringRef::npos)
768 throw TGError(TheDef->getLoc(),
769 "asmstring for instruction has comment character in it, "
770 "mark it isCodeGenOnly");
772 // Reject matchables with operand modifiers, these aren't something we can
773 // handle, the target should be refactored to use operands instead of
776 // Also, check for instructions which reference the operand multiple times;
777 // this implies a constraint we would not honor.
778 std::set<std::string> OperandNames;
779 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
780 StringRef Tok = AsmOperands[i].Token;
781 if (Tok[0] == '$' && Tok.find(':') != StringRef::npos)
782 throw TGError(TheDef->getLoc(),
783 "matchable with operand modifier '" + Tok.str() +
784 "' not supported by asm matcher. Mark isCodeGenOnly!");
786 // Verify that any operand is only mentioned once.
787 // We reject aliases and ignore instructions for now.
788 if (Tok[0] == '$' && !OperandNames.insert(Tok).second) {
790 throw TGError(TheDef->getLoc(),
791 "ERROR: matchable with tied operand '" + Tok.str() +
792 "' can never be matched!");
793 // FIXME: Should reject these. The ARM backend hits this with $lane in a
794 // bunch of instructions. It is unclear what the right answer is.
796 errs() << "warning: '" << TheDef->getName() << "': "
797 << "ignoring instruction with tied operand '"
798 << Tok.str() << "'\n";
807 /// getSingletonRegisterForAsmOperand - If the specified token is a singleton
808 /// register, return the register name, otherwise return a null StringRef.
809 Record *MatchableInfo::
810 getSingletonRegisterForAsmOperand(unsigned i, const AsmMatcherInfo &Info) const{
811 StringRef Tok = AsmOperands[i].Token;
812 if (!Tok.startswith(Info.RegisterPrefix))
815 StringRef RegName = Tok.substr(Info.RegisterPrefix.size());
816 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName))
819 // If there is no register prefix (i.e. "%" in "%eax"), then this may
820 // be some random non-register token, just ignore it.
821 if (Info.RegisterPrefix.empty())
824 // Otherwise, we have something invalid prefixed with the register prefix,
826 std::string Err = "unable to find register for '" + RegName.str() +
827 "' (which matches register prefix)";
828 throw TGError(TheDef->getLoc(), Err);
831 static std::string getEnumNameForToken(StringRef Str) {
834 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) {
836 case '*': Res += "_STAR_"; break;
837 case '%': Res += "_PCT_"; break;
838 case ':': Res += "_COLON_"; break;
839 case '!': Res += "_EXCLAIM_"; break;
840 case '.': Res += "_DOT_"; break;
845 Res += "_" + utostr((unsigned) *it) + "_";
852 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
853 ClassInfo *&Entry = TokenClasses[Token];
856 Entry = new ClassInfo();
857 Entry->Kind = ClassInfo::Token;
858 Entry->ClassName = "Token";
859 Entry->Name = "MCK_" + getEnumNameForToken(Token);
860 Entry->ValueName = Token;
861 Entry->PredicateMethod = "<invalid>";
862 Entry->RenderMethod = "<invalid>";
863 Entry->ParserMethod = "";
864 Classes.push_back(Entry);
871 AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI,
873 Record *Rec = OI.Rec;
875 Rec = dynamic_cast<DefInit*>(OI.MIOperandInfo->getArg(SubOpIdx))->getDef();
876 return getOperandClass(Rec, SubOpIdx);
880 AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) {
881 if (Rec->isSubClassOf("RegisterOperand")) {
882 // RegisterOperand may have an associated ParserMatchClass. If it does,
883 // use it, else just fall back to the underlying register class.
884 const RecordVal *R = Rec->getValue("ParserMatchClass");
885 if (R == 0 || R->getValue() == 0)
886 throw "Record `" + Rec->getName() +
887 "' does not have a ParserMatchClass!\n";
889 if (DefInit *DI= dynamic_cast<DefInit*>(R->getValue())) {
890 Record *MatchClass = DI->getDef();
891 if (ClassInfo *CI = AsmOperandClasses[MatchClass])
895 // No custom match class. Just use the register class.
896 Record *ClassRec = Rec->getValueAsDef("RegClass");
898 throw TGError(Rec->getLoc(), "RegisterOperand `" + Rec->getName() +
899 "' has no associated register class!\n");
900 if (ClassInfo *CI = RegisterClassClasses[ClassRec])
902 throw TGError(Rec->getLoc(), "register class has no class info!");
906 if (Rec->isSubClassOf("RegisterClass")) {
907 if (ClassInfo *CI = RegisterClassClasses[Rec])
909 throw TGError(Rec->getLoc(), "register class has no class info!");
912 assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
913 Record *MatchClass = Rec->getValueAsDef("ParserMatchClass");
914 if (ClassInfo *CI = AsmOperandClasses[MatchClass])
917 throw TGError(Rec->getLoc(), "operand has no match class!");
920 void AsmMatcherInfo::
921 BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
922 const std::vector<CodeGenRegister*> &Registers =
923 Target.getRegBank().getRegisters();
924 ArrayRef<CodeGenRegisterClass*> RegClassList =
925 Target.getRegBank().getRegClasses();
927 // The register sets used for matching.
928 std::set< std::set<Record*> > RegisterSets;
930 // Gather the defined sets.
931 for (ArrayRef<CodeGenRegisterClass*>::const_iterator it =
932 RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it)
933 RegisterSets.insert(std::set<Record*>(
934 (*it)->getOrder().begin(), (*it)->getOrder().end()));
936 // Add any required singleton sets.
937 for (SmallPtrSet<Record*, 16>::iterator it = SingletonRegisters.begin(),
938 ie = SingletonRegisters.end(); it != ie; ++it) {
940 RegisterSets.insert(std::set<Record*>(&Rec, &Rec + 1));
943 // Introduce derived sets where necessary (when a register does not determine
944 // a unique register set class), and build the mapping of registers to the set
945 // they should classify to.
946 std::map<Record*, std::set<Record*> > RegisterMap;
947 for (std::vector<CodeGenRegister*>::const_iterator it = Registers.begin(),
948 ie = Registers.end(); it != ie; ++it) {
949 const CodeGenRegister &CGR = **it;
950 // Compute the intersection of all sets containing this register.
951 std::set<Record*> ContainingSet;
953 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
954 ie = RegisterSets.end(); it != ie; ++it) {
955 if (!it->count(CGR.TheDef))
958 if (ContainingSet.empty()) {
963 std::set<Record*> Tmp;
964 std::swap(Tmp, ContainingSet);
965 std::insert_iterator< std::set<Record*> > II(ContainingSet,
966 ContainingSet.begin());
967 std::set_intersection(Tmp.begin(), Tmp.end(), it->begin(), it->end(), II);
970 if (!ContainingSet.empty()) {
971 RegisterSets.insert(ContainingSet);
972 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
976 // Construct the register classes.
977 std::map<std::set<Record*>, ClassInfo*> RegisterSetClasses;
979 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
980 ie = RegisterSets.end(); it != ie; ++it, ++Index) {
981 ClassInfo *CI = new ClassInfo();
982 CI->Kind = ClassInfo::RegisterClass0 + Index;
983 CI->ClassName = "Reg" + utostr(Index);
984 CI->Name = "MCK_Reg" + utostr(Index);
986 CI->PredicateMethod = ""; // unused
987 CI->RenderMethod = "addRegOperands";
989 Classes.push_back(CI);
990 RegisterSetClasses.insert(std::make_pair(*it, CI));
993 // Find the superclasses; we could compute only the subgroup lattice edges,
994 // but there isn't really a point.
995 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
996 ie = RegisterSets.end(); it != ie; ++it) {
997 ClassInfo *CI = RegisterSetClasses[*it];
998 for (std::set< std::set<Record*> >::iterator it2 = RegisterSets.begin(),
999 ie2 = RegisterSets.end(); it2 != ie2; ++it2)
1001 std::includes(it2->begin(), it2->end(), it->begin(), it->end()))
1002 CI->SuperClasses.push_back(RegisterSetClasses[*it2]);
1005 // Name the register classes which correspond to a user defined RegisterClass.
1006 for (ArrayRef<CodeGenRegisterClass*>::const_iterator
1007 it = RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it) {
1008 const CodeGenRegisterClass &RC = **it;
1009 // Def will be NULL for non-user defined register classes.
1010 Record *Def = RC.getDef();
1013 ClassInfo *CI = RegisterSetClasses[std::set<Record*>(RC.getOrder().begin(),
1014 RC.getOrder().end())];
1015 if (CI->ValueName.empty()) {
1016 CI->ClassName = RC.getName();
1017 CI->Name = "MCK_" + RC.getName();
1018 CI->ValueName = RC.getName();
1020 CI->ValueName = CI->ValueName + "," + RC.getName();
1022 RegisterClassClasses.insert(std::make_pair(Def, CI));
1025 // Populate the map for individual registers.
1026 for (std::map<Record*, std::set<Record*> >::iterator it = RegisterMap.begin(),
1027 ie = RegisterMap.end(); it != ie; ++it)
1028 RegisterClasses[it->first] = RegisterSetClasses[it->second];
1030 // Name the register classes which correspond to singleton registers.
1031 for (SmallPtrSet<Record*, 16>::iterator it = SingletonRegisters.begin(),
1032 ie = SingletonRegisters.end(); it != ie; ++it) {
1034 ClassInfo *CI = RegisterClasses[Rec];
1035 assert(CI && "Missing singleton register class info!");
1037 if (CI->ValueName.empty()) {
1038 CI->ClassName = Rec->getName();
1039 CI->Name = "MCK_" + Rec->getName();
1040 CI->ValueName = Rec->getName();
1042 CI->ValueName = CI->ValueName + "," + Rec->getName();
1046 void AsmMatcherInfo::BuildOperandClasses() {
1047 std::vector<Record*> AsmOperands =
1048 Records.getAllDerivedDefinitions("AsmOperandClass");
1050 // Pre-populate AsmOperandClasses map.
1051 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
1052 ie = AsmOperands.end(); it != ie; ++it)
1053 AsmOperandClasses[*it] = new ClassInfo();
1056 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
1057 ie = AsmOperands.end(); it != ie; ++it, ++Index) {
1058 ClassInfo *CI = AsmOperandClasses[*it];
1059 CI->Kind = ClassInfo::UserClass0 + Index;
1061 ListInit *Supers = (*it)->getValueAsListInit("SuperClasses");
1062 for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) {
1063 DefInit *DI = dynamic_cast<DefInit*>(Supers->getElement(i));
1065 PrintError((*it)->getLoc(), "Invalid super class reference!");
1069 ClassInfo *SC = AsmOperandClasses[DI->getDef()];
1071 PrintError((*it)->getLoc(), "Invalid super class reference!");
1073 CI->SuperClasses.push_back(SC);
1075 CI->ClassName = (*it)->getValueAsString("Name");
1076 CI->Name = "MCK_" + CI->ClassName;
1077 CI->ValueName = (*it)->getName();
1079 // Get or construct the predicate method name.
1080 Init *PMName = (*it)->getValueInit("PredicateMethod");
1081 if (StringInit *SI = dynamic_cast<StringInit*>(PMName)) {
1082 CI->PredicateMethod = SI->getValue();
1084 assert(dynamic_cast<UnsetInit*>(PMName) &&
1085 "Unexpected PredicateMethod field!");
1086 CI->PredicateMethod = "is" + CI->ClassName;
1089 // Get or construct the render method name.
1090 Init *RMName = (*it)->getValueInit("RenderMethod");
1091 if (StringInit *SI = dynamic_cast<StringInit*>(RMName)) {
1092 CI->RenderMethod = SI->getValue();
1094 assert(dynamic_cast<UnsetInit*>(RMName) &&
1095 "Unexpected RenderMethod field!");
1096 CI->RenderMethod = "add" + CI->ClassName + "Operands";
1099 // Get the parse method name or leave it as empty.
1100 Init *PRMName = (*it)->getValueInit("ParserMethod");
1101 if (StringInit *SI = dynamic_cast<StringInit*>(PRMName))
1102 CI->ParserMethod = SI->getValue();
1104 AsmOperandClasses[*it] = CI;
1105 Classes.push_back(CI);
1109 AsmMatcherInfo::AsmMatcherInfo(Record *asmParser,
1110 CodeGenTarget &target,
1111 RecordKeeper &records)
1112 : Records(records), AsmParser(asmParser), Target(target),
1113 RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix")) {
1116 /// BuildOperandMatchInfo - Build the necessary information to handle user
1117 /// defined operand parsing methods.
1118 void AsmMatcherInfo::BuildOperandMatchInfo() {
1120 /// Map containing a mask with all operands indicies that can be found for
1121 /// that class inside a instruction.
1122 std::map<ClassInfo*, unsigned> OpClassMask;
1124 for (std::vector<MatchableInfo*>::const_iterator it =
1125 Matchables.begin(), ie = Matchables.end();
1127 MatchableInfo &II = **it;
1128 OpClassMask.clear();
1130 // Keep track of all operands of this instructions which belong to the
1132 for (unsigned i = 0, e = II.AsmOperands.size(); i != e; ++i) {
1133 MatchableInfo::AsmOperand &Op = II.AsmOperands[i];
1134 if (Op.Class->ParserMethod.empty())
1136 unsigned &OperandMask = OpClassMask[Op.Class];
1137 OperandMask |= (1 << i);
1140 // Generate operand match info for each mnemonic/operand class pair.
1141 for (std::map<ClassInfo*, unsigned>::iterator iit = OpClassMask.begin(),
1142 iie = OpClassMask.end(); iit != iie; ++iit) {
1143 unsigned OpMask = iit->second;
1144 ClassInfo *CI = iit->first;
1145 OperandMatchInfo.push_back(OperandMatchEntry::Create(&II, CI, OpMask));
1150 void AsmMatcherInfo::BuildInfo() {
1151 // Build information about all of the AssemblerPredicates.
1152 std::vector<Record*> AllPredicates =
1153 Records.getAllDerivedDefinitions("Predicate");
1154 for (unsigned i = 0, e = AllPredicates.size(); i != e; ++i) {
1155 Record *Pred = AllPredicates[i];
1156 // Ignore predicates that are not intended for the assembler.
1157 if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
1160 if (Pred->getName().empty())
1161 throw TGError(Pred->getLoc(), "Predicate has no name!");
1163 unsigned FeatureNo = SubtargetFeatures.size();
1164 SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo);
1165 assert(FeatureNo < 32 && "Too many subtarget features!");
1168 std::string CommentDelimiter = AsmParser->getValueAsString("CommentDelimiter");
1170 // Parse the instructions; we need to do this first so that we can gather the
1171 // singleton register classes.
1172 SmallPtrSet<Record*, 16> SingletonRegisters;
1173 for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
1174 E = Target.inst_end(); I != E; ++I) {
1175 const CodeGenInstruction &CGI = **I;
1177 // If the tblgen -match-prefix option is specified (for tblgen hackers),
1178 // filter the set of instructions we consider.
1179 if (!StringRef(CGI.TheDef->getName()).startswith(MatchPrefix))
1182 // Ignore "codegen only" instructions.
1183 if (CGI.TheDef->getValueAsBit("isCodeGenOnly"))
1186 // Validate the operand list to ensure we can handle this instruction.
1187 for (unsigned i = 0, e = CGI.Operands.size(); i != e; ++i) {
1188 const CGIOperandList::OperandInfo &OI = CGI.Operands[i];
1190 // Validate tied operands.
1191 if (OI.getTiedRegister() != -1) {
1192 // If we have a tied operand that consists of multiple MCOperands,
1193 // reject it. We reject aliases and ignore instructions for now.
1194 if (OI.MINumOperands != 1) {
1195 // FIXME: Should reject these. The ARM backend hits this with $lane
1196 // in a bunch of instructions. It is unclear what the right answer is.
1198 errs() << "warning: '" << CGI.TheDef->getName() << "': "
1199 << "ignoring instruction with multi-operand tied operand '"
1200 << OI.Name << "'\n";
1207 OwningPtr<MatchableInfo> II(new MatchableInfo(CGI));
1209 II->Initialize(*this, SingletonRegisters);
1211 // Ignore instructions which shouldn't be matched and diagnose invalid
1212 // instruction definitions with an error.
1213 if (!II->Validate(CommentDelimiter, true))
1216 // Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
1218 // FIXME: This is a total hack.
1219 if (StringRef(II->TheDef->getName()).startswith("Int_") ||
1220 StringRef(II->TheDef->getName()).endswith("_Int"))
1223 Matchables.push_back(II.take());
1226 // Parse all of the InstAlias definitions and stick them in the list of
1228 std::vector<Record*> AllInstAliases =
1229 Records.getAllDerivedDefinitions("InstAlias");
1230 for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) {
1231 CodeGenInstAlias *Alias = new CodeGenInstAlias(AllInstAliases[i], Target);
1233 // If the tblgen -match-prefix option is specified (for tblgen hackers),
1234 // filter the set of instruction aliases we consider, based on the target
1236 if (!StringRef(Alias->ResultInst->TheDef->getName()).startswith(
1240 OwningPtr<MatchableInfo> II(new MatchableInfo(Alias));
1242 II->Initialize(*this, SingletonRegisters);
1244 // Validate the alias definitions.
1245 II->Validate(CommentDelimiter, false);
1247 Matchables.push_back(II.take());
1250 // Build info for the register classes.
1251 BuildRegisterClasses(SingletonRegisters);
1253 // Build info for the user defined assembly operand classes.
1254 BuildOperandClasses();
1256 // Build the information about matchables, now that we have fully formed
1258 for (std::vector<MatchableInfo*>::iterator it = Matchables.begin(),
1259 ie = Matchables.end(); it != ie; ++it) {
1260 MatchableInfo *II = *it;
1262 // Parse the tokens after the mnemonic.
1263 // Note: BuildInstructionOperandReference may insert new AsmOperands, so
1264 // don't precompute the loop bound.
1265 for (unsigned i = 0; i != II->AsmOperands.size(); ++i) {
1266 MatchableInfo::AsmOperand &Op = II->AsmOperands[i];
1267 StringRef Token = Op.Token;
1269 // Check for singleton registers.
1270 if (Record *RegRecord = II->getSingletonRegisterForAsmOperand(i, *this)) {
1271 Op.Class = RegisterClasses[RegRecord];
1272 assert(Op.Class && Op.Class->Registers.size() == 1 &&
1273 "Unexpected class for singleton register");
1277 // Check for simple tokens.
1278 if (Token[0] != '$') {
1279 Op.Class = getTokenClass(Token);
1283 if (Token.size() > 1 && isdigit(Token[1])) {
1284 Op.Class = getTokenClass(Token);
1288 // Otherwise this is an operand reference.
1289 StringRef OperandName;
1290 if (Token[1] == '{')
1291 OperandName = Token.substr(2, Token.size() - 3);
1293 OperandName = Token.substr(1);
1295 if (II->DefRec.is<const CodeGenInstruction*>())
1296 BuildInstructionOperandReference(II, OperandName, i);
1298 BuildAliasOperandReference(II, OperandName, Op);
1301 if (II->DefRec.is<const CodeGenInstruction*>())
1302 II->BuildInstructionResultOperands();
1304 II->BuildAliasResultOperands();
1307 // Reorder classes so that classes precede super classes.
1308 std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>());
1311 /// BuildInstructionOperandReference - The specified operand is a reference to a
1312 /// named operand such as $src. Resolve the Class and OperandInfo pointers.
1313 void AsmMatcherInfo::
1314 BuildInstructionOperandReference(MatchableInfo *II,
1315 StringRef OperandName,
1316 unsigned AsmOpIdx) {
1317 const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>();
1318 const CGIOperandList &Operands = CGI.Operands;
1319 MatchableInfo::AsmOperand *Op = &II->AsmOperands[AsmOpIdx];
1321 // Map this token to an operand.
1323 if (!Operands.hasOperandNamed(OperandName, Idx))
1324 throw TGError(II->TheDef->getLoc(), "error: unable to find operand: '" +
1325 OperandName.str() + "'");
1327 // If the instruction operand has multiple suboperands, but the parser
1328 // match class for the asm operand is still the default "ImmAsmOperand",
1329 // then handle each suboperand separately.
1330 if (Op->SubOpIdx == -1 && Operands[Idx].MINumOperands > 1) {
1331 Record *Rec = Operands[Idx].Rec;
1332 assert(Rec->isSubClassOf("Operand") && "Unexpected operand!");
1333 Record *MatchClass = Rec->getValueAsDef("ParserMatchClass");
1334 if (MatchClass && MatchClass->getValueAsString("Name") == "Imm") {
1335 // Insert remaining suboperands after AsmOpIdx in II->AsmOperands.
1336 StringRef Token = Op->Token; // save this in case Op gets moved
1337 for (unsigned SI = 1, SE = Operands[Idx].MINumOperands; SI != SE; ++SI) {
1338 MatchableInfo::AsmOperand NewAsmOp(Token);
1339 NewAsmOp.SubOpIdx = SI;
1340 II->AsmOperands.insert(II->AsmOperands.begin()+AsmOpIdx+SI, NewAsmOp);
1342 // Replace Op with first suboperand.
1343 Op = &II->AsmOperands[AsmOpIdx]; // update the pointer in case it moved
1348 // Set up the operand class.
1349 Op->Class = getOperandClass(Operands[Idx], Op->SubOpIdx);
1351 // If the named operand is tied, canonicalize it to the untied operand.
1352 // For example, something like:
1353 // (outs GPR:$dst), (ins GPR:$src)
1354 // with an asmstring of
1356 // we want to canonicalize to:
1358 // so that we know how to provide the $dst operand when filling in the result.
1359 int OITied = Operands[Idx].getTiedRegister();
1361 // The tied operand index is an MIOperand index, find the operand that
1363 std::pair<unsigned, unsigned> Idx = Operands.getSubOperandNumber(OITied);
1364 OperandName = Operands[Idx.first].Name;
1365 Op->SubOpIdx = Idx.second;
1368 Op->SrcOpName = OperandName;
1371 /// BuildAliasOperandReference - When parsing an operand reference out of the
1372 /// matching string (e.g. "movsx $src, $dst"), determine what the class of the
1373 /// operand reference is by looking it up in the result pattern definition.
1374 void AsmMatcherInfo::BuildAliasOperandReference(MatchableInfo *II,
1375 StringRef OperandName,
1376 MatchableInfo::AsmOperand &Op) {
1377 const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
1379 // Set up the operand class.
1380 for (unsigned i = 0, e = CGA.ResultOperands.size(); i != e; ++i)
1381 if (CGA.ResultOperands[i].isRecord() &&
1382 CGA.ResultOperands[i].getName() == OperandName) {
1383 // It's safe to go with the first one we find, because CodeGenInstAlias
1384 // validates that all operands with the same name have the same record.
1385 Op.SubOpIdx = CGA.ResultInstOperandIndex[i].second;
1386 // Use the match class from the Alias definition, not the
1387 // destination instruction, as we may have an immediate that's
1388 // being munged by the match class.
1389 Op.Class = getOperandClass(CGA.ResultOperands[i].getRecord(),
1391 Op.SrcOpName = OperandName;
1395 throw TGError(II->TheDef->getLoc(), "error: unable to find operand: '" +
1396 OperandName.str() + "'");
1399 void MatchableInfo::BuildInstructionResultOperands() {
1400 const CodeGenInstruction *ResultInst = getResultInst();
1402 // Loop over all operands of the result instruction, determining how to
1404 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
1405 const CGIOperandList::OperandInfo &OpInfo = ResultInst->Operands[i];
1407 // If this is a tied operand, just copy from the previously handled operand.
1408 int TiedOp = OpInfo.getTiedRegister();
1410 ResOperands.push_back(ResOperand::getTiedOp(TiedOp));
1414 // Find out what operand from the asmparser this MCInst operand comes from.
1415 int SrcOperand = FindAsmOperandNamed(OpInfo.Name);
1416 if (OpInfo.Name.empty() || SrcOperand == -1)
1417 throw TGError(TheDef->getLoc(), "Instruction '" +
1418 TheDef->getName() + "' has operand '" + OpInfo.Name +
1419 "' that doesn't appear in asm string!");
1421 // Check if the one AsmOperand populates the entire operand.
1422 unsigned NumOperands = OpInfo.MINumOperands;
1423 if (AsmOperands[SrcOperand].SubOpIdx == -1) {
1424 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, NumOperands));
1428 // Add a separate ResOperand for each suboperand.
1429 for (unsigned AI = 0; AI < NumOperands; ++AI) {
1430 assert(AsmOperands[SrcOperand+AI].SubOpIdx == (int)AI &&
1431 AsmOperands[SrcOperand+AI].SrcOpName == OpInfo.Name &&
1432 "unexpected AsmOperands for suboperands");
1433 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand + AI, 1));
1438 void MatchableInfo::BuildAliasResultOperands() {
1439 const CodeGenInstAlias &CGA = *DefRec.get<const CodeGenInstAlias*>();
1440 const CodeGenInstruction *ResultInst = getResultInst();
1442 // Loop over all operands of the result instruction, determining how to
1444 unsigned AliasOpNo = 0;
1445 unsigned LastOpNo = CGA.ResultInstOperandIndex.size();
1446 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
1447 const CGIOperandList::OperandInfo *OpInfo = &ResultInst->Operands[i];
1449 // If this is a tied operand, just copy from the previously handled operand.
1450 int TiedOp = OpInfo->getTiedRegister();
1452 ResOperands.push_back(ResOperand::getTiedOp(TiedOp));
1456 // Handle all the suboperands for this operand.
1457 const std::string &OpName = OpInfo->Name;
1458 for ( ; AliasOpNo < LastOpNo &&
1459 CGA.ResultInstOperandIndex[AliasOpNo].first == i; ++AliasOpNo) {
1460 int SubIdx = CGA.ResultInstOperandIndex[AliasOpNo].second;
1462 // Find out what operand from the asmparser that this MCInst operand
1464 switch (CGA.ResultOperands[AliasOpNo].Kind) {
1465 default: assert(0 && "unexpected InstAlias operand kind");
1466 case CodeGenInstAlias::ResultOperand::K_Record: {
1467 StringRef Name = CGA.ResultOperands[AliasOpNo].getName();
1468 int SrcOperand = FindAsmOperand(Name, SubIdx);
1469 if (SrcOperand == -1)
1470 throw TGError(TheDef->getLoc(), "Instruction '" +
1471 TheDef->getName() + "' has operand '" + OpName +
1472 "' that doesn't appear in asm string!");
1473 unsigned NumOperands = (SubIdx == -1 ? OpInfo->MINumOperands : 1);
1474 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand,
1478 case CodeGenInstAlias::ResultOperand::K_Imm: {
1479 int64_t ImmVal = CGA.ResultOperands[AliasOpNo].getImm();
1480 ResOperands.push_back(ResOperand::getImmOp(ImmVal));
1483 case CodeGenInstAlias::ResultOperand::K_Reg: {
1484 Record *Reg = CGA.ResultOperands[AliasOpNo].getRegister();
1485 ResOperands.push_back(ResOperand::getRegOp(Reg));
1493 static void EmitConvertToMCInst(CodeGenTarget &Target, StringRef ClassName,
1494 std::vector<MatchableInfo*> &Infos,
1496 // Write the convert function to a separate stream, so we can drop it after
1498 std::string ConvertFnBody;
1499 raw_string_ostream CvtOS(ConvertFnBody);
1501 // Function we have already generated.
1502 std::set<std::string> GeneratedFns;
1504 // Start the unified conversion function.
1505 CvtOS << "bool " << Target.getName() << ClassName << "::\n";
1506 CvtOS << "ConvertToMCInst(unsigned Kind, MCInst &Inst, "
1507 << "unsigned Opcode,\n"
1508 << " const SmallVectorImpl<MCParsedAsmOperand*"
1509 << "> &Operands) {\n";
1510 CvtOS << " Inst.setOpcode(Opcode);\n";
1511 CvtOS << " switch (Kind) {\n";
1512 CvtOS << " default:\n";
1514 // Start the enum, which we will generate inline.
1516 OS << "// Unified function for converting operands to MCInst instances.\n\n";
1517 OS << "enum ConversionKind {\n";
1519 // TargetOperandClass - This is the target's operand class, like X86Operand.
1520 std::string TargetOperandClass = Target.getName() + "Operand";
1522 for (std::vector<MatchableInfo*>::const_iterator it = Infos.begin(),
1523 ie = Infos.end(); it != ie; ++it) {
1524 MatchableInfo &II = **it;
1526 // Check if we have a custom match function.
1527 std::string AsmMatchConverter =
1528 II.getResultInst()->TheDef->getValueAsString("AsmMatchConverter");
1529 if (!AsmMatchConverter.empty()) {
1530 std::string Signature = "ConvertCustom_" + AsmMatchConverter;
1531 II.ConversionFnKind = Signature;
1533 // Check if we have already generated this signature.
1534 if (!GeneratedFns.insert(Signature).second)
1537 // If not, emit it now. Add to the enum list.
1538 OS << " " << Signature << ",\n";
1540 CvtOS << " case " << Signature << ":\n";
1541 CvtOS << " return " << AsmMatchConverter
1542 << "(Inst, Opcode, Operands);\n";
1546 // Build the conversion function signature.
1547 std::string Signature = "Convert";
1548 std::string CaseBody;
1549 raw_string_ostream CaseOS(CaseBody);
1551 // Compute the convert enum and the case body.
1552 for (unsigned i = 0, e = II.ResOperands.size(); i != e; ++i) {
1553 const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i];
1555 // Generate code to populate each result operand.
1556 switch (OpInfo.Kind) {
1557 case MatchableInfo::ResOperand::RenderAsmOperand: {
1558 // This comes from something we parsed.
1559 MatchableInfo::AsmOperand &Op = II.AsmOperands[OpInfo.AsmOperandNum];
1561 // Registers are always converted the same, don't duplicate the
1562 // conversion function based on them.
1564 if (Op.Class->isRegisterClass())
1567 Signature += Op.Class->ClassName;
1568 Signature += utostr(OpInfo.MINumOperands);
1569 Signature += "_" + itostr(OpInfo.AsmOperandNum);
1571 CaseOS << " ((" << TargetOperandClass << "*)Operands["
1572 << (OpInfo.AsmOperandNum+1) << "])->" << Op.Class->RenderMethod
1573 << "(Inst, " << OpInfo.MINumOperands << ");\n";
1577 case MatchableInfo::ResOperand::TiedOperand: {
1578 // If this operand is tied to a previous one, just copy the MCInst
1579 // operand from the earlier one.We can only tie single MCOperand values.
1580 //assert(OpInfo.MINumOperands == 1 && "Not a singular MCOperand");
1581 unsigned TiedOp = OpInfo.TiedOperandNum;
1582 assert(i > TiedOp && "Tied operand precedes its target!");
1583 CaseOS << " Inst.addOperand(Inst.getOperand(" << TiedOp << "));\n";
1584 Signature += "__Tie" + utostr(TiedOp);
1587 case MatchableInfo::ResOperand::ImmOperand: {
1588 int64_t Val = OpInfo.ImmVal;
1589 CaseOS << " Inst.addOperand(MCOperand::CreateImm(" << Val << "));\n";
1590 Signature += "__imm" + itostr(Val);
1593 case MatchableInfo::ResOperand::RegOperand: {
1594 if (OpInfo.Register == 0) {
1595 CaseOS << " Inst.addOperand(MCOperand::CreateReg(0));\n";
1596 Signature += "__reg0";
1598 std::string N = getQualifiedName(OpInfo.Register);
1599 CaseOS << " Inst.addOperand(MCOperand::CreateReg(" << N << "));\n";
1600 Signature += "__reg" + OpInfo.Register->getName();
1606 II.ConversionFnKind = Signature;
1608 // Check if we have already generated this signature.
1609 if (!GeneratedFns.insert(Signature).second)
1612 // If not, emit it now. Add to the enum list.
1613 OS << " " << Signature << ",\n";
1615 CvtOS << " case " << Signature << ":\n";
1616 CvtOS << CaseOS.str();
1617 CvtOS << " return true;\n";
1620 // Finish the convert function.
1623 CvtOS << " return false;\n";
1626 // Finish the enum, and drop the convert function after it.
1628 OS << " NumConversionVariants\n";
1634 /// EmitMatchClassEnumeration - Emit the enumeration for match class kinds.
1635 static void EmitMatchClassEnumeration(CodeGenTarget &Target,
1636 std::vector<ClassInfo*> &Infos,
1638 OS << "namespace {\n\n";
1640 OS << "/// MatchClassKind - The kinds of classes which participate in\n"
1641 << "/// instruction matching.\n";
1642 OS << "enum MatchClassKind {\n";
1643 OS << " InvalidMatchClass = 0,\n";
1644 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1645 ie = Infos.end(); it != ie; ++it) {
1646 ClassInfo &CI = **it;
1647 OS << " " << CI.Name << ", // ";
1648 if (CI.Kind == ClassInfo::Token) {
1649 OS << "'" << CI.ValueName << "'\n";
1650 } else if (CI.isRegisterClass()) {
1651 if (!CI.ValueName.empty())
1652 OS << "register class '" << CI.ValueName << "'\n";
1654 OS << "derived register class\n";
1656 OS << "user defined class '" << CI.ValueName << "'\n";
1659 OS << " NumMatchClassKinds\n";
1665 /// EmitValidateOperandClass - Emit the function to validate an operand class.
1666 static void EmitValidateOperandClass(AsmMatcherInfo &Info,
1668 OS << "static bool ValidateOperandClass(MCParsedAsmOperand *GOp, "
1669 << "MatchClassKind Kind) {\n";
1670 OS << " " << Info.Target.getName() << "Operand &Operand = *("
1671 << Info.Target.getName() << "Operand*)GOp;\n";
1673 // The InvalidMatchClass is not to match any operand.
1674 OS << " if (Kind == InvalidMatchClass)\n";
1675 OS << " return false;\n\n";
1677 // Check for Token operands first.
1678 OS << " if (Operand.isToken())\n";
1679 OS << " return MatchTokenString(Operand.getToken()) == Kind;\n\n";
1681 // Check for register operands, including sub-classes.
1682 OS << " if (Operand.isReg()) {\n";
1683 OS << " MatchClassKind OpKind;\n";
1684 OS << " switch (Operand.getReg()) {\n";
1685 OS << " default: OpKind = InvalidMatchClass; break;\n";
1686 for (std::map<Record*, ClassInfo*>::iterator
1687 it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end();
1689 OS << " case " << Info.Target.getName() << "::"
1690 << it->first->getName() << ": OpKind = " << it->second->Name
1693 OS << " return IsSubclass(OpKind, Kind);\n";
1696 // Check the user classes. We don't care what order since we're only
1697 // actually matching against one of them.
1698 for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
1699 ie = Info.Classes.end(); it != ie; ++it) {
1700 ClassInfo &CI = **it;
1702 if (!CI.isUserClass())
1705 OS << " // '" << CI.ClassName << "' class\n";
1706 OS << " if (Kind == " << CI.Name
1707 << " && Operand." << CI.PredicateMethod << "()) {\n";
1708 OS << " return true;\n";
1712 OS << " return false;\n";
1716 /// EmitIsSubclass - Emit the subclass predicate function.
1717 static void EmitIsSubclass(CodeGenTarget &Target,
1718 std::vector<ClassInfo*> &Infos,
1720 OS << "/// IsSubclass - Compute whether \\arg A is a subclass of \\arg B.\n";
1721 OS << "static bool IsSubclass(MatchClassKind A, MatchClassKind B) {\n";
1722 OS << " if (A == B)\n";
1723 OS << " return true;\n\n";
1725 OS << " switch (A) {\n";
1726 OS << " default:\n";
1727 OS << " return false;\n";
1728 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1729 ie = Infos.end(); it != ie; ++it) {
1730 ClassInfo &A = **it;
1732 if (A.Kind != ClassInfo::Token) {
1733 std::vector<StringRef> SuperClasses;
1734 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1735 ie = Infos.end(); it != ie; ++it) {
1736 ClassInfo &B = **it;
1738 if (&A != &B && A.isSubsetOf(B))
1739 SuperClasses.push_back(B.Name);
1742 if (SuperClasses.empty())
1745 OS << "\n case " << A.Name << ":\n";
1747 if (SuperClasses.size() == 1) {
1748 OS << " return B == " << SuperClasses.back() << ";\n";
1752 OS << " switch (B) {\n";
1753 OS << " default: return false;\n";
1754 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i)
1755 OS << " case " << SuperClasses[i] << ": return true;\n";
1763 /// EmitMatchTokenString - Emit the function to match a token string to the
1764 /// appropriate match class value.
1765 static void EmitMatchTokenString(CodeGenTarget &Target,
1766 std::vector<ClassInfo*> &Infos,
1768 // Construct the match list.
1769 std::vector<StringMatcher::StringPair> Matches;
1770 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1771 ie = Infos.end(); it != ie; ++it) {
1772 ClassInfo &CI = **it;
1774 if (CI.Kind == ClassInfo::Token)
1775 Matches.push_back(StringMatcher::StringPair(CI.ValueName,
1776 "return " + CI.Name + ";"));
1779 OS << "static MatchClassKind MatchTokenString(StringRef Name) {\n";
1781 StringMatcher("Name", Matches, OS).Emit();
1783 OS << " return InvalidMatchClass;\n";
1787 /// EmitMatchRegisterName - Emit the function to match a string to the target
1788 /// specific register enum.
1789 static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
1791 // Construct the match list.
1792 std::vector<StringMatcher::StringPair> Matches;
1793 const std::vector<CodeGenRegister*> &Regs =
1794 Target.getRegBank().getRegisters();
1795 for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
1796 const CodeGenRegister *Reg = Regs[i];
1797 if (Reg->TheDef->getValueAsString("AsmName").empty())
1800 Matches.push_back(StringMatcher::StringPair(
1801 Reg->TheDef->getValueAsString("AsmName"),
1802 "return " + utostr(Reg->EnumValue) + ";"));
1805 OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
1807 StringMatcher("Name", Matches, OS).Emit();
1809 OS << " return 0;\n";
1813 /// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
1815 static void EmitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
1817 OS << "// Flags for subtarget features that participate in "
1818 << "instruction matching.\n";
1819 OS << "enum SubtargetFeatureFlag {\n";
1820 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1821 it = Info.SubtargetFeatures.begin(),
1822 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1823 SubtargetFeatureInfo &SFI = *it->second;
1824 OS << " " << SFI.getEnumName() << " = (1 << " << SFI.Index << "),\n";
1826 OS << " Feature_None = 0\n";
1830 /// EmitComputeAvailableFeatures - Emit the function to compute the list of
1831 /// available features given a subtarget.
1832 static void EmitComputeAvailableFeatures(AsmMatcherInfo &Info,
1834 std::string ClassName =
1835 Info.AsmParser->getValueAsString("AsmParserClassName");
1837 OS << "unsigned " << Info.Target.getName() << ClassName << "::\n"
1838 << "ComputeAvailableFeatures(uint64_t FB) const {\n";
1839 OS << " unsigned Features = 0;\n";
1840 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1841 it = Info.SubtargetFeatures.begin(),
1842 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1843 SubtargetFeatureInfo &SFI = *it->second;
1846 std::string CondStorage = SFI.TheDef->getValueAsString("AssemblerCondString");
1847 StringRef Conds = CondStorage;
1848 std::pair<StringRef,StringRef> Comma = Conds.split(',');
1855 StringRef Cond = Comma.first;
1856 if (Cond[0] == '!') {
1858 Cond = Cond.substr(1);
1861 OS << "((FB & " << Info.Target.getName() << "::" << Cond << ")";
1868 if (Comma.second.empty())
1872 Comma = Comma.second.split(',');
1876 OS << " Features |= " << SFI.getEnumName() << ";\n";
1878 OS << " return Features;\n";
1882 static std::string GetAliasRequiredFeatures(Record *R,
1883 const AsmMatcherInfo &Info) {
1884 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates");
1886 unsigned NumFeatures = 0;
1887 for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
1888 SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
1891 throw TGError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
1892 "' is not marked as an AssemblerPredicate!");
1897 Result += F->getEnumName();
1901 if (NumFeatures > 1)
1902 Result = '(' + Result + ')';
1906 /// EmitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
1907 /// emit a function for them and return true, otherwise return false.
1908 static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
1909 // Ignore aliases when match-prefix is set.
1910 if (!MatchPrefix.empty())
1913 std::vector<Record*> Aliases =
1914 Info.getRecords().getAllDerivedDefinitions("MnemonicAlias");
1915 if (Aliases.empty()) return false;
1917 OS << "static void ApplyMnemonicAliases(StringRef &Mnemonic, "
1918 "unsigned Features) {\n";
1920 // Keep track of all the aliases from a mnemonic. Use an std::map so that the
1921 // iteration order of the map is stable.
1922 std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
1924 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) {
1925 Record *R = Aliases[i];
1926 AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R);
1929 // Process each alias a "from" mnemonic at a time, building the code executed
1930 // by the string remapper.
1931 std::vector<StringMatcher::StringPair> Cases;
1932 for (std::map<std::string, std::vector<Record*> >::iterator
1933 I = AliasesFromMnemonic.begin(), E = AliasesFromMnemonic.end();
1935 const std::vector<Record*> &ToVec = I->second;
1937 // Loop through each alias and emit code that handles each case. If there
1938 // are two instructions without predicates, emit an error. If there is one,
1940 std::string MatchCode;
1941 int AliasWithNoPredicate = -1;
1943 for (unsigned i = 0, e = ToVec.size(); i != e; ++i) {
1944 Record *R = ToVec[i];
1945 std::string FeatureMask = GetAliasRequiredFeatures(R, Info);
1947 // If this unconditionally matches, remember it for later and diagnose
1949 if (FeatureMask.empty()) {
1950 if (AliasWithNoPredicate != -1) {
1951 // We can't have two aliases from the same mnemonic with no predicate.
1952 PrintError(ToVec[AliasWithNoPredicate]->getLoc(),
1953 "two MnemonicAliases with the same 'from' mnemonic!");
1954 throw TGError(R->getLoc(), "this is the other MnemonicAlias.");
1957 AliasWithNoPredicate = i;
1960 if (R->getValueAsString("ToMnemonic") == I->first)
1961 throw TGError(R->getLoc(), "MnemonicAlias to the same string");
1963 if (!MatchCode.empty())
1964 MatchCode += "else ";
1965 MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n";
1966 MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n";
1969 if (AliasWithNoPredicate != -1) {
1970 Record *R = ToVec[AliasWithNoPredicate];
1971 if (!MatchCode.empty())
1972 MatchCode += "else\n ";
1973 MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n";
1976 MatchCode += "return;";
1978 Cases.push_back(std::make_pair(I->first, MatchCode));
1981 StringMatcher("Mnemonic", Cases, OS).Emit();
1987 static const char *getMinimalTypeForRange(uint64_t Range) {
1988 assert(Range < 0xFFFFFFFFULL && "Enum too large");
1996 static void EmitCustomOperandParsing(raw_ostream &OS, CodeGenTarget &Target,
1997 const AsmMatcherInfo &Info, StringRef ClassName) {
1998 // Emit the static custom operand parsing table;
1999 OS << "namespace {\n";
2000 OS << " struct OperandMatchEntry {\n";
2001 OS << " const char *Mnemonic;\n";
2002 OS << " unsigned OperandMask;\n";
2003 OS << " MatchClassKind Class;\n";
2004 OS << " unsigned RequiredFeatures;\n";
2007 OS << " // Predicate for searching for an opcode.\n";
2008 OS << " struct LessOpcodeOperand {\n";
2009 OS << " bool operator()(const OperandMatchEntry &LHS, StringRef RHS) {\n";
2010 OS << " return StringRef(LHS.Mnemonic) < RHS;\n";
2012 OS << " bool operator()(StringRef LHS, const OperandMatchEntry &RHS) {\n";
2013 OS << " return LHS < StringRef(RHS.Mnemonic);\n";
2015 OS << " bool operator()(const OperandMatchEntry &LHS,";
2016 OS << " const OperandMatchEntry &RHS) {\n";
2017 OS << " return StringRef(LHS.Mnemonic) < StringRef(RHS.Mnemonic);\n";
2021 OS << "} // end anonymous namespace.\n\n";
2023 OS << "static const OperandMatchEntry OperandMatchTable["
2024 << Info.OperandMatchInfo.size() << "] = {\n";
2026 OS << " /* Mnemonic, Operand List Mask, Operand Class, Features */\n";
2027 for (std::vector<OperandMatchEntry>::const_iterator it =
2028 Info.OperandMatchInfo.begin(), ie = Info.OperandMatchInfo.end();
2030 const OperandMatchEntry &OMI = *it;
2031 const MatchableInfo &II = *OMI.MI;
2033 OS << " { \"" << II.Mnemonic << "\""
2034 << ", " << OMI.OperandMask;
2037 bool printComma = false;
2038 for (int i = 0, e = 31; i !=e; ++i)
2039 if (OMI.OperandMask & (1 << i)) {
2047 OS << ", " << OMI.CI->Name
2050 // Write the required features mask.
2051 if (!II.RequiredFeatures.empty()) {
2052 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
2054 OS << II.RequiredFeatures[i]->getEnumName();
2062 // Emit the operand class switch to call the correct custom parser for
2063 // the found operand class.
2064 OS << Target.getName() << ClassName << "::OperandMatchResultTy "
2065 << Target.getName() << ClassName << "::\n"
2066 << "TryCustomParseOperand(SmallVectorImpl<MCParsedAsmOperand*>"
2067 << " &Operands,\n unsigned MCK) {\n\n"
2068 << " switch(MCK) {\n";
2070 for (std::vector<ClassInfo*>::const_iterator it = Info.Classes.begin(),
2071 ie = Info.Classes.end(); it != ie; ++it) {
2072 ClassInfo *CI = *it;
2073 if (CI->ParserMethod.empty())
2075 OS << " case " << CI->Name << ":\n"
2076 << " return " << CI->ParserMethod << "(Operands);\n";
2079 OS << " default:\n";
2080 OS << " return MatchOperand_NoMatch;\n";
2082 OS << " return MatchOperand_NoMatch;\n";
2085 // Emit the static custom operand parser. This code is very similar with
2086 // the other matcher. Also use MatchResultTy here just in case we go for
2087 // a better error handling.
2088 OS << Target.getName() << ClassName << "::OperandMatchResultTy "
2089 << Target.getName() << ClassName << "::\n"
2090 << "MatchOperandParserImpl(SmallVectorImpl<MCParsedAsmOperand*>"
2091 << " &Operands,\n StringRef Mnemonic) {\n";
2093 // Emit code to get the available features.
2094 OS << " // Get the current feature set.\n";
2095 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n";
2097 OS << " // Get the next operand index.\n";
2098 OS << " unsigned NextOpNum = Operands.size()-1;\n";
2100 // Emit code to search the table.
2101 OS << " // Search the table.\n";
2102 OS << " std::pair<const OperandMatchEntry*, const OperandMatchEntry*>";
2103 OS << " MnemonicRange =\n";
2104 OS << " std::equal_range(OperandMatchTable, OperandMatchTable+"
2105 << Info.OperandMatchInfo.size() << ", Mnemonic,\n"
2106 << " LessOpcodeOperand());\n\n";
2108 OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
2109 OS << " return MatchOperand_NoMatch;\n\n";
2111 OS << " for (const OperandMatchEntry *it = MnemonicRange.first,\n"
2112 << " *ie = MnemonicRange.second; it != ie; ++it) {\n";
2114 OS << " // equal_range guarantees that instruction mnemonic matches.\n";
2115 OS << " assert(Mnemonic == it->Mnemonic);\n\n";
2117 // Emit check that the required features are available.
2118 OS << " // check if the available features match\n";
2119 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
2120 << "!= it->RequiredFeatures) {\n";
2121 OS << " continue;\n";
2124 // Emit check to ensure the operand number matches.
2125 OS << " // check if the operand in question has a custom parser.\n";
2126 OS << " if (!(it->OperandMask & (1 << NextOpNum)))\n";
2127 OS << " continue;\n\n";
2129 // Emit call to the custom parser method
2130 OS << " // call custom parse method to handle the operand\n";
2131 OS << " OperandMatchResultTy Result = ";
2132 OS << "TryCustomParseOperand(Operands, it->Class);\n";
2133 OS << " if (Result != MatchOperand_NoMatch)\n";
2134 OS << " return Result;\n";
2137 OS << " // Okay, we had no match.\n";
2138 OS << " return MatchOperand_NoMatch;\n";
2142 void AsmMatcherEmitter::run(raw_ostream &OS) {
2143 CodeGenTarget Target(Records);
2144 Record *AsmParser = Target.getAsmParser();
2145 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName");
2147 // Compute the information on the instructions to match.
2148 AsmMatcherInfo Info(AsmParser, Target, Records);
2151 // Sort the instruction table using the partial order on classes. We use
2152 // stable_sort to ensure that ambiguous instructions are still
2153 // deterministically ordered.
2154 std::stable_sort(Info.Matchables.begin(), Info.Matchables.end(),
2155 less_ptr<MatchableInfo>());
2157 DEBUG_WITH_TYPE("instruction_info", {
2158 for (std::vector<MatchableInfo*>::iterator
2159 it = Info.Matchables.begin(), ie = Info.Matchables.end();
2164 // Check for ambiguous matchables.
2165 DEBUG_WITH_TYPE("ambiguous_instrs", {
2166 unsigned NumAmbiguous = 0;
2167 for (unsigned i = 0, e = Info.Matchables.size(); i != e; ++i) {
2168 for (unsigned j = i + 1; j != e; ++j) {
2169 MatchableInfo &A = *Info.Matchables[i];
2170 MatchableInfo &B = *Info.Matchables[j];
2172 if (A.CouldMatchAmbiguouslyWith(B)) {
2173 errs() << "warning: ambiguous matchables:\n";
2175 errs() << "\nis incomparable with:\n";
2183 errs() << "warning: " << NumAmbiguous
2184 << " ambiguous matchables!\n";
2187 // Compute the information on the custom operand parsing.
2188 Info.BuildOperandMatchInfo();
2190 // Write the output.
2192 EmitSourceFileHeader("Assembly Matcher Source Fragment", OS);
2194 // Information for the class declaration.
2195 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n";
2196 OS << "#undef GET_ASSEMBLER_HEADER\n";
2197 OS << " // This should be included into the middle of the declaration of\n";
2198 OS << " // your subclasses implementation of MCTargetAsmParser.\n";
2199 OS << " unsigned ComputeAvailableFeatures(uint64_t FeatureBits) const;\n";
2200 OS << " bool ConvertToMCInst(unsigned Kind, MCInst &Inst, "
2201 << "unsigned Opcode,\n"
2202 << " const SmallVectorImpl<MCParsedAsmOperand*> "
2204 OS << " bool MnemonicIsValid(StringRef Mnemonic);\n";
2205 OS << " unsigned MatchInstructionImpl(\n";
2206 OS << " const SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n";
2207 OS << " MCInst &Inst, unsigned &ErrorInfo);\n";
2209 if (Info.OperandMatchInfo.size()) {
2210 OS << "\n enum OperandMatchResultTy {\n";
2211 OS << " MatchOperand_Success, // operand matched successfully\n";
2212 OS << " MatchOperand_NoMatch, // operand did not match\n";
2213 OS << " MatchOperand_ParseFail // operand matched but had errors\n";
2215 OS << " OperandMatchResultTy MatchOperandParserImpl(\n";
2216 OS << " SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n";
2217 OS << " StringRef Mnemonic);\n";
2219 OS << " OperandMatchResultTy TryCustomParseOperand(\n";
2220 OS << " SmallVectorImpl<MCParsedAsmOperand*> &Operands,\n";
2221 OS << " unsigned MCK);\n\n";
2224 OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
2226 OS << "\n#ifdef GET_REGISTER_MATCHER\n";
2227 OS << "#undef GET_REGISTER_MATCHER\n\n";
2229 // Emit the subtarget feature enumeration.
2230 EmitSubtargetFeatureFlagEnumeration(Info, OS);
2232 // Emit the function to match a register name to number.
2233 EmitMatchRegisterName(Target, AsmParser, OS);
2235 OS << "#endif // GET_REGISTER_MATCHER\n\n";
2238 OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n";
2239 OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
2241 // Generate the function that remaps for mnemonic aliases.
2242 bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info);
2244 // Generate the unified function to convert operands into an MCInst.
2245 EmitConvertToMCInst(Target, ClassName, Info.Matchables, OS);
2247 // Emit the enumeration for classes which participate in matching.
2248 EmitMatchClassEnumeration(Target, Info.Classes, OS);
2250 // Emit the routine to match token strings to their match class.
2251 EmitMatchTokenString(Target, Info.Classes, OS);
2253 // Emit the subclass predicate routine.
2254 EmitIsSubclass(Target, Info.Classes, OS);
2256 // Emit the routine to validate an operand against a match class.
2257 EmitValidateOperandClass(Info, OS);
2259 // Emit the available features compute function.
2260 EmitComputeAvailableFeatures(Info, OS);
2263 size_t MaxNumOperands = 0;
2264 for (std::vector<MatchableInfo*>::const_iterator it =
2265 Info.Matchables.begin(), ie = Info.Matchables.end();
2267 MaxNumOperands = std::max(MaxNumOperands, (*it)->AsmOperands.size());
2269 // Emit the static match table; unused classes get initalized to 0 which is
2270 // guaranteed to be InvalidMatchClass.
2272 // FIXME: We can reduce the size of this table very easily. First, we change
2273 // it so that store the kinds in separate bit-fields for each index, which
2274 // only needs to be the max width used for classes at that index (we also need
2275 // to reject based on this during classification). If we then make sure to
2276 // order the match kinds appropriately (putting mnemonics last), then we
2277 // should only end up using a few bits for each class, especially the ones
2278 // following the mnemonic.
2279 OS << "namespace {\n";
2280 OS << " struct MatchEntry {\n";
2281 OS << " unsigned Opcode;\n";
2282 OS << " const char *Mnemonic;\n";
2283 OS << " " << getMinimalTypeForRange(Info.Matchables.size())
2285 OS << " " << getMinimalTypeForRange(Info.Classes.size())
2286 << " Classes[" << MaxNumOperands << "];\n";
2287 OS << " " << getMinimalTypeForRange(1ULL << Info.SubtargetFeatures.size())
2288 << " RequiredFeatures;\n";
2291 OS << " // Predicate for searching for an opcode.\n";
2292 OS << " struct LessOpcode {\n";
2293 OS << " bool operator()(const MatchEntry &LHS, StringRef RHS) {\n";
2294 OS << " return StringRef(LHS.Mnemonic) < RHS;\n";
2296 OS << " bool operator()(StringRef LHS, const MatchEntry &RHS) {\n";
2297 OS << " return LHS < StringRef(RHS.Mnemonic);\n";
2299 OS << " bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n";
2300 OS << " return StringRef(LHS.Mnemonic) < StringRef(RHS.Mnemonic);\n";
2304 OS << "} // end anonymous namespace.\n\n";
2306 OS << "static const MatchEntry MatchTable["
2307 << Info.Matchables.size() << "] = {\n";
2309 for (std::vector<MatchableInfo*>::const_iterator it =
2310 Info.Matchables.begin(), ie = Info.Matchables.end();
2312 MatchableInfo &II = **it;
2314 OS << " { " << Target.getName() << "::"
2315 << II.getResultInst()->TheDef->getName() << ", \"" << II.Mnemonic << "\""
2316 << ", " << II.ConversionFnKind << ", { ";
2317 for (unsigned i = 0, e = II.AsmOperands.size(); i != e; ++i) {
2318 MatchableInfo::AsmOperand &Op = II.AsmOperands[i];
2321 OS << Op.Class->Name;
2325 // Write the required features mask.
2326 if (!II.RequiredFeatures.empty()) {
2327 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
2329 OS << II.RequiredFeatures[i]->getEnumName();
2339 // A method to determine if a mnemonic is in the list.
2340 OS << "bool " << Target.getName() << ClassName << "::\n"
2341 << "MnemonicIsValid(StringRef Mnemonic) {\n";
2342 OS << " // Search the table.\n";
2343 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n";
2344 OS << " std::equal_range(MatchTable, MatchTable+"
2345 << Info.Matchables.size() << ", Mnemonic, LessOpcode());\n";
2346 OS << " return MnemonicRange.first != MnemonicRange.second;\n";
2349 // Finally, build the match function.
2351 << Target.getName() << ClassName << "::\n"
2352 << "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
2354 OS << " MCInst &Inst, unsigned &ErrorInfo) {\n";
2356 // Emit code to get the available features.
2357 OS << " // Get the current feature set.\n";
2358 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n";
2360 OS << " // Get the instruction mnemonic, which is the first token.\n";
2361 OS << " StringRef Mnemonic = ((" << Target.getName()
2362 << "Operand*)Operands[0])->getToken();\n\n";
2364 if (HasMnemonicAliases) {
2365 OS << " // Process all MnemonicAliases to remap the mnemonic.\n";
2366 OS << " ApplyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n";
2369 // Emit code to compute the class list for this operand vector.
2370 OS << " // Eliminate obvious mismatches.\n";
2371 OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
2372 OS << " ErrorInfo = " << (MaxNumOperands+1) << ";\n";
2373 OS << " return Match_InvalidOperand;\n";
2376 OS << " // Some state to try to produce better error messages.\n";
2377 OS << " bool HadMatchOtherThanFeatures = false;\n";
2378 OS << " bool HadMatchOtherThanPredicate = false;\n";
2379 OS << " unsigned RetCode = Match_InvalidOperand;\n";
2380 OS << " // Set ErrorInfo to the operand that mismatches if it is\n";
2381 OS << " // wrong for all instances of the instruction.\n";
2382 OS << " ErrorInfo = ~0U;\n";
2384 // Emit code to search the table.
2385 OS << " // Search the table.\n";
2386 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n";
2387 OS << " std::equal_range(MatchTable, MatchTable+"
2388 << Info.Matchables.size() << ", Mnemonic, LessOpcode());\n\n";
2390 OS << " // Return a more specific error code if no mnemonics match.\n";
2391 OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
2392 OS << " return Match_MnemonicFail;\n\n";
2394 OS << " for (const MatchEntry *it = MnemonicRange.first, "
2395 << "*ie = MnemonicRange.second;\n";
2396 OS << " it != ie; ++it) {\n";
2398 OS << " // equal_range guarantees that instruction mnemonic matches.\n";
2399 OS << " assert(Mnemonic == it->Mnemonic);\n";
2401 // Emit check that the subclasses match.
2402 OS << " bool OperandsValid = true;\n";
2403 OS << " for (unsigned i = 0; i != " << MaxNumOperands << "; ++i) {\n";
2404 OS << " if (i + 1 >= Operands.size()) {\n";
2405 OS << " OperandsValid = (it->Classes[i] == " <<"InvalidMatchClass);\n";
2408 OS << " if (ValidateOperandClass(Operands[i+1], "
2409 "(MatchClassKind)it->Classes[i]))\n";
2410 OS << " continue;\n";
2411 OS << " // If this operand is broken for all of the instances of this\n";
2412 OS << " // mnemonic, keep track of it so we can report loc info.\n";
2413 OS << " if (it == MnemonicRange.first || ErrorInfo <= i+1)\n";
2414 OS << " ErrorInfo = i+1;\n";
2415 OS << " // Otherwise, just reject this instance of the mnemonic.\n";
2416 OS << " OperandsValid = false;\n";
2420 OS << " if (!OperandsValid) continue;\n";
2422 // Emit check that the required features are available.
2423 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
2424 << "!= it->RequiredFeatures) {\n";
2425 OS << " HadMatchOtherThanFeatures = true;\n";
2426 OS << " continue;\n";
2429 OS << " // We have selected a definite instruction, convert the parsed\n"
2430 << " // operands into the appropriate MCInst.\n";
2431 OS << " if (!ConvertToMCInst(it->ConvertFn, Inst,\n"
2432 << " it->Opcode, Operands))\n";
2433 OS << " return Match_ConversionFail;\n";
2436 // Verify the instruction with the target-specific match predicate function.
2437 OS << " // We have a potential match. Check the target predicate to\n"
2438 << " // handle any context sensitive constraints.\n"
2439 << " unsigned MatchResult;\n"
2440 << " if ((MatchResult = checkTargetMatchPredicate(Inst)) !="
2441 << " Match_Success) {\n"
2442 << " Inst.clear();\n"
2443 << " RetCode = MatchResult;\n"
2444 << " HadMatchOtherThanPredicate = true;\n"
2448 // Call the post-processing function, if used.
2449 std::string InsnCleanupFn =
2450 AsmParser->getValueAsString("AsmParserInstCleanup");
2451 if (!InsnCleanupFn.empty())
2452 OS << " " << InsnCleanupFn << "(Inst);\n";
2454 OS << " return Match_Success;\n";
2457 OS << " // Okay, we had no match. Try to return a useful error code.\n";
2458 OS << " if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)";
2459 OS << " return RetCode;\n";
2460 OS << " return Match_MissingFeature;\n";
2463 if (Info.OperandMatchInfo.size())
2464 EmitCustomOperandParsing(OS, Target, Info, ClassName);
2466 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";