1 //===- AsmMatcherEmitter.cpp - Generate an assembly matcher ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This tablegen backend emits a target specifier matcher for converting parsed
11 // assembly operands in the MCInst structures.
13 // The input to the target specific matcher is a list of literal tokens and
14 // operands. The target specific parser should generally eliminate any syntax
15 // which is not relevant for matching; for example, comma tokens should have
16 // already been consumed and eliminated by the parser. Most instructions will
17 // end up with a single literal token (the instruction name) and some number of
20 // Some example inputs, for X86:
21 // 'addl' (immediate ...) (register ...)
22 // 'add' (immediate ...) (memory ...)
25 // The assembly matcher is responsible for converting this input into a precise
26 // machine instruction (i.e., an instruction with a well defined encoding). This
27 // mapping has several properties which complicate matching:
29 // - It may be ambiguous; many architectures can legally encode particular
30 // variants of an instruction in different ways (for example, using a smaller
31 // encoding for small immediates). Such ambiguities should never be
32 // arbitrarily resolved by the assembler, the assembler is always responsible
33 // for choosing the "best" available instruction.
35 // - It may depend on the subtarget or the assembler context. Instructions
36 // which are invalid for the current mode, but otherwise unambiguous (e.g.,
37 // an SSE instruction in a file being assembled for i486) should be accepted
38 // and rejected by the assembler front end. However, if the proper encoding
39 // for an instruction is dependent on the assembler context then the matcher
40 // is responsible for selecting the correct machine instruction for the
43 // The core matching algorithm attempts to exploit the regularity in most
44 // instruction sets to quickly determine the set of possibly matching
45 // instructions, and the simplify the generated code. Additionally, this helps
46 // to ensure that the ambiguities are intentionally resolved by the user.
48 // The matching is divided into two distinct phases:
50 // 1. Classification: Each operand is mapped to the unique set which (a)
51 // contains it, and (b) is the largest such subset for which a single
52 // instruction could match all members.
54 // For register classes, we can generate these subgroups automatically. For
55 // arbitrary operands, we expect the user to define the classes and their
56 // relations to one another (for example, 8-bit signed immediates as a
57 // subset of 32-bit immediates).
59 // By partitioning the operands in this way, we guarantee that for any
60 // tuple of classes, any single instruction must match either all or none
61 // of the sets of operands which could classify to that tuple.
63 // In addition, the subset relation amongst classes induces a partial order
64 // on such tuples, which we use to resolve ambiguities.
66 // 2. The input can now be treated as a tuple of classes (static tokens are
67 // simple singleton sets). Each such tuple should generally map to a single
68 // instruction (we currently ignore cases where this isn't true, whee!!!),
69 // which we can emit a simple matcher for.
71 //===----------------------------------------------------------------------===//
73 #include "AsmMatcherEmitter.h"
74 #include "CodeGenTarget.h"
76 #include "StringMatcher.h"
77 #include "llvm/ADT/OwningPtr.h"
78 #include "llvm/ADT/PointerUnion.h"
79 #include "llvm/ADT/SmallPtrSet.h"
80 #include "llvm/ADT/SmallVector.h"
81 #include "llvm/ADT/STLExtras.h"
82 #include "llvm/ADT/StringExtras.h"
83 #include "llvm/Support/CommandLine.h"
84 #include "llvm/Support/Debug.h"
89 static cl::opt<std::string>
90 MatchPrefix("match-prefix", cl::init(""),
91 cl::desc("Only match instructions with the given prefix"));
96 struct SubtargetFeatureInfo;
98 /// ClassInfo - Helper class for storing the information about a particular
99 /// class of operands which can be matched.
102 /// Invalid kind, for use as a sentinel value.
105 /// The class for a particular token.
108 /// The (first) register class, subsequent register classes are
109 /// RegisterClass0+1, and so on.
112 /// The (first) user defined class, subsequent user defined classes are
113 /// UserClass0+1, and so on.
117 /// Kind - The class kind, which is either a predefined kind, or (UserClass0 +
118 /// N) for the Nth user defined class.
121 /// SuperClasses - The super classes of this class. Note that for simplicities
122 /// sake user operands only record their immediate super class, while register
123 /// operands include all superclasses.
124 std::vector<ClassInfo*> SuperClasses;
126 /// Name - The full class name, suitable for use in an enum.
129 /// ClassName - The unadorned generic name for this class (e.g., Token).
130 std::string ClassName;
132 /// ValueName - The name of the value this class represents; for a token this
133 /// is the literal token string, for an operand it is the TableGen class (or
134 /// empty if this is a derived class).
135 std::string ValueName;
137 /// PredicateMethod - The name of the operand method to test whether the
138 /// operand matches this class; this is not valid for Token or register kinds.
139 std::string PredicateMethod;
141 /// RenderMethod - The name of the operand method to add this operand to an
142 /// MCInst; this is not valid for Token or register kinds.
143 std::string RenderMethod;
145 /// For register classes, the records for all the registers in this class.
146 std::set<Record*> Registers;
149 /// isRegisterClass() - Check if this is a register class.
150 bool isRegisterClass() const {
151 return Kind >= RegisterClass0 && Kind < UserClass0;
154 /// isUserClass() - Check if this is a user defined class.
155 bool isUserClass() const {
156 return Kind >= UserClass0;
159 /// isRelatedTo - Check whether this class is "related" to \arg RHS. Classes
160 /// are related if they are in the same class hierarchy.
161 bool isRelatedTo(const ClassInfo &RHS) const {
162 // Tokens are only related to tokens.
163 if (Kind == Token || RHS.Kind == Token)
164 return Kind == Token && RHS.Kind == Token;
166 // Registers classes are only related to registers classes, and only if
167 // their intersection is non-empty.
168 if (isRegisterClass() || RHS.isRegisterClass()) {
169 if (!isRegisterClass() || !RHS.isRegisterClass())
172 std::set<Record*> Tmp;
173 std::insert_iterator< std::set<Record*> > II(Tmp, Tmp.begin());
174 std::set_intersection(Registers.begin(), Registers.end(),
175 RHS.Registers.begin(), RHS.Registers.end(),
181 // Otherwise we have two users operands; they are related if they are in the
182 // same class hierarchy.
184 // FIXME: This is an oversimplification, they should only be related if they
185 // intersect, however we don't have that information.
186 assert(isUserClass() && RHS.isUserClass() && "Unexpected class!");
187 const ClassInfo *Root = this;
188 while (!Root->SuperClasses.empty())
189 Root = Root->SuperClasses.front();
191 const ClassInfo *RHSRoot = &RHS;
192 while (!RHSRoot->SuperClasses.empty())
193 RHSRoot = RHSRoot->SuperClasses.front();
195 return Root == RHSRoot;
198 /// isSubsetOf - Test whether this class is a subset of \arg RHS;
199 bool isSubsetOf(const ClassInfo &RHS) const {
200 // This is a subset of RHS if it is the same class...
204 // ... or if any of its super classes are a subset of RHS.
205 for (std::vector<ClassInfo*>::const_iterator it = SuperClasses.begin(),
206 ie = SuperClasses.end(); it != ie; ++it)
207 if ((*it)->isSubsetOf(RHS))
213 /// operator< - Compare two classes.
214 bool operator<(const ClassInfo &RHS) const {
218 // Unrelated classes can be ordered by kind.
219 if (!isRelatedTo(RHS))
220 return Kind < RHS.Kind;
224 assert(0 && "Invalid kind!");
226 // Tokens are comparable by value.
228 // FIXME: Compare by enum value.
229 return ValueName < RHS.ValueName;
232 // This class preceeds the RHS if it is a proper subset of the RHS.
235 if (RHS.isSubsetOf(*this))
238 // Otherwise, order by name to ensure we have a total ordering.
239 return ValueName < RHS.ValueName;
244 /// MatchableInfo - Helper class for storing the necessary information for an
245 /// instruction or alias which is capable of being matched.
246 struct MatchableInfo {
248 /// Token - This is the token that the operand came from.
251 /// The unique class instance this operand should match.
254 /// The operand name this is, if anything.
257 explicit AsmOperand(StringRef T) : Token(T), Class(0) {}
260 /// ResOperand - This represents a single operand in the result instruction
261 /// generated by the match. In cases (like addressing modes) where a single
262 /// assembler operand expands to multiple MCOperands, this represents the
263 /// single assembler operand, not the MCOperand.
266 /// RenderAsmOperand - This represents an operand result that is
267 /// generated by calling the render method on the assembly operand. The
268 /// corresponding AsmOperand is specified by AsmOperandNum.
271 /// TiedOperand - This represents a result operand that is a duplicate of
272 /// a previous result operand.
277 /// This is the operand # in the AsmOperands list that this should be
279 unsigned AsmOperandNum;
281 /// TiedOperandNum - This is the (earlier) result operand that should be
283 unsigned TiedOperandNum;
286 /// OpInfo - This is the information about the instruction operand that is
288 const CGIOperandList::OperandInfo *OpInfo;
290 static ResOperand getRenderedOp(unsigned AsmOpNum,
291 const CGIOperandList::OperandInfo *Op) {
293 X.Kind = RenderAsmOperand;
294 X.AsmOperandNum = AsmOpNum;
299 static ResOperand getTiedOp(unsigned TiedOperandNum,
300 const CGIOperandList::OperandInfo *Op) {
302 X.Kind = TiedOperand;
303 X.TiedOperandNum = TiedOperandNum;
309 /// InstrName - The target name for this instruction.
310 std::string InstrName;
312 /// TheDef - This is the definition of the instruction or InstAlias that this
313 /// matchable came from.
314 Record *const TheDef;
316 /// DefRec - This is the definition that it came from.
317 PointerUnion<const CodeGenInstruction*, const CodeGenInstAlias*> DefRec;
320 const CGIOperandList &TheOperandList;
323 /// ResOperands - This is the operand list that should be built for the result
325 std::vector<ResOperand> ResOperands;
327 /// AsmString - The assembly string for this instruction (with variants
328 /// removed), e.g. "movsx $src, $dst".
329 std::string AsmString;
331 /// Mnemonic - This is the first token of the matched instruction, its
335 /// AsmOperands - The textual operands that this instruction matches,
336 /// annotated with a class and where in the OperandList they were defined.
337 /// This directly corresponds to the tokenized AsmString after the mnemonic is
339 SmallVector<AsmOperand, 4> AsmOperands;
341 /// Predicates - The required subtarget features to match this instruction.
342 SmallVector<SubtargetFeatureInfo*, 4> RequiredFeatures;
344 /// ConversionFnKind - The enum value which is passed to the generated
345 /// ConvertToMCInst to convert parsed operands into an MCInst for this
347 std::string ConversionFnKind;
349 MatchableInfo(const CodeGenInstruction &CGI)
350 : TheDef(CGI.TheDef), DefRec(&CGI),
351 TheOperandList(CGI.Operands), AsmString(CGI.AsmString) {
352 InstrName = TheDef->getName();
355 MatchableInfo(const CodeGenInstAlias *Alias)
356 : TheDef(Alias->TheDef), DefRec(Alias), TheOperandList(Alias->Operands),
357 AsmString(Alias->AsmString) {
358 // FIXME: InstrName should be a CGI.
359 InstrName = Alias->ResultInst->TheDef->getName();
362 void Initialize(const AsmMatcherInfo &Info,
363 SmallPtrSet<Record*, 16> &SingletonRegisters);
365 /// Validate - Return true if this matchable is a valid thing to match against
366 /// and perform a bunch of validity checking.
367 bool Validate(StringRef CommentDelimiter, bool Hack) const;
369 /// getSingletonRegisterForAsmOperand - If the specified token is a singleton
370 /// register, return the Record for it, otherwise return null.
371 Record *getSingletonRegisterForAsmOperand(unsigned i,
372 const AsmMatcherInfo &Info) const;
374 int FindAsmOperandNamed(StringRef N) const {
375 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
376 if (N == AsmOperands[i].SrcOpName)
381 void BuildResultOperands();
383 /// operator< - Compare two matchables.
384 bool operator<(const MatchableInfo &RHS) const {
385 // The primary comparator is the instruction mnemonic.
386 if (Mnemonic != RHS.Mnemonic)
387 return Mnemonic < RHS.Mnemonic;
389 if (AsmOperands.size() != RHS.AsmOperands.size())
390 return AsmOperands.size() < RHS.AsmOperands.size();
392 // Compare lexicographically by operand. The matcher validates that other
393 // orderings wouldn't be ambiguous using \see CouldMatchAmiguouslyWith().
394 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
395 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
397 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
404 /// CouldMatchAmiguouslyWith - Check whether this matchable could
405 /// ambiguously match the same set of operands as \arg RHS (without being a
406 /// strictly superior match).
407 bool CouldMatchAmiguouslyWith(const MatchableInfo &RHS) {
408 // The primary comparator is the instruction mnemonic.
409 if (Mnemonic != RHS.Mnemonic)
412 // The number of operands is unambiguous.
413 if (AsmOperands.size() != RHS.AsmOperands.size())
416 // Otherwise, make sure the ordering of the two instructions is unambiguous
417 // by checking that either (a) a token or operand kind discriminates them,
418 // or (b) the ordering among equivalent kinds is consistent.
420 // Tokens and operand kinds are unambiguous (assuming a correct target
422 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i)
423 if (AsmOperands[i].Class->Kind != RHS.AsmOperands[i].Class->Kind ||
424 AsmOperands[i].Class->Kind == ClassInfo::Token)
425 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class ||
426 *RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
429 // Otherwise, this operand could commute if all operands are equivalent, or
430 // there is a pair of operands that compare less than and a pair that
431 // compare greater than.
432 bool HasLT = false, HasGT = false;
433 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
434 if (*AsmOperands[i].Class < *RHS.AsmOperands[i].Class)
436 if (*RHS.AsmOperands[i].Class < *AsmOperands[i].Class)
440 return !(HasLT ^ HasGT);
446 void TokenizeAsmString(const AsmMatcherInfo &Info);
449 /// SubtargetFeatureInfo - Helper class for storing information on a subtarget
450 /// feature which participates in instruction matching.
451 struct SubtargetFeatureInfo {
452 /// \brief The predicate record for this feature.
455 /// \brief An unique index assigned to represent this feature.
458 SubtargetFeatureInfo(Record *D, unsigned Idx) : TheDef(D), Index(Idx) {}
460 /// \brief The name of the enumerated constant identifying this feature.
461 std::string getEnumName() const {
462 return "Feature_" + TheDef->getName();
466 class AsmMatcherInfo {
468 /// The tablegen AsmParser record.
471 /// Target - The target information.
472 CodeGenTarget &Target;
474 /// The AsmParser "RegisterPrefix" value.
475 std::string RegisterPrefix;
477 /// The classes which are needed for matching.
478 std::vector<ClassInfo*> Classes;
480 /// The information on the matchables to match.
481 std::vector<MatchableInfo*> Matchables;
483 /// Map of Register records to their class information.
484 std::map<Record*, ClassInfo*> RegisterClasses;
486 /// Map of Predicate records to their subtarget information.
487 std::map<Record*, SubtargetFeatureInfo*> SubtargetFeatures;
490 /// Map of token to class information which has already been constructed.
491 std::map<std::string, ClassInfo*> TokenClasses;
493 /// Map of RegisterClass records to their class information.
494 std::map<Record*, ClassInfo*> RegisterClassClasses;
496 /// Map of AsmOperandClass records to their class information.
497 std::map<Record*, ClassInfo*> AsmOperandClasses;
500 /// getTokenClass - Lookup or create the class for the given token.
501 ClassInfo *getTokenClass(StringRef Token);
503 /// getOperandClass - Lookup or create the class for the given operand.
504 ClassInfo *getOperandClass(const CGIOperandList::OperandInfo &OI);
506 /// BuildRegisterClasses - Build the ClassInfo* instances for register
508 void BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters);
510 /// BuildOperandClasses - Build the ClassInfo* instances for user defined
512 void BuildOperandClasses();
514 void BuildInstructionOperandReference(MatchableInfo *II,
516 MatchableInfo::AsmOperand &Op);
517 void BuildAliasOperandReference(MatchableInfo *II,
519 MatchableInfo::AsmOperand &Op);
522 AsmMatcherInfo(Record *AsmParser, CodeGenTarget &Target);
524 /// BuildInfo - Construct the various tables used during matching.
527 /// getSubtargetFeature - Lookup or create the subtarget feature info for the
529 SubtargetFeatureInfo *getSubtargetFeature(Record *Def) const {
530 assert(Def->isSubClassOf("Predicate") && "Invalid predicate type!");
531 std::map<Record*, SubtargetFeatureInfo*>::const_iterator I =
532 SubtargetFeatures.find(Def);
533 return I == SubtargetFeatures.end() ? 0 : I->second;
539 void MatchableInfo::dump() {
540 errs() << InstrName << " -- " << "flattened:\"" << AsmString << "\"\n";
542 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
543 AsmOperand &Op = AsmOperands[i];
544 errs() << " op[" << i << "] = " << Op.Class->ClassName << " - ";
545 errs() << '\"' << Op.Token << "\"\n";
547 if (!Op.OperandInfo) {
548 errs() << "(singleton register)\n";
552 const CGIOperandList::OperandInfo &OI = *Op.OperandInfo;
553 errs() << OI.Name << " " << OI.Rec->getName()
554 << " (" << OI.MIOperandNo << ", " << OI.MINumOperands << ")\n";
559 void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
560 SmallPtrSet<Record*, 16> &SingletonRegisters) {
561 // TODO: Eventually support asmparser for Variant != 0.
562 AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0);
564 TokenizeAsmString(Info);
566 // Compute the require features.
567 std::vector<Record*> Predicates =TheDef->getValueAsListOfDefs("Predicates");
568 for (unsigned i = 0, e = Predicates.size(); i != e; ++i)
569 if (SubtargetFeatureInfo *Feature =
570 Info.getSubtargetFeature(Predicates[i]))
571 RequiredFeatures.push_back(Feature);
573 // Collect singleton registers, if used.
574 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
575 if (Record *Reg = getSingletonRegisterForAsmOperand(i, Info))
576 SingletonRegisters.insert(Reg);
580 /// TokenizeAsmString - Tokenize a simplified assembly string.
581 void MatchableInfo::TokenizeAsmString(const AsmMatcherInfo &Info) {
582 StringRef String = AsmString;
585 for (unsigned i = 0, e = String.size(); i != e; ++i) {
595 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
598 if (!isspace(String[i]) && String[i] != ',')
599 AsmOperands.push_back(AsmOperand(String.substr(i, 1)));
605 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
609 assert(i != String.size() && "Invalid quoted character");
610 AsmOperands.push_back(AsmOperand(String.substr(i, 1)));
615 // If this isn't "${", treat like a normal token.
616 if (i + 1 == String.size() || String[i + 1] != '{') {
618 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
626 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
630 StringRef::iterator End = std::find(String.begin() + i, String.end(),'}');
631 assert(End != String.end() && "Missing brace in operand reference!");
632 size_t EndPos = End - String.begin();
633 AsmOperands.push_back(AsmOperand(String.slice(i, EndPos+1)));
641 AsmOperands.push_back(AsmOperand(String.slice(Prev, i)));
650 if (InTok && Prev != String.size())
651 AsmOperands.push_back(AsmOperand(String.substr(Prev)));
653 // The first token of the instruction is the mnemonic, which must be a
654 // simple string, not a $foo variable or a singleton register.
655 assert(!AsmOperands.empty() && "Instruction has no tokens?");
656 Mnemonic = AsmOperands[0].Token;
657 if (Mnemonic[0] == '$' || getSingletonRegisterForAsmOperand(0, Info))
658 throw TGError(TheDef->getLoc(),
659 "Invalid instruction mnemonic '" + Mnemonic.str() + "'!");
661 // Remove the first operand, it is tracked in the mnemonic field.
662 AsmOperands.erase(AsmOperands.begin());
667 bool MatchableInfo::Validate(StringRef CommentDelimiter, bool Hack) const {
668 // Reject matchables with no .s string.
669 if (AsmString.empty())
670 throw TGError(TheDef->getLoc(), "instruction with empty asm string");
672 // Reject any matchables with a newline in them, they should be marked
673 // isCodeGenOnly if they are pseudo instructions.
674 if (AsmString.find('\n') != std::string::npos)
675 throw TGError(TheDef->getLoc(),
676 "multiline instruction is not valid for the asmparser, "
677 "mark it isCodeGenOnly");
679 // Remove comments from the asm string. We know that the asmstring only
681 if (!CommentDelimiter.empty() &&
682 StringRef(AsmString).find(CommentDelimiter) != StringRef::npos)
683 throw TGError(TheDef->getLoc(),
684 "asmstring for instruction has comment character in it, "
685 "mark it isCodeGenOnly");
687 // Reject matchables with operand modifiers, these aren't something we can
688 /// handle, the target should be refactored to use operands instead of
691 // Also, check for instructions which reference the operand multiple times;
692 // this implies a constraint we would not honor.
693 std::set<std::string> OperandNames;
694 for (unsigned i = 0, e = AsmOperands.size(); i != e; ++i) {
695 StringRef Tok = AsmOperands[i].Token;
696 if (Tok[0] == '$' && Tok.find(':') != StringRef::npos)
697 throw TGError(TheDef->getLoc(),
698 "matchable with operand modifier '" + Tok.str() +
699 "' not supported by asm matcher. Mark isCodeGenOnly!");
701 // Verify that any operand is only mentioned once.
702 // We reject aliases and ignore instructions for now.
703 if (Tok[0] == '$' && !OperandNames.insert(Tok).second) {
705 throw TGError(TheDef->getLoc(),
706 "ERROR: matchable with tied operand '" + Tok.str() +
707 "' can never be matched!");
708 // FIXME: Should reject these. The ARM backend hits this with $lane in a
709 // bunch of instructions. It is unclear what the right answer is.
711 errs() << "warning: '" << InstrName << "': "
712 << "ignoring instruction with tied operand '"
713 << Tok.str() << "'\n";
723 /// getSingletonRegisterForAsmOperand - If the specified token is a singleton
724 /// register, return the register name, otherwise return a null StringRef.
725 Record *MatchableInfo::
726 getSingletonRegisterForAsmOperand(unsigned i, const AsmMatcherInfo &Info) const{
727 StringRef Tok = AsmOperands[i].Token;
728 if (!Tok.startswith(Info.RegisterPrefix))
731 StringRef RegName = Tok.substr(Info.RegisterPrefix.size());
732 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName))
735 // If there is no register prefix (i.e. "%" in "%eax"), then this may
736 // be some random non-register token, just ignore it.
737 if (Info.RegisterPrefix.empty())
740 // Otherwise, we have something invalid prefixed with the register prefix,
742 std::string Err = "unable to find register for '" + RegName.str() +
743 "' (which matches register prefix)";
744 throw TGError(TheDef->getLoc(), Err);
748 static std::string getEnumNameForToken(StringRef Str) {
751 for (StringRef::iterator it = Str.begin(), ie = Str.end(); it != ie; ++it) {
753 case '*': Res += "_STAR_"; break;
754 case '%': Res += "_PCT_"; break;
755 case ':': Res += "_COLON_"; break;
760 Res += "_" + utostr((unsigned) *it) + "_";
767 ClassInfo *AsmMatcherInfo::getTokenClass(StringRef Token) {
768 ClassInfo *&Entry = TokenClasses[Token];
771 Entry = new ClassInfo();
772 Entry->Kind = ClassInfo::Token;
773 Entry->ClassName = "Token";
774 Entry->Name = "MCK_" + getEnumNameForToken(Token);
775 Entry->ValueName = Token;
776 Entry->PredicateMethod = "<invalid>";
777 Entry->RenderMethod = "<invalid>";
778 Classes.push_back(Entry);
785 AsmMatcherInfo::getOperandClass(const CGIOperandList::OperandInfo &OI) {
786 if (OI.Rec->isSubClassOf("RegisterClass")) {
787 if (ClassInfo *CI = RegisterClassClasses[OI.Rec])
789 throw TGError(OI.Rec->getLoc(), "register class has no class info!");
792 assert(OI.Rec->isSubClassOf("Operand") && "Unexpected operand!");
793 Record *MatchClass = OI.Rec->getValueAsDef("ParserMatchClass");
794 if (ClassInfo *CI = AsmOperandClasses[MatchClass])
797 throw TGError(OI.Rec->getLoc(), "operand has no match class!");
800 void AsmMatcherInfo::
801 BuildRegisterClasses(SmallPtrSet<Record*, 16> &SingletonRegisters) {
802 const std::vector<CodeGenRegister> &Registers = Target.getRegisters();
803 const std::vector<CodeGenRegisterClass> &RegClassList =
804 Target.getRegisterClasses();
806 // The register sets used for matching.
807 std::set< std::set<Record*> > RegisterSets;
809 // Gather the defined sets.
810 for (std::vector<CodeGenRegisterClass>::const_iterator it =
811 RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it)
812 RegisterSets.insert(std::set<Record*>(it->Elements.begin(),
813 it->Elements.end()));
815 // Add any required singleton sets.
816 for (SmallPtrSet<Record*, 16>::iterator it = SingletonRegisters.begin(),
817 ie = SingletonRegisters.end(); it != ie; ++it) {
819 RegisterSets.insert(std::set<Record*>(&Rec, &Rec + 1));
822 // Introduce derived sets where necessary (when a register does not determine
823 // a unique register set class), and build the mapping of registers to the set
824 // they should classify to.
825 std::map<Record*, std::set<Record*> > RegisterMap;
826 for (std::vector<CodeGenRegister>::const_iterator it = Registers.begin(),
827 ie = Registers.end(); it != ie; ++it) {
828 const CodeGenRegister &CGR = *it;
829 // Compute the intersection of all sets containing this register.
830 std::set<Record*> ContainingSet;
832 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
833 ie = RegisterSets.end(); it != ie; ++it) {
834 if (!it->count(CGR.TheDef))
837 if (ContainingSet.empty()) {
842 std::set<Record*> Tmp;
843 std::swap(Tmp, ContainingSet);
844 std::insert_iterator< std::set<Record*> > II(ContainingSet,
845 ContainingSet.begin());
846 std::set_intersection(Tmp.begin(), Tmp.end(), it->begin(), it->end(), II);
849 if (!ContainingSet.empty()) {
850 RegisterSets.insert(ContainingSet);
851 RegisterMap.insert(std::make_pair(CGR.TheDef, ContainingSet));
855 // Construct the register classes.
856 std::map<std::set<Record*>, ClassInfo*> RegisterSetClasses;
858 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
859 ie = RegisterSets.end(); it != ie; ++it, ++Index) {
860 ClassInfo *CI = new ClassInfo();
861 CI->Kind = ClassInfo::RegisterClass0 + Index;
862 CI->ClassName = "Reg" + utostr(Index);
863 CI->Name = "MCK_Reg" + utostr(Index);
865 CI->PredicateMethod = ""; // unused
866 CI->RenderMethod = "addRegOperands";
868 Classes.push_back(CI);
869 RegisterSetClasses.insert(std::make_pair(*it, CI));
872 // Find the superclasses; we could compute only the subgroup lattice edges,
873 // but there isn't really a point.
874 for (std::set< std::set<Record*> >::iterator it = RegisterSets.begin(),
875 ie = RegisterSets.end(); it != ie; ++it) {
876 ClassInfo *CI = RegisterSetClasses[*it];
877 for (std::set< std::set<Record*> >::iterator it2 = RegisterSets.begin(),
878 ie2 = RegisterSets.end(); it2 != ie2; ++it2)
880 std::includes(it2->begin(), it2->end(), it->begin(), it->end()))
881 CI->SuperClasses.push_back(RegisterSetClasses[*it2]);
884 // Name the register classes which correspond to a user defined RegisterClass.
885 for (std::vector<CodeGenRegisterClass>::const_iterator
886 it = RegClassList.begin(), ie = RegClassList.end(); it != ie; ++it) {
887 ClassInfo *CI = RegisterSetClasses[std::set<Record*>(it->Elements.begin(),
888 it->Elements.end())];
889 if (CI->ValueName.empty()) {
890 CI->ClassName = it->getName();
891 CI->Name = "MCK_" + it->getName();
892 CI->ValueName = it->getName();
894 CI->ValueName = CI->ValueName + "," + it->getName();
896 RegisterClassClasses.insert(std::make_pair(it->TheDef, CI));
899 // Populate the map for individual registers.
900 for (std::map<Record*, std::set<Record*> >::iterator it = RegisterMap.begin(),
901 ie = RegisterMap.end(); it != ie; ++it)
902 RegisterClasses[it->first] = RegisterSetClasses[it->second];
904 // Name the register classes which correspond to singleton registers.
905 for (SmallPtrSet<Record*, 16>::iterator it = SingletonRegisters.begin(),
906 ie = SingletonRegisters.end(); it != ie; ++it) {
908 ClassInfo *CI = RegisterClasses[Rec];
909 assert(CI && "Missing singleton register class info!");
911 if (CI->ValueName.empty()) {
912 CI->ClassName = Rec->getName();
913 CI->Name = "MCK_" + Rec->getName();
914 CI->ValueName = Rec->getName();
916 CI->ValueName = CI->ValueName + "," + Rec->getName();
920 void AsmMatcherInfo::BuildOperandClasses() {
921 std::vector<Record*> AsmOperands =
922 Records.getAllDerivedDefinitions("AsmOperandClass");
924 // Pre-populate AsmOperandClasses map.
925 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
926 ie = AsmOperands.end(); it != ie; ++it)
927 AsmOperandClasses[*it] = new ClassInfo();
930 for (std::vector<Record*>::iterator it = AsmOperands.begin(),
931 ie = AsmOperands.end(); it != ie; ++it, ++Index) {
932 ClassInfo *CI = AsmOperandClasses[*it];
933 CI->Kind = ClassInfo::UserClass0 + Index;
935 ListInit *Supers = (*it)->getValueAsListInit("SuperClasses");
936 for (unsigned i = 0, e = Supers->getSize(); i != e; ++i) {
937 DefInit *DI = dynamic_cast<DefInit*>(Supers->getElement(i));
939 PrintError((*it)->getLoc(), "Invalid super class reference!");
943 ClassInfo *SC = AsmOperandClasses[DI->getDef()];
945 PrintError((*it)->getLoc(), "Invalid super class reference!");
947 CI->SuperClasses.push_back(SC);
949 CI->ClassName = (*it)->getValueAsString("Name");
950 CI->Name = "MCK_" + CI->ClassName;
951 CI->ValueName = (*it)->getName();
953 // Get or construct the predicate method name.
954 Init *PMName = (*it)->getValueInit("PredicateMethod");
955 if (StringInit *SI = dynamic_cast<StringInit*>(PMName)) {
956 CI->PredicateMethod = SI->getValue();
958 assert(dynamic_cast<UnsetInit*>(PMName) &&
959 "Unexpected PredicateMethod field!");
960 CI->PredicateMethod = "is" + CI->ClassName;
963 // Get or construct the render method name.
964 Init *RMName = (*it)->getValueInit("RenderMethod");
965 if (StringInit *SI = dynamic_cast<StringInit*>(RMName)) {
966 CI->RenderMethod = SI->getValue();
968 assert(dynamic_cast<UnsetInit*>(RMName) &&
969 "Unexpected RenderMethod field!");
970 CI->RenderMethod = "add" + CI->ClassName + "Operands";
973 AsmOperandClasses[*it] = CI;
974 Classes.push_back(CI);
978 AsmMatcherInfo::AsmMatcherInfo(Record *asmParser, CodeGenTarget &target)
979 : AsmParser(asmParser), Target(target),
980 RegisterPrefix(AsmParser->getValueAsString("RegisterPrefix")) {
984 void AsmMatcherInfo::BuildInfo() {
985 // Build information about all of the AssemblerPredicates.
986 std::vector<Record*> AllPredicates =
987 Records.getAllDerivedDefinitions("Predicate");
988 for (unsigned i = 0, e = AllPredicates.size(); i != e; ++i) {
989 Record *Pred = AllPredicates[i];
990 // Ignore predicates that are not intended for the assembler.
991 if (!Pred->getValueAsBit("AssemblerMatcherPredicate"))
994 if (Pred->getName().empty())
995 throw TGError(Pred->getLoc(), "Predicate has no name!");
997 unsigned FeatureNo = SubtargetFeatures.size();
998 SubtargetFeatures[Pred] = new SubtargetFeatureInfo(Pred, FeatureNo);
999 assert(FeatureNo < 32 && "Too many subtarget features!");
1002 StringRef CommentDelimiter = AsmParser->getValueAsString("CommentDelimiter");
1004 // Parse the instructions; we need to do this first so that we can gather the
1005 // singleton register classes.
1006 SmallPtrSet<Record*, 16> SingletonRegisters;
1007 for (CodeGenTarget::inst_iterator I = Target.inst_begin(),
1008 E = Target.inst_end(); I != E; ++I) {
1009 const CodeGenInstruction &CGI = **I;
1011 // If the tblgen -match-prefix option is specified (for tblgen hackers),
1012 // filter the set of instructions we consider.
1013 if (!StringRef(CGI.TheDef->getName()).startswith(MatchPrefix))
1016 // Ignore "codegen only" instructions.
1017 if (CGI.TheDef->getValueAsBit("isCodeGenOnly"))
1020 // Validate the operand list to ensure we can handle this instruction.
1021 for (unsigned i = 0, e = CGI.Operands.size(); i != e; ++i) {
1022 const CGIOperandList::OperandInfo &OI = CGI.Operands[i];
1024 // Validate tied operands.
1025 if (OI.getTiedRegister() != -1) {
1026 // If we have a tied operand that consists of multiple MCOperands, reject
1027 // it. We reject aliases and ignore instructions for now.
1028 if (OI.MINumOperands != 1) {
1029 // FIXME: Should reject these. The ARM backend hits this with $lane
1030 // in a bunch of instructions. It is unclear what the right answer is.
1032 errs() << "warning: '" << CGI.TheDef->getName() << "': "
1033 << "ignoring instruction with multi-operand tied operand '"
1034 << OI.Name << "'\n";
1041 OwningPtr<MatchableInfo> II(new MatchableInfo(CGI));
1043 II->Initialize(*this, SingletonRegisters);
1045 // Ignore instructions which shouldn't be matched and diagnose invalid
1046 // instruction definitions with an error.
1047 if (!II->Validate(CommentDelimiter, true))
1050 // Ignore "Int_*" and "*_Int" instructions, which are internal aliases.
1052 // FIXME: This is a total hack.
1053 if (StringRef(II->InstrName).startswith("Int_") ||
1054 StringRef(II->InstrName).endswith("_Int"))
1057 Matchables.push_back(II.take());
1060 // Parse all of the InstAlias definitions and stick them in the list of
1062 std::vector<Record*> AllInstAliases =
1063 Records.getAllDerivedDefinitions("InstAlias");
1064 for (unsigned i = 0, e = AllInstAliases.size(); i != e; ++i) {
1065 CodeGenInstAlias *Alias = new CodeGenInstAlias(AllInstAliases[i], Target);
1067 OwningPtr<MatchableInfo> II(new MatchableInfo(Alias));
1069 II->Initialize(*this, SingletonRegisters);
1071 // Validate the alias definitions.
1072 II->Validate(CommentDelimiter, false);
1074 Matchables.push_back(II.take());
1077 // Build info for the register classes.
1078 BuildRegisterClasses(SingletonRegisters);
1080 // Build info for the user defined assembly operand classes.
1081 BuildOperandClasses();
1083 // Build the information about matchables, now that we have fully formed
1085 for (std::vector<MatchableInfo*>::iterator it = Matchables.begin(),
1086 ie = Matchables.end(); it != ie; ++it) {
1087 MatchableInfo *II = *it;
1089 // Parse the tokens after the mnemonic.
1090 for (unsigned i = 0, e = II->AsmOperands.size(); i != e; ++i) {
1091 MatchableInfo::AsmOperand &Op = II->AsmOperands[i];
1092 StringRef Token = Op.Token;
1094 // Check for singleton registers.
1095 if (Record *RegRecord = II->getSingletonRegisterForAsmOperand(i, *this)) {
1096 Op.Class = RegisterClasses[RegRecord];
1097 assert(Op.Class && Op.Class->Registers.size() == 1 &&
1098 "Unexpected class for singleton register");
1102 // Check for simple tokens.
1103 if (Token[0] != '$') {
1104 Op.Class = getTokenClass(Token);
1108 // Otherwise this is an operand reference.
1109 StringRef OperandName;
1110 if (Token[1] == '{')
1111 OperandName = Token.substr(2, Token.size() - 3);
1113 OperandName = Token.substr(1);
1115 if (II->DefRec.is<const CodeGenInstruction*>())
1116 BuildInstructionOperandReference(II, OperandName, Op);
1118 BuildAliasOperandReference(II, OperandName, Op);
1121 II->BuildResultOperands();
1124 // Reorder classes so that classes preceed super classes.
1125 std::sort(Classes.begin(), Classes.end(), less_ptr<ClassInfo>());
1128 /// BuildInstructionOperandReference - The specified operand is a reference to a
1129 /// named operand such as $src. Resolve the Class and OperandInfo pointers.
1130 void AsmMatcherInfo::
1131 BuildInstructionOperandReference(MatchableInfo *II,
1132 StringRef OperandName,
1133 MatchableInfo::AsmOperand &Op) {
1134 const CodeGenInstruction &CGI = *II->DefRec.get<const CodeGenInstruction*>();
1135 const CGIOperandList &Operands = CGI.Operands;
1137 // Map this token to an operand. FIXME: Move elsewhere.
1139 if (!Operands.hasOperandNamed(OperandName, Idx))
1140 throw TGError(II->TheDef->getLoc(), "error: unable to find operand: '" +
1141 OperandName.str() + "'");
1143 // Set up the operand class.
1144 Op.Class = getOperandClass(Operands[Idx]);
1146 // If the named operand is tied, canonicalize it to the untied operand.
1147 // For example, something like:
1148 // (outs GPR:$dst), (ins GPR:$src)
1149 // with an asmstring of
1151 // we want to canonicalize to:
1153 // so that we know how to provide the $dst operand when filling in the result.
1154 int OITied = Operands[Idx].getTiedRegister();
1156 // The tied operand index is an MIOperand index, find the operand that
1158 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
1159 if (Operands[i].MIOperandNo == unsigned(OITied)) {
1160 OperandName = Operands[i].Name;
1166 Op.SrcOpName = OperandName;
1169 void AsmMatcherInfo::BuildAliasOperandReference(MatchableInfo *II,
1170 StringRef OperandName,
1171 MatchableInfo::AsmOperand &Op) {
1172 const CodeGenInstAlias &CGA = *II->DefRec.get<const CodeGenInstAlias*>();
1175 // FIXME: This is a total hack, it should not be a copy of
1176 // BuildInstructionOperandReference
1178 const CGIOperandList &Operands = CGA.Operands;
1180 // Map this token to an operand. FIXME: Move elsewhere.
1182 if (!Operands.hasOperandNamed(OperandName, Idx))
1183 throw TGError(II->TheDef->getLoc(), "error: unable to find operand: '" +
1184 OperandName.str() + "'");
1186 // Set up the operand class.
1187 Op.Class = getOperandClass(Operands[Idx]);
1189 // If the named operand is tied, canonicalize it to the untied operand.
1190 // For example, something like:
1191 // (outs GPR:$dst), (ins GPR:$src)
1192 // with an asmstring of
1194 // we want to canonicalize to:
1196 // so that we know how to provide the $dst operand when filling in the result.
1197 int OITied = Operands[Idx].getTiedRegister();
1199 // The tied operand index is an MIOperand index, find the operand that
1201 for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
1202 if (Operands[i].MIOperandNo == unsigned(OITied)) {
1203 OperandName = Operands[i].Name;
1209 Op.SrcOpName = OperandName;
1212 void MatchableInfo::BuildResultOperands() {
1213 for (unsigned i = 0, e = TheOperandList.size(); i != e; ++i) {
1214 const CGIOperandList::OperandInfo &OpInfo = TheOperandList[i];
1216 // If this is a tied operand, just copy from the previously handled operand.
1217 int TiedOp = OpInfo.getTiedRegister();
1219 ResOperands.push_back(ResOperand::getTiedOp(TiedOp, &OpInfo));
1223 // Find out what operand from the asmparser that this MCInst operand comes
1225 int SrcOperand = FindAsmOperandNamed(OpInfo.Name);
1227 if (!OpInfo.Name.empty() && SrcOperand != -1) {
1228 ResOperands.push_back(ResOperand::getRenderedOp(SrcOperand, &OpInfo));
1232 throw TGError(TheDef->getLoc(), "Instruction '" +
1233 TheDef->getName() + "' has operand '" + OpInfo.Name +
1234 "' that doesn't appear in asm string!");
1239 static void EmitConvertToMCInst(CodeGenTarget &Target,
1240 std::vector<MatchableInfo*> &Infos,
1242 // Write the convert function to a separate stream, so we can drop it after
1244 std::string ConvertFnBody;
1245 raw_string_ostream CvtOS(ConvertFnBody);
1247 // Function we have already generated.
1248 std::set<std::string> GeneratedFns;
1250 // Start the unified conversion function.
1251 CvtOS << "static void ConvertToMCInst(ConversionKind Kind, MCInst &Inst, "
1252 << "unsigned Opcode,\n"
1253 << " const SmallVectorImpl<MCParsedAsmOperand*"
1254 << "> &Operands) {\n";
1255 CvtOS << " Inst.setOpcode(Opcode);\n";
1256 CvtOS << " switch (Kind) {\n";
1257 CvtOS << " default:\n";
1259 // Start the enum, which we will generate inline.
1261 OS << "// Unified function for converting operands to MCInst instances.\n\n";
1262 OS << "enum ConversionKind {\n";
1264 // TargetOperandClass - This is the target's operand class, like X86Operand.
1265 std::string TargetOperandClass = Target.getName() + "Operand";
1267 for (std::vector<MatchableInfo*>::const_iterator it = Infos.begin(),
1268 ie = Infos.end(); it != ie; ++it) {
1269 MatchableInfo &II = **it;
1271 // Build the conversion function signature.
1272 std::string Signature = "Convert";
1273 std::string CaseBody;
1274 raw_string_ostream CaseOS(CaseBody);
1276 // Compute the convert enum and the case body.
1277 for (unsigned i = 0, e = II.ResOperands.size(); i != e; ++i) {
1278 const MatchableInfo::ResOperand &OpInfo = II.ResOperands[i];
1280 // Generate code to populate each result operand.
1281 switch (OpInfo.Kind) {
1282 default: assert(0 && "Unknown result operand kind");
1283 case MatchableInfo::ResOperand::RenderAsmOperand: {
1284 // This comes from something we parsed.
1285 MatchableInfo::AsmOperand &Op = II.AsmOperands[OpInfo.AsmOperandNum];
1287 // Registers are always converted the same, don't duplicate the
1288 // conversion function based on them.
1290 if (Op.Class->isRegisterClass())
1293 Signature += Op.Class->ClassName;
1294 Signature += utostr(OpInfo.OpInfo->MINumOperands);
1295 Signature += "_" + itostr(OpInfo.AsmOperandNum);
1297 CaseOS << " ((" << TargetOperandClass << "*)Operands["
1298 << (OpInfo.AsmOperandNum+1) << "])->" << Op.Class->RenderMethod
1299 << "(Inst, " << OpInfo.OpInfo->MINumOperands << ");\n";
1303 case MatchableInfo::ResOperand::TiedOperand: {
1304 // If this operand is tied to a previous one, just copy the MCInst
1305 // operand from the earlier one.We can only tie single MCOperand values.
1306 //assert(OpInfo.OpInfo->MINumOperands == 1 && "Not a singular MCOperand");
1307 unsigned TiedOp = OpInfo.TiedOperandNum;
1308 assert(i > TiedOp && "Tied operand preceeds its target!");
1309 CaseOS << " Inst.addOperand(Inst.getOperand(" << TiedOp << "));\n";
1310 Signature += "__Tie" + utostr(TiedOp);
1316 II.ConversionFnKind = Signature;
1318 // Check if we have already generated this signature.
1319 if (!GeneratedFns.insert(Signature).second)
1322 // If not, emit it now. Add to the enum list.
1323 OS << " " << Signature << ",\n";
1325 CvtOS << " case " << Signature << ":\n";
1326 CvtOS << CaseOS.str();
1327 CvtOS << " return;\n";
1330 // Finish the convert function.
1335 // Finish the enum, and drop the convert function after it.
1337 OS << " NumConversionVariants\n";
1343 /// EmitMatchClassEnumeration - Emit the enumeration for match class kinds.
1344 static void EmitMatchClassEnumeration(CodeGenTarget &Target,
1345 std::vector<ClassInfo*> &Infos,
1347 OS << "namespace {\n\n";
1349 OS << "/// MatchClassKind - The kinds of classes which participate in\n"
1350 << "/// instruction matching.\n";
1351 OS << "enum MatchClassKind {\n";
1352 OS << " InvalidMatchClass = 0,\n";
1353 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1354 ie = Infos.end(); it != ie; ++it) {
1355 ClassInfo &CI = **it;
1356 OS << " " << CI.Name << ", // ";
1357 if (CI.Kind == ClassInfo::Token) {
1358 OS << "'" << CI.ValueName << "'\n";
1359 } else if (CI.isRegisterClass()) {
1360 if (!CI.ValueName.empty())
1361 OS << "register class '" << CI.ValueName << "'\n";
1363 OS << "derived register class\n";
1365 OS << "user defined class '" << CI.ValueName << "'\n";
1368 OS << " NumMatchClassKinds\n";
1374 /// EmitClassifyOperand - Emit the function to classify an operand.
1375 static void EmitClassifyOperand(AsmMatcherInfo &Info,
1377 OS << "static MatchClassKind ClassifyOperand(MCParsedAsmOperand *GOp) {\n"
1378 << " " << Info.Target.getName() << "Operand &Operand = *("
1379 << Info.Target.getName() << "Operand*)GOp;\n";
1382 OS << " if (Operand.isToken())\n";
1383 OS << " return MatchTokenString(Operand.getToken());\n\n";
1385 // Classify registers.
1387 // FIXME: Don't hardcode isReg, getReg.
1388 OS << " if (Operand.isReg()) {\n";
1389 OS << " switch (Operand.getReg()) {\n";
1390 OS << " default: return InvalidMatchClass;\n";
1391 for (std::map<Record*, ClassInfo*>::iterator
1392 it = Info.RegisterClasses.begin(), ie = Info.RegisterClasses.end();
1394 OS << " case " << Info.Target.getName() << "::"
1395 << it->first->getName() << ": return " << it->second->Name << ";\n";
1399 // Classify user defined operands.
1400 for (std::vector<ClassInfo*>::iterator it = Info.Classes.begin(),
1401 ie = Info.Classes.end(); it != ie; ++it) {
1402 ClassInfo &CI = **it;
1404 if (!CI.isUserClass())
1407 OS << " // '" << CI.ClassName << "' class";
1408 if (!CI.SuperClasses.empty()) {
1409 OS << ", subclass of ";
1410 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i) {
1412 OS << "'" << CI.SuperClasses[i]->ClassName << "'";
1413 assert(CI < *CI.SuperClasses[i] && "Invalid class relation!");
1418 OS << " if (Operand." << CI.PredicateMethod << "()) {\n";
1420 // Validate subclass relationships.
1421 if (!CI.SuperClasses.empty()) {
1422 for (unsigned i = 0, e = CI.SuperClasses.size(); i != e; ++i)
1423 OS << " assert(Operand." << CI.SuperClasses[i]->PredicateMethod
1424 << "() && \"Invalid class relationship!\");\n";
1427 OS << " return " << CI.Name << ";\n";
1430 OS << " return InvalidMatchClass;\n";
1434 /// EmitIsSubclass - Emit the subclass predicate function.
1435 static void EmitIsSubclass(CodeGenTarget &Target,
1436 std::vector<ClassInfo*> &Infos,
1438 OS << "/// IsSubclass - Compute whether \\arg A is a subclass of \\arg B.\n";
1439 OS << "static bool IsSubclass(MatchClassKind A, MatchClassKind B) {\n";
1440 OS << " if (A == B)\n";
1441 OS << " return true;\n\n";
1443 OS << " switch (A) {\n";
1444 OS << " default:\n";
1445 OS << " return false;\n";
1446 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1447 ie = Infos.end(); it != ie; ++it) {
1448 ClassInfo &A = **it;
1450 if (A.Kind != ClassInfo::Token) {
1451 std::vector<StringRef> SuperClasses;
1452 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1453 ie = Infos.end(); it != ie; ++it) {
1454 ClassInfo &B = **it;
1456 if (&A != &B && A.isSubsetOf(B))
1457 SuperClasses.push_back(B.Name);
1460 if (SuperClasses.empty())
1463 OS << "\n case " << A.Name << ":\n";
1465 if (SuperClasses.size() == 1) {
1466 OS << " return B == " << SuperClasses.back() << ";\n";
1470 OS << " switch (B) {\n";
1471 OS << " default: return false;\n";
1472 for (unsigned i = 0, e = SuperClasses.size(); i != e; ++i)
1473 OS << " case " << SuperClasses[i] << ": return true;\n";
1483 /// EmitMatchTokenString - Emit the function to match a token string to the
1484 /// appropriate match class value.
1485 static void EmitMatchTokenString(CodeGenTarget &Target,
1486 std::vector<ClassInfo*> &Infos,
1488 // Construct the match list.
1489 std::vector<StringMatcher::StringPair> Matches;
1490 for (std::vector<ClassInfo*>::iterator it = Infos.begin(),
1491 ie = Infos.end(); it != ie; ++it) {
1492 ClassInfo &CI = **it;
1494 if (CI.Kind == ClassInfo::Token)
1495 Matches.push_back(StringMatcher::StringPair(CI.ValueName,
1496 "return " + CI.Name + ";"));
1499 OS << "static MatchClassKind MatchTokenString(StringRef Name) {\n";
1501 StringMatcher("Name", Matches, OS).Emit();
1503 OS << " return InvalidMatchClass;\n";
1507 /// EmitMatchRegisterName - Emit the function to match a string to the target
1508 /// specific register enum.
1509 static void EmitMatchRegisterName(CodeGenTarget &Target, Record *AsmParser,
1511 // Construct the match list.
1512 std::vector<StringMatcher::StringPair> Matches;
1513 for (unsigned i = 0, e = Target.getRegisters().size(); i != e; ++i) {
1514 const CodeGenRegister &Reg = Target.getRegisters()[i];
1515 if (Reg.TheDef->getValueAsString("AsmName").empty())
1518 Matches.push_back(StringMatcher::StringPair(
1519 Reg.TheDef->getValueAsString("AsmName"),
1520 "return " + utostr(i + 1) + ";"));
1523 OS << "static unsigned MatchRegisterName(StringRef Name) {\n";
1525 StringMatcher("Name", Matches, OS).Emit();
1527 OS << " return 0;\n";
1531 /// EmitSubtargetFeatureFlagEnumeration - Emit the subtarget feature flag
1533 static void EmitSubtargetFeatureFlagEnumeration(AsmMatcherInfo &Info,
1535 OS << "// Flags for subtarget features that participate in "
1536 << "instruction matching.\n";
1537 OS << "enum SubtargetFeatureFlag {\n";
1538 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1539 it = Info.SubtargetFeatures.begin(),
1540 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1541 SubtargetFeatureInfo &SFI = *it->second;
1542 OS << " " << SFI.getEnumName() << " = (1 << " << SFI.Index << "),\n";
1544 OS << " Feature_None = 0\n";
1548 /// EmitComputeAvailableFeatures - Emit the function to compute the list of
1549 /// available features given a subtarget.
1550 static void EmitComputeAvailableFeatures(AsmMatcherInfo &Info,
1552 std::string ClassName =
1553 Info.AsmParser->getValueAsString("AsmParserClassName");
1555 OS << "unsigned " << Info.Target.getName() << ClassName << "::\n"
1556 << "ComputeAvailableFeatures(const " << Info.Target.getName()
1557 << "Subtarget *Subtarget) const {\n";
1558 OS << " unsigned Features = 0;\n";
1559 for (std::map<Record*, SubtargetFeatureInfo*>::const_iterator
1560 it = Info.SubtargetFeatures.begin(),
1561 ie = Info.SubtargetFeatures.end(); it != ie; ++it) {
1562 SubtargetFeatureInfo &SFI = *it->second;
1563 OS << " if (" << SFI.TheDef->getValueAsString("CondString")
1565 OS << " Features |= " << SFI.getEnumName() << ";\n";
1567 OS << " return Features;\n";
1571 static std::string GetAliasRequiredFeatures(Record *R,
1572 const AsmMatcherInfo &Info) {
1573 std::vector<Record*> ReqFeatures = R->getValueAsListOfDefs("Predicates");
1575 unsigned NumFeatures = 0;
1576 for (unsigned i = 0, e = ReqFeatures.size(); i != e; ++i) {
1577 SubtargetFeatureInfo *F = Info.getSubtargetFeature(ReqFeatures[i]);
1580 throw TGError(R->getLoc(), "Predicate '" + ReqFeatures[i]->getName() +
1581 "' is not marked as an AssemblerPredicate!");
1586 Result += F->getEnumName();
1590 if (NumFeatures > 1)
1591 Result = '(' + Result + ')';
1595 /// EmitMnemonicAliases - If the target has any MnemonicAlias<> definitions,
1596 /// emit a function for them and return true, otherwise return false.
1597 static bool EmitMnemonicAliases(raw_ostream &OS, const AsmMatcherInfo &Info) {
1598 std::vector<Record*> Aliases =
1599 Records.getAllDerivedDefinitions("MnemonicAlias");
1600 if (Aliases.empty()) return false;
1602 OS << "static void ApplyMnemonicAliases(StringRef &Mnemonic, "
1603 "unsigned Features) {\n";
1605 // Keep track of all the aliases from a mnemonic. Use an std::map so that the
1606 // iteration order of the map is stable.
1607 std::map<std::string, std::vector<Record*> > AliasesFromMnemonic;
1609 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) {
1610 Record *R = Aliases[i];
1611 AliasesFromMnemonic[R->getValueAsString("FromMnemonic")].push_back(R);
1614 // Process each alias a "from" mnemonic at a time, building the code executed
1615 // by the string remapper.
1616 std::vector<StringMatcher::StringPair> Cases;
1617 for (std::map<std::string, std::vector<Record*> >::iterator
1618 I = AliasesFromMnemonic.begin(), E = AliasesFromMnemonic.end();
1620 const std::vector<Record*> &ToVec = I->second;
1622 // Loop through each alias and emit code that handles each case. If there
1623 // are two instructions without predicates, emit an error. If there is one,
1625 std::string MatchCode;
1626 int AliasWithNoPredicate = -1;
1628 for (unsigned i = 0, e = ToVec.size(); i != e; ++i) {
1629 Record *R = ToVec[i];
1630 std::string FeatureMask = GetAliasRequiredFeatures(R, Info);
1632 // If this unconditionally matches, remember it for later and diagnose
1634 if (FeatureMask.empty()) {
1635 if (AliasWithNoPredicate != -1) {
1636 // We can't have two aliases from the same mnemonic with no predicate.
1637 PrintError(ToVec[AliasWithNoPredicate]->getLoc(),
1638 "two MnemonicAliases with the same 'from' mnemonic!");
1639 throw TGError(R->getLoc(), "this is the other MnemonicAlias.");
1642 AliasWithNoPredicate = i;
1646 if (!MatchCode.empty())
1647 MatchCode += "else ";
1648 MatchCode += "if ((Features & " + FeatureMask + ") == "+FeatureMask+")\n";
1649 MatchCode += " Mnemonic = \"" +R->getValueAsString("ToMnemonic")+"\";\n";
1652 if (AliasWithNoPredicate != -1) {
1653 Record *R = ToVec[AliasWithNoPredicate];
1654 if (!MatchCode.empty())
1655 MatchCode += "else\n ";
1656 MatchCode += "Mnemonic = \"" + R->getValueAsString("ToMnemonic")+"\";\n";
1659 MatchCode += "return;";
1661 Cases.push_back(std::make_pair(I->first, MatchCode));
1665 StringMatcher("Mnemonic", Cases, OS).Emit();
1671 void AsmMatcherEmitter::run(raw_ostream &OS) {
1672 CodeGenTarget Target;
1673 Record *AsmParser = Target.getAsmParser();
1674 std::string ClassName = AsmParser->getValueAsString("AsmParserClassName");
1676 // Compute the information on the instructions to match.
1677 AsmMatcherInfo Info(AsmParser, Target);
1680 // Sort the instruction table using the partial order on classes. We use
1681 // stable_sort to ensure that ambiguous instructions are still
1682 // deterministically ordered.
1683 std::stable_sort(Info.Matchables.begin(), Info.Matchables.end(),
1684 less_ptr<MatchableInfo>());
1686 DEBUG_WITH_TYPE("instruction_info", {
1687 for (std::vector<MatchableInfo*>::iterator
1688 it = Info.Matchables.begin(), ie = Info.Matchables.end();
1693 // Check for ambiguous matchables.
1694 DEBUG_WITH_TYPE("ambiguous_instrs", {
1695 unsigned NumAmbiguous = 0;
1696 for (unsigned i = 0, e = Info.Matchables.size(); i != e; ++i) {
1697 for (unsigned j = i + 1; j != e; ++j) {
1698 MatchableInfo &A = *Info.Matchables[i];
1699 MatchableInfo &B = *Info.Matchables[j];
1701 if (A.CouldMatchAmiguouslyWith(B)) {
1702 errs() << "warning: ambiguous matchables:\n";
1704 errs() << "\nis incomparable with:\n";
1712 errs() << "warning: " << NumAmbiguous
1713 << " ambiguous matchables!\n";
1716 // Write the output.
1718 EmitSourceFileHeader("Assembly Matcher Source Fragment", OS);
1720 // Information for the class declaration.
1721 OS << "\n#ifdef GET_ASSEMBLER_HEADER\n";
1722 OS << "#undef GET_ASSEMBLER_HEADER\n";
1723 OS << " // This should be included into the middle of the declaration of \n";
1724 OS << " // your subclasses implementation of TargetAsmParser.\n";
1725 OS << " unsigned ComputeAvailableFeatures(const " <<
1726 Target.getName() << "Subtarget *Subtarget) const;\n";
1727 OS << " enum MatchResultTy {\n";
1728 OS << " Match_Success, Match_MnemonicFail, Match_InvalidOperand,\n";
1729 OS << " Match_MissingFeature\n";
1731 OS << " MatchResultTy MatchInstructionImpl(const "
1732 << "SmallVectorImpl<MCParsedAsmOperand*>"
1733 << " &Operands, MCInst &Inst, unsigned &ErrorInfo);\n\n";
1734 OS << "#endif // GET_ASSEMBLER_HEADER_INFO\n\n";
1739 OS << "\n#ifdef GET_REGISTER_MATCHER\n";
1740 OS << "#undef GET_REGISTER_MATCHER\n\n";
1742 // Emit the subtarget feature enumeration.
1743 EmitSubtargetFeatureFlagEnumeration(Info, OS);
1745 // Emit the function to match a register name to number.
1746 EmitMatchRegisterName(Target, AsmParser, OS);
1748 OS << "#endif // GET_REGISTER_MATCHER\n\n";
1751 OS << "\n#ifdef GET_MATCHER_IMPLEMENTATION\n";
1752 OS << "#undef GET_MATCHER_IMPLEMENTATION\n\n";
1754 // Generate the function that remaps for mnemonic aliases.
1755 bool HasMnemonicAliases = EmitMnemonicAliases(OS, Info);
1757 // Generate the unified function to convert operands into an MCInst.
1758 EmitConvertToMCInst(Target, Info.Matchables, OS);
1760 // Emit the enumeration for classes which participate in matching.
1761 EmitMatchClassEnumeration(Target, Info.Classes, OS);
1763 // Emit the routine to match token strings to their match class.
1764 EmitMatchTokenString(Target, Info.Classes, OS);
1766 // Emit the routine to classify an operand.
1767 EmitClassifyOperand(Info, OS);
1769 // Emit the subclass predicate routine.
1770 EmitIsSubclass(Target, Info.Classes, OS);
1772 // Emit the available features compute function.
1773 EmitComputeAvailableFeatures(Info, OS);
1776 size_t MaxNumOperands = 0;
1777 for (std::vector<MatchableInfo*>::const_iterator it =
1778 Info.Matchables.begin(), ie = Info.Matchables.end();
1780 MaxNumOperands = std::max(MaxNumOperands, (*it)->AsmOperands.size());
1783 // Emit the static match table; unused classes get initalized to 0 which is
1784 // guaranteed to be InvalidMatchClass.
1786 // FIXME: We can reduce the size of this table very easily. First, we change
1787 // it so that store the kinds in separate bit-fields for each index, which
1788 // only needs to be the max width used for classes at that index (we also need
1789 // to reject based on this during classification). If we then make sure to
1790 // order the match kinds appropriately (putting mnemonics last), then we
1791 // should only end up using a few bits for each class, especially the ones
1792 // following the mnemonic.
1793 OS << "namespace {\n";
1794 OS << " struct MatchEntry {\n";
1795 OS << " unsigned Opcode;\n";
1796 OS << " const char *Mnemonic;\n";
1797 OS << " ConversionKind ConvertFn;\n";
1798 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1799 OS << " unsigned RequiredFeatures;\n";
1802 OS << "// Predicate for searching for an opcode.\n";
1803 OS << " struct LessOpcode {\n";
1804 OS << " bool operator()(const MatchEntry &LHS, StringRef RHS) {\n";
1805 OS << " return StringRef(LHS.Mnemonic) < RHS;\n";
1807 OS << " bool operator()(StringRef LHS, const MatchEntry &RHS) {\n";
1808 OS << " return LHS < StringRef(RHS.Mnemonic);\n";
1810 OS << " bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {\n";
1811 OS << " return StringRef(LHS.Mnemonic) < StringRef(RHS.Mnemonic);\n";
1815 OS << "} // end anonymous namespace.\n\n";
1817 OS << "static const MatchEntry MatchTable["
1818 << Info.Matchables.size() << "] = {\n";
1820 for (std::vector<MatchableInfo*>::const_iterator it =
1821 Info.Matchables.begin(), ie = Info.Matchables.end();
1823 MatchableInfo &II = **it;
1825 OS << " { " << Target.getName() << "::" << II.InstrName
1826 << ", \"" << II.Mnemonic << "\""
1827 << ", " << II.ConversionFnKind << ", { ";
1828 for (unsigned i = 0, e = II.AsmOperands.size(); i != e; ++i) {
1829 MatchableInfo::AsmOperand &Op = II.AsmOperands[i];
1832 OS << Op.Class->Name;
1836 // Write the required features mask.
1837 if (!II.RequiredFeatures.empty()) {
1838 for (unsigned i = 0, e = II.RequiredFeatures.size(); i != e; ++i) {
1840 OS << II.RequiredFeatures[i]->getEnumName();
1850 // Finally, build the match function.
1851 OS << Target.getName() << ClassName << "::MatchResultTy "
1852 << Target.getName() << ClassName << "::\n"
1853 << "MatchInstructionImpl(const SmallVectorImpl<MCParsedAsmOperand*>"
1855 OS << " MCInst &Inst, unsigned &ErrorInfo) {\n";
1857 // Emit code to get the available features.
1858 OS << " // Get the current feature set.\n";
1859 OS << " unsigned AvailableFeatures = getAvailableFeatures();\n\n";
1861 OS << " // Get the instruction mnemonic, which is the first token.\n";
1862 OS << " StringRef Mnemonic = ((" << Target.getName()
1863 << "Operand*)Operands[0])->getToken();\n\n";
1865 if (HasMnemonicAliases) {
1866 OS << " // Process all MnemonicAliases to remap the mnemonic.\n";
1867 OS << " ApplyMnemonicAliases(Mnemonic, AvailableFeatures);\n\n";
1870 // Emit code to compute the class list for this operand vector.
1871 OS << " // Eliminate obvious mismatches.\n";
1872 OS << " if (Operands.size() > " << (MaxNumOperands+1) << ") {\n";
1873 OS << " ErrorInfo = " << (MaxNumOperands+1) << ";\n";
1874 OS << " return Match_InvalidOperand;\n";
1877 OS << " // Compute the class list for this operand vector.\n";
1878 OS << " MatchClassKind Classes[" << MaxNumOperands << "];\n";
1879 OS << " for (unsigned i = 1, e = Operands.size(); i != e; ++i) {\n";
1880 OS << " Classes[i-1] = ClassifyOperand(Operands[i]);\n\n";
1882 OS << " // Check for invalid operands before matching.\n";
1883 OS << " if (Classes[i-1] == InvalidMatchClass) {\n";
1884 OS << " ErrorInfo = i;\n";
1885 OS << " return Match_InvalidOperand;\n";
1889 OS << " // Mark unused classes.\n";
1890 OS << " for (unsigned i = Operands.size()-1, e = " << MaxNumOperands << "; "
1891 << "i != e; ++i)\n";
1892 OS << " Classes[i] = InvalidMatchClass;\n\n";
1894 OS << " // Some state to try to produce better error messages.\n";
1895 OS << " bool HadMatchOtherThanFeatures = false;\n\n";
1896 OS << " // Set ErrorInfo to the operand that mismatches if it is \n";
1897 OS << " // wrong for all instances of the instruction.\n";
1898 OS << " ErrorInfo = ~0U;\n";
1900 // Emit code to search the table.
1901 OS << " // Search the table.\n";
1902 OS << " std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =\n";
1903 OS << " std::equal_range(MatchTable, MatchTable+"
1904 << Info.Matchables.size() << ", Mnemonic, LessOpcode());\n\n";
1906 OS << " // Return a more specific error code if no mnemonics match.\n";
1907 OS << " if (MnemonicRange.first == MnemonicRange.second)\n";
1908 OS << " return Match_MnemonicFail;\n\n";
1910 OS << " for (const MatchEntry *it = MnemonicRange.first, "
1911 << "*ie = MnemonicRange.second;\n";
1912 OS << " it != ie; ++it) {\n";
1914 OS << " // equal_range guarantees that instruction mnemonic matches.\n";
1915 OS << " assert(Mnemonic == it->Mnemonic);\n";
1917 // Emit check that the subclasses match.
1918 OS << " bool OperandsValid = true;\n";
1919 OS << " for (unsigned i = 0; i != " << MaxNumOperands << "; ++i) {\n";
1920 OS << " if (IsSubclass(Classes[i], it->Classes[i]))\n";
1921 OS << " continue;\n";
1922 OS << " // If this operand is broken for all of the instances of this\n";
1923 OS << " // mnemonic, keep track of it so we can report loc info.\n";
1924 OS << " if (it == MnemonicRange.first || ErrorInfo == i+1)\n";
1925 OS << " ErrorInfo = i+1;\n";
1927 OS << " ErrorInfo = ~0U;";
1928 OS << " // Otherwise, just reject this instance of the mnemonic.\n";
1929 OS << " OperandsValid = false;\n";
1933 OS << " if (!OperandsValid) continue;\n";
1935 // Emit check that the required features are available.
1936 OS << " if ((AvailableFeatures & it->RequiredFeatures) "
1937 << "!= it->RequiredFeatures) {\n";
1938 OS << " HadMatchOtherThanFeatures = true;\n";
1939 OS << " continue;\n";
1943 OS << " ConvertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);\n";
1945 // Call the post-processing function, if used.
1946 std::string InsnCleanupFn =
1947 AsmParser->getValueAsString("AsmParserInstCleanup");
1948 if (!InsnCleanupFn.empty())
1949 OS << " " << InsnCleanupFn << "(Inst);\n";
1951 OS << " return Match_Success;\n";
1954 OS << " // Okay, we had no match. Try to return a useful error code.\n";
1955 OS << " if (HadMatchOtherThanFeatures) return Match_MissingFeature;\n";
1956 OS << " return Match_InvalidOperand;\n";
1959 OS << "#endif // GET_MATCHER_IMPLEMENTATION\n\n";