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[AArch64] Fix bug in prolog clobbering live reg when shrink wrapping.
[oota-llvm.git] / test / TableGen / IntBitInit.td
1 // RUN: llvm-tblgen %s
2
3 def {
4   bit A = 1;
5   int B = A;
6 }
C/C++ LLVM-based compilers that forbids OOTA behaviors