R600/SI: Initial support for assembler and inline assembly
[oota-llvm.git] / test / MC / R600 / vopc.s
1 // RUN: llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s
2 // RUN: llvm-mc -arch=amdgcn -mcpu=SI -show-encoding %s | FileCheck %s
3
4 //===----------------------------------------------------------------------===//
5 // Generic Checks
6 //===----------------------------------------------------------------------===//
7
8 // src0 sgpr
9 v_cmp_lt_f32 vcc, s2, v4
10 // CHECK: v_cmp_lt_f32_e32 vcc, s2, v4 ; encoding: [0x02,0x08,0x02,0x7c]
11
12 // src0 inline immediate
13 v_cmp_lt_f32 vcc, 0, v4
14 // CHECK: v_cmp_lt_f32_e32 vcc, 0, v4 ; encoding: [0x80,0x08,0x02,0x7c]
15
16 // src0 literal
17 v_cmp_lt_f32 vcc, 10.0, v4
18 // CHECK: v_cmp_lt_f32_e32 vcc, 0x41200000, v4 ; encoding: [0xff,0x08,0x02,0x7c,0x00,0x00,0x20,0x41]
19
20 // src0, src1 max vgpr
21 v_cmp_lt_f32 vcc, v255, v255
22 // CHECK: v_cmp_lt_f32_e32 vcc, v255, v255 ; encoding: [0xff,0xff,0x03,0x7c]
23
24 // force 32-bit encoding
25 v_cmp_lt_f32_e32 vcc, v2, v4
26 // CHECK: v_cmp_lt_f32_e32 vcc, v2, v4 ; encoding: [0x02,0x09,0x02,0x7c]
27
28
29 //===----------------------------------------------------------------------===//
30 // Instructions
31 //===----------------------------------------------------------------------===//
32
33 v_cmp_f_f32 vcc, v2, v4
34 // CHECK: v_cmp_f_f32_e32 vcc, v2, v4 ; encoding: [0x02,0x09,0x00,0x7c]
35
36 v_cmp_lt_f32 vcc, v2, v4
37 // CHECK: v_cmp_lt_f32_e32 vcc, v2, v4 ; encoding: [0x02,0x09,0x02,0x7c]
38
39 // TODO: Add tests for the rest of the instructions.
40