1 # RUN: llvm-mc --disassemble -triple arm64-apple-darwin < %s | FileCheck %s
3 #-----------------------------------------------------------------------------
5 #-----------------------------------------------------------------------------
19 # CHECK: ldr w5, [x4, #20]
21 # CHECK: ldr x2, [sp, #32]
22 # CHECK: ldr b5, [sp, #1]
23 # CHECK: ldr h6, [sp, #2]
24 # CHECK: ldr s7, [sp, #4]
25 # CHECK: ldr d8, [sp, #8]
26 # CHECK: ldr q9, [sp, #16]
27 # CHECK: ldrb w4, [x3]
28 # CHECK: ldrsw x0, [x1, x0, lsl #2]
29 # CHECK: ldrb w5, [x4, #20]
30 # CHECK: ldrsb w9, [x3]
31 # CHECK: ldrsb x2, [sp, #128]
32 # CHECK: ldrh w2, [sp, #32]
33 # CHECK: ldrsh w3, [sp, #32]
34 # CHECK: ldrsh x5, [x9, #24]
35 # CHECK: ldrsw x9, [sp, #512]
36 # CHECK: prfm pldl3strm, [sp, #32]
58 # CHECK: prfm pldl1keep, [x2]
59 # CHECK: prfm pldl1strm, [x2]
60 # CHECK: prfm pldl2keep, [x2]
61 # CHECK: prfm pldl2strm, [x2]
62 # CHECK: prfm pldl3keep, [x2]
63 # CHECK: prfm pldl3strm, [x2]
64 # CHECK: prfm pstl1keep, [x2]
65 # CHECK: prfm pstl1strm, [x2]
66 # CHECK: prfm pstl2keep, [x2]
67 # CHECK: prfm pstl2strm, [x2]
68 # CHECK: prfm pstl3keep, [x2]
69 # CHECK: prfm pstl3strm, [x2]
71 #-----------------------------------------------------------------------------
73 #-----------------------------------------------------------------------------
88 # CHECK: str x2, [sp, #32]
89 # CHECK: str w5, [x4, #20]
90 # CHECK: str b5, [sp, #1]
91 # CHECK: str h6, [sp, #2]
92 # CHECK: str s7, [sp, #4]
93 # CHECK: str d8, [sp, #8]
94 # CHECK: str q9, [sp, #16]
95 # CHECK: strb w4, [x3]
96 # CHECK: strb w5, [x4, #20]
97 # CHECK: strh w2, [sp, #32]
99 #-----------------------------------------------------------------------------
100 # Unscaled immediate loads and stores
101 #-----------------------------------------------------------------------------
118 # CHECK: ldur w2, [x3]
119 # CHECK: ldur w2, [sp, #24]
120 # CHECK: ldur x2, [x3]
121 # CHECK: ldur x2, [sp, #24]
122 # CHECK: ldur b5, [sp, #1]
123 # CHECK: ldur h6, [sp, #2]
124 # CHECK: ldur s7, [sp, #4]
125 # CHECK: ldur d8, [sp, #8]
126 # CHECK: ldur q9, [sp, #16]
127 # CHECK: ldursb w9, [x3]
128 # CHECK: ldursb x2, [sp, #128]
129 # CHECK: ldursh w3, [sp, #32]
130 # CHECK: ldursh x5, [x9, #24]
131 # CHECK: ldursw x9, [sp, #-128]
148 # CHECK: stur w4, [x3]
149 # CHECK: stur w2, [sp, #32]
150 # CHECK: stur x4, [x3]
151 # CHECK: stur x2, [sp, #32]
152 # CHECK: stur w5, [x4, #20]
153 # CHECK: stur b5, [sp, #1]
154 # CHECK: stur h6, [sp, #2]
155 # CHECK: stur s7, [sp, #4]
156 # CHECK: stur d8, [sp, #8]
157 # CHECK: stur q9, [sp, #16]
158 # CHECK: sturb w4, [x3]
159 # CHECK: sturb w5, [x4, #20]
160 # CHECK: sturh w2, [sp, #32]
161 # CHECK: prfum pldl3strm, [sp, #32]
163 #-----------------------------------------------------------------------------
164 # Unprivileged loads and stores
165 #-----------------------------------------------------------------------------
177 # CHECK: ldtr w3, [x4, #16]
178 # CHECK: ldtr x3, [x4, #16]
179 # CHECK: ldtrb w3, [x4, #16]
180 # CHECK: ldtrsb w9, [x3]
181 # CHECK: ldtrsb x2, [sp, #128]
182 # CHECK: ldtrh w3, [x4, #16]
183 # CHECK: ldtrsh w3, [sp, #32]
184 # CHECK: ldtrsh x5, [x9, #24]
185 # CHECK: ldtrsw x9, [sp, #-128]
194 # CHECK: sttr w5, [x4, #20]
195 # CHECK: sttr x4, [x3]
196 # CHECK: sttr x2, [sp, #32]
197 # CHECK: sttrb w4, [x3]
198 # CHECK: sttrb w5, [x4, #20]
199 # CHECK: sttrh w2, [sp, #32]
201 #-----------------------------------------------------------------------------
202 # Pre-indexed loads and stores
203 #-----------------------------------------------------------------------------
213 # CHECK: ldr fp, [x7, #8]!
214 # CHECK: ldr lr, [x7, #8]!
215 # CHECK: ldr b5, [x0, #1]!
216 # CHECK: ldr h6, [x0, #2]!
217 # CHECK: ldr s7, [x0, #4]!
218 # CHECK: ldr d8, [x0, #8]!
219 # CHECK: ldr q9, [x0, #16]!
229 # CHECK: str lr, [x7, #-8]!
230 # CHECK: str fp, [x7, #-8]!
231 # CHECK: str b5, [x0, #-1]!
232 # CHECK: str h6, [x0, #-2]!
233 # CHECK: str s7, [x0, #-4]!
234 # CHECK: str d8, [x0, #-8]!
235 # CHECK: str q9, [x0, #-16]!
237 #-----------------------------------------------------------------------------
238 # post-indexed loads and stores
239 #-----------------------------------------------------------------------------
249 # CHECK: str lr, [x7], #-8
250 # CHECK: str fp, [x7], #-8
251 # CHECK: str b5, [x0], #-1
252 # CHECK: str h6, [x0], #-2
253 # CHECK: str s7, [x0], #-4
254 # CHECK: str d8, [x0], #-8
255 # CHECK: str q9, [x0], #-16
265 # CHECK: ldr fp, [x7], #8
266 # CHECK: ldr lr, [x7], #8
267 # CHECK: ldr b5, [x0], #1
268 # CHECK: ldr h6, [x0], #2
269 # CHECK: ldr s7, [x0], #4
270 # CHECK: ldr d8, [x0], #8
271 # CHECK: ldr q9, [x0], #16
273 #-----------------------------------------------------------------------------
274 # Load/Store pair (indexed offset)
275 #-----------------------------------------------------------------------------
284 # CHECK: ldp w3, w2, [x15, #16]
285 # CHECK: ldp x4, x9, [sp, #-16]
286 # CHECK: ldpsw x2, x3, [x14, #16]
287 # CHECK: ldpsw x2, x3, [sp, #-16]
288 # CHECK: ldp s10, s1, [x2, #64]
289 # CHECK: ldp d10, d1, [x2]
296 # CHECK: stp w3, w2, [x15, #16]
297 # CHECK: stp x4, x9, [sp, #-16]
298 # CHECK: stp s10, s1, [x2, #64]
299 # CHECK: stp d10, d1, [x2]
301 #-----------------------------------------------------------------------------
302 # Load/Store pair (pre-indexed)
303 #-----------------------------------------------------------------------------
312 # CHECK: ldp w3, w2, [x15, #16]!
313 # CHECK: ldp x4, x9, [sp, #-16]!
314 # CHECK: ldpsw x2, x3, [x14, #16]!
315 # CHECK: ldpsw x2, x3, [sp, #-16]!
316 # CHECK: ldp s10, s1, [x2, #64]!
317 # CHECK: ldp d10, d1, [x2, #16]!
324 # CHECK: stp w3, w2, [x15, #16]!
325 # CHECK: stp x4, x9, [sp, #-16]!
326 # CHECK: stp s10, s1, [x2, #64]!
327 # CHECK: stp d10, d1, [x2, #16]!
329 #-----------------------------------------------------------------------------
330 # Load/Store pair (post-indexed)
331 #-----------------------------------------------------------------------------
340 # CHECK: ldp w3, w2, [x15], #16
341 # CHECK: ldp x4, x9, [sp], #-16
342 # CHECK: ldpsw x2, x3, [x14], #16
343 # CHECK: ldpsw x2, x3, [sp], #-16
344 # CHECK: ldp s10, s1, [x2], #64
345 # CHECK: ldp d10, d1, [x2], #16
352 # CHECK: stp w3, w2, [x15], #16
353 # CHECK: stp x4, x9, [sp], #-16
354 # CHECK: stp s10, s1, [x2], #64
355 # CHECK: stp d10, d1, [x2], #16
357 #-----------------------------------------------------------------------------
358 # Load/Store pair (no-allocate)
359 #-----------------------------------------------------------------------------
366 # CHECK: ldnp w3, w2, [x15, #16]
367 # CHECK: ldnp x4, x9, [sp, #-16]
368 # CHECK: ldnp s10, s1, [x2, #64]
369 # CHECK: ldnp d10, d1, [x2]
376 # CHECK: stnp w3, w2, [x15, #16]
377 # CHECK: stnp x4, x9, [sp, #-16]
378 # CHECK: stnp s10, s1, [x2, #64]
379 # CHECK: stnp d10, d1, [x2]
381 #-----------------------------------------------------------------------------
382 # Load/Store register offset
383 #-----------------------------------------------------------------------------
391 # CHECK: ldr w0, [x0, x0]
392 # CHECK: ldr w0, [x0, x0, lsl #2]
393 # CHECK: ldr x0, [x0, x0]
394 # CHECK: ldr x0, [x0, x0, lsl #3]
395 # CHECK: ldr x0, [x0, x0, sxtx]
408 # CHECK: ldr b1, [x1, x2]
409 # CHECK: ldr b1, [x1, x2, lsl #0]
410 # CHECK: ldr h1, [x1, x2]
411 # CHECK: ldr h1, [x1, x2, lsl #1]
412 # CHECK: ldr s1, [x1, x2]
413 # CHECK: ldr s1, [x1, x2, lsl #2]
414 # CHECK: ldr d1, [x1, x2]
415 # CHECK: ldr d1, [x1, x2, lsl #3]
416 # CHECK: ldr q1, [x1, x2]
417 # CHECK: ldr q1, [x1, x2, lsl #4]
424 # CHECK: str d1, [sp, x3]
425 # CHECK: str d1, [sp, x3, uxtw #3]
426 # CHECK: str q1, [sp, x3]
427 # CHECK: str q1, [sp, x3, uxtw #4]
429 #-----------------------------------------------------------------------------
430 # Load/Store exclusive
431 #-----------------------------------------------------------------------------
438 # CHECK: ldxrb w6, [x1]
439 # CHECK: ldxrh w6, [x1]
440 # CHECK: ldxp w7, w3, [x9]
441 # CHECK: ldxp x7, x3, [x9]
450 # CHECK: stxr w1, x4, [x3]
451 # CHECK: stxr w1, w4, [x3]
452 # CHECK: stxrb w1, w4, [x3]
453 # CHECK: stxrh w1, w4, [x3]
454 # CHECK: stxp w1, x2, x6, [x1]
455 # CHECK: stxp w1, w2, w6, [x1]
457 #-----------------------------------------------------------------------------
458 # Load-acquire/Store-release non-exclusive
459 #-----------------------------------------------------------------------------
466 # CHECK: ldar w4, [sp]
467 # CHECK: ldar x4, [sp]
468 # CHECK: ldarb w4, [sp]
469 # CHECK: ldarh w4, [sp]
476 # CHECK: stlr w3, [x6]
477 # CHECK: stlr x3, [x6]
478 # CHECK: stlrb w3, [x6]
479 # CHECK: stlrh w3, [x6]
481 #-----------------------------------------------------------------------------
482 # Load-acquire/Store-release exclusive
483 #-----------------------------------------------------------------------------
492 # CHECK: ldaxr w2, [x4]
493 # CHECK: ldaxr x2, [x4]
494 # CHECK: ldaxrb w2, [x4]
495 # CHECK: ldaxrh w2, [x4]
496 # CHECK: ldaxp w2, w6, [x1]
497 # CHECK: ldaxp x2, x6, [x1]
506 # CHECK: stlxr w8, x7, [x1]
507 # CHECK: stlxr w8, w7, [x1]
508 # CHECK: stlxrb w8, w7, [x1]
509 # CHECK: stlxrh w8, w7, [x1]
510 # CHECK: stlxp w1, x2, x6, [x1]
511 # CHECK: stlxp w1, w2, w6, [x1]
513 #-----------------------------------------------------------------------------
514 # Load/Store with explicit LSL values
515 #-----------------------------------------------------------------------------
538 # CHECK: ldrsw x0, [x1, x0, lsl #2]
539 # CHECK: ldr x0, [x1, x0, lsl #3]
540 # CHECK: str x0, [x1, x0, lsl #3]
541 # CHECK: ldr w0, [x1, x0, lsl #2]
542 # CHECK: str w0, [x1, x0, lsl #2]
543 # CHECK: ldr q0, [x1, x0, lsl #4]
544 # CHECK: str q0, [x1, x0, lsl #4]
545 # CHECK: ldr d0, [x1, x0, lsl #3]
546 # CHECK: str d0, [x1, x0, lsl #3]
547 # CHECK: ldr s0, [x1, x0, lsl #2]
548 # CHECK: str s0, [x1, x0, lsl #2]
549 # CHECK: ldr h0, [x1, x0, lsl #1]
550 # CHECK: ldr b0, [x1, x0, lsl #0]
551 # CHECK: ldrb w0, [x1, x0, lsl #0]
552 # CHECK: strb w0, [x1, x0, lsl #0]
553 # CHECK: ldrsb w0, [x1, x0, lsl #0]
554 # CHECK: ldrh w0, [x1, x0, lsl #1]
555 # CHECK: strh w0, [x1, x0, lsl #1]
556 # CHECK: ldrsh w0, [x1, x0, lsl #1]
557 # CHECK: ldrsb x0, [x1, x0, lsl #0]
558 # CHECK: ldrsh x0, [x1, x0, lsl #1]