Taints the non-acquire RMW's store address with the load part
[oota-llvm.git] / test / MC / Disassembler / ARM / thumb2-preloads.txt
1 # RUN: not llvm-mc -triple=thumbv6t2-none-eabi -disassemble            < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2
2 # RUN: not llvm-mc -triple=thumbv7a-none-eabi  -disassemble -mattr=-mp < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7
3 # RUN:     llvm-mc -triple=thumbv7a-none-eabi  -disassemble -mattr=+mp < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7 --check-prefix=MP
4 # RUN: not llvm-mc -triple=thumbv7m-none-eabi  -disassemble            < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7
5
6 # RUN: not llvm-mc -triple=thumbv6t2-none-eabi -disassemble            < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR --check-prefix=V7-ERR
7 # RUN: not llvm-mc -triple=thumbv7a-none-eabi  -disassemble -mattr=-mp < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR
8 # RUN:     llvm-mc -triple=thumbv7a-none-eabi  -disassemble -mattr=+mp < %s 2>&1 >/dev/null
9 # RUN: not llvm-mc -triple=thumbv7m-none-eabi  -disassemble            < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR
10
11 # V6T2: pld     [r1, #3]
12 [0x91,0xf8,0x03,0xf0]
13
14 # V6T2: pld     [r2, #-5]
15 [0x12,0xf8,0x05,0xfc]
16
17 # MP: pldw    [r3, #4]
18 # MP-ERR: invalid instruction encoding
19 # MP-ERR-NEXT: [0xb3,0xf8,0x04,0xf0]
20 [0xb3,0xf8,0x04,0xf0]
21
22 # MP: pldw    [r4, #-6]
23 # MP-ERR: invalid instruction encoding
24 # MP-ERR-NEXT: [0x34,0xf8,0x06,0xfc]
25 [0x34,0xf8,0x06,0xfc]
26
27 # V6T2: pld     [pc, #8]
28 [0x9f,0xf8,0x08,0xf0]
29
30 # V6T2: pld     [pc, #-5]
31 [0x1f,0xf8,0x05,0xf0]
32
33 # V6T2: pld     [r5, r6]
34 [0x15,0xf8,0x06,0xf0]
35
36 # V6T2: pld     [r7, r8, lsl #1]
37 [0x17,0xf8,0x18,0xf0]
38
39 # MP: pldw    [r9, r10]
40 # MP-ERR: invalid instruction encoding
41 # MP-ERR-NEXT: [0x39,0xf8,0x0a,0xf0]
42 [0x39,0xf8,0x0a,0xf0]
43
44 # MP: pldw    [r11, r12, lsl #2]
45 # MP-ERR: invalid instruction encoding
46 # MP-ERR-NEXT: [0x3b,0xf8,0x2c,0xf0]
47 [0x3b,0xf8,0x2c,0xf0]
48
49 # V7: pli     [r1, #10]
50 # V7-ERR: invalid instruction encoding
51 # V7-ERR-NEXT: [0x91,0xf9,0x0a,0xf0]
52 [0x91,0xf9,0x0a,0xf0]
53
54 # V7: pli     [r2, #-3]
55 # V7-ERR: invalid instruction encoding
56 # V7-ERR-NEXT: [0x12,0xf9,0x03,0xfc]
57 [0x12,0xf9,0x03,0xfc]
58
59 # V7: pli     [pc, #6]
60 # V7-ERR: invalid instruction encoding
61 # V7-ERR-NEXT: [0x9f,0xf9,0x06,0xf0]
62 [0x9f,0xf9,0x06,0xf0]
63
64 # V7: pli     [pc, #-8]
65 # V7-ERR: invalid instruction encoding
66 # V7-ERR-NEXT: [0x1f,0xf9,0x08,0xf0]
67 [0x1f,0xf9,0x08,0xf0]
68
69 # NO-ERR-NOT: invalid instruction encoding