Add WoA object file emission support
[oota-llvm.git] / test / MC / COFF / arm-relocations.s
1 @ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
2 @ RUN:   | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-RELOCATION
3
4 @ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
5 @ RUN:   | llvm-objdump -d - | FileCheck %s -check-prefix CHECK-ENCODING
6
7         .syntax unified
8         .text
9         .thumb
10
11         .global target
12
13         .thumb_func
14 branch24t:
15         b target
16
17 @ CHECK-ENCODING-LABEL: branch24t
18 @ CHECK-ENCODING-NEXT: b.w #0
19
20         .thumb_func
21 branch20t:
22         bcc target
23
24 @ CHECK-ENCODING-LABEL: branch20t
25 @ CHECK-ENCODING-NEXT: blo.w #0
26
27         .thumb_func
28 blx23t:
29         bl target
30
31 @ CHECK-ENCODING-LABEL: blx23t
32 @ CHECK-ENCODING-NEXT: bl #0
33
34         .thumb_func
35 mov32t:
36         movw r0, :lower16:target
37         movt r0, :upper16:target
38         blx r0
39
40 @ CHECK-ENCODING-LABEL: mov32t
41 @ CHECK-ENCODING-NEXT: movw r0, #0
42 @ CHECK-ENCODING-NEXT: movt r0, #0
43 @ CHECK-ENCODING-NEXT: blx r0
44
45         .thumb_func
46 addr32:
47         ldr r0, .Laddr32
48         bx r0
49         trap
50 .Laddr32:
51         .long target
52
53 @ CHECK-ENCODING-LABEL: addr32
54 @ CHECK-ENCODING-NEXT: ldr r0, [pc, #4]
55 @ CHECK-ENCODING-NEXT: bx r0
56 @ CHECK-ENCODING-NEXT: trap
57 @ CHECK-ENCODING-NEXT: movs r0, r0
58 @ CHECK-ENCODING-NEXT: movs r0, r0
59
60         .thumb_func
61 addr32nb:
62         ldr r0, .Laddr32nb
63         bx r0
64         trap
65 .Laddr32nb:
66         .long target(imgrel)
67
68 @ CHECK-ENCODING-LABEL: addr32nb
69 @ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
70 @ CHECK-ENCODING-NEXT: bx r0
71 @ CHECK-ENCODING-NEXT: trap
72 @ CHECK-ENCODING-NEXT: movs r0, r0
73 @ CHECK-ENCODING-NEXT: movs r0, r0
74
75        .thumb_func
76 secrel:
77         ldr r0, .Lsecrel
78         bx r0
79         trap
80 .Lsecrel:
81         .long target(secrel32)
82
83 @ CHECK-ENCODING-LABEL: secrel
84 @ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
85 @ CHECK-ENCODING-NEXT: bx r0
86 @ CHECK-ENCODING-NEXT: trap
87 @ CHECK-ENCODING-NEXT: movs r0, r0
88 @ CHECK-ENCODING-NEXT: movs r0, r0
89
90 @ CHECK-RELOCATION: Relocations [
91 @ CHECK-RELOCATION:   Section (1) .text {
92 @ CHCEK-RELOCATION:     0x0 IMAGE_REL_ARM_BRANCH24T
93 @ CHECK-RELOCATION:     0x4 IMAGE_REL_ARM_BRANCH20T
94 @ CHECK-RELOCATION:     0x8 IMAGE_REL_ARM_BLX23T
95 @ CHECK-RELOCATION:     0xC IMAGE_REL_ARM_MOV32T
96 @ CHECK-RELOCATION:     0x1C IMAGE_REL_ARM_ADDR32
97 @ CHECK-RELOCATION:     0x28 IMAGE_REL_ARM_ADDR32NB
98 @ CHECK-RELOCATION:     0x34 IMAGE_REL_ARM_SECREL
99 @ CHECK-RELOCATION:   }
100 @ CHECK-RELOCATION: ]
101